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[/] [or1k/] [branches/] [stable_0_2_x/] [or1ksim/] [peripheral/] [gpio_i.h] - Blame information for rev 1765

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1 444 erez
/* gpio_i.h -- Definition of internal types and structures for GPIO code
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   Copyright (C) 2001 Erez Volk, erez@mailandnews.comopencores.org
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   This file is part of OpenRISC 1000 Architectural Simulator.
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   This program is free software; you can redistribute it and/or modify
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   it under the terms of the GNU General Public License as published by
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   the Free Software Foundation; either version 2 of the License, or
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   (at your option) any later version.
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   This program is distributed in the hope that it will be useful,
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   but WITHOUT ANY WARRANTY; without even the implied warranty of
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   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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   GNU General Public License for more details.
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   You should have received a copy of the GNU General Public License
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   along with this program; if not, write to the Free Software
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   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#ifndef __OR1KSIM_PERIPHERAL_GPIO_I_H
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#define __OR1KSIM_PERIPHERAL_GPIO_I_H
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#include "gpio.h"
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#include "config.h"
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/*
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 * The various VAPI IDs each GPIO device has
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 */
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enum { GPIO_VAPI_DATA = 0,
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       GPIO_VAPI_AUX,
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       GPIO_VAPI_CLOCK,
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       GPIO_VAPI_RGPIO_OE,
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       GPIO_VAPI_RGPIO_INTE,
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       GPIO_VAPI_RGPIO_PTRIG,
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       GPIO_VAPI_RGPIO_AUX,
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       GPIO_VAPI_RGPIO_CTRL,
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       GPIO_NUM_VAPI_IDS };
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/*
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 * Implementatino of GPIO Code Registers and State
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 */
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struct gpio_device
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{
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  /* Is peripheral enabled */
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  int enabled;
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  /* Base address in memory */
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  oraddr_t baseaddr;
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  /* Which IRQ to generate */
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  int irq;
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  /* Which GPIO is this? */
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  unsigned gpio_number;
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  /* VAPI IDs */
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  unsigned long base_vapi_id;
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  /* Auxiliary inputs */
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  unsigned long auxiliary_inputs;
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  /* Visible registers */
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  struct
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  {
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    unsigned long in;
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    unsigned long out;
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    unsigned long oe;
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    unsigned long inte;
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    unsigned long ptrig;
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    unsigned long aux;
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    unsigned long ctrl;
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    unsigned long ints;
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    int external_clock;
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  } curr, next;
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};
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#endif /* __OR1KSIM_PERIPHERAL_GPIO_I_H */

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