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[/] [or1k/] [branches/] [stable_0_2_x/] [or1ksim/] [peripheral/] [vga.c] - Blame information for rev 1765

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Line No. Rev Author Line
1 261 markom
/* vga.c -- Definition of types and structures for VGA/LCD
2
   Copyright (C) 2001 Marko Mlinar, markom@opencores.org
3
 
4
This file is part of OpenRISC 1000 Architectural Simulator.
5
 
6
This program is free software; you can redistribute it and/or modify
7
it under the terms of the GNU General Public License as published by
8
the Free Software Foundation; either version 2 of the License, or
9
(at your option) any later version.
10
 
11
This program is distributed in the hope that it will be useful,
12
but WITHOUT ANY WARRANTY; without even the implied warranty of
13
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14
GNU General Public License for more details.
15
 
16
You should have received a copy of the GNU General Public License
17
along with this program; if not, write to the Free Software
18
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
19
 
20 645 markom
#include <stdio.h>
21 1358 nogj
#include <string.h>
22 1350 nogj
 
23
#include "config.h"
24
 
25
#ifdef HAVE_INTTYPES_H
26
#include <inttypes.h>
27
#endif
28
 
29
#include "port.h"
30
#include "arch.h"
31 645 markom
#include "sim-config.h"
32
#include "vga.h"
33
#include "abstract.h"
34 805 markom
#include "sched.h"
35 645 markom
 
36
/* When this counter reaches config.vgas[].refresh_rate, a screenshot is taken and outputted */
37 1368 nogj
struct vga_state {
38 1461 nogj
  int enabled;
39 645 markom
  int pics;
40
  unsigned long ctrl, stat, htim, vtim;
41
  int vbindex;
42
  unsigned long vbar[2];
43
  unsigned hlen, vlen;
44
  int pindex;
45
  unsigned long palette[2][256];
46 1368 nogj
  oraddr_t baseaddr;
47
  int refresh_rate;
48
  int irq;
49
  char *filename;
50
};
51 645 markom
 
52
 
53
/* Write a register */
54 1359 nogj
void vga_write32(oraddr_t addr, uint32_t value, void *dat)
55 645 markom
{
56 1368 nogj
  struct vga_state *vga = dat;
57 645 markom
 
58
  switch (addr) {
59 1368 nogj
    case VGA_CTRL:  vga->ctrl = value; break;
60
    case VGA_STAT:  vga->stat = value; break;
61
    case VGA_HTIM:  vga->htim = value; break;
62
    case VGA_VTIM:  vga->vtim = value; break;
63
    case VGA_HVLEN: vga->hlen = (value >> 16) + 2; vga->hlen = (value & 0xffff) + 2; break;
64
    case VGA_VBARA: vga->vbar[0] = value; break;
65
    case VGA_VBARB: vga->vbar[1] = value; break;
66 645 markom
    default:
67
      if (addr >= VGA_CLUTA && addr < VGA_CLUTB) {
68 1368 nogj
        vga->palette[0][addr - VGA_CLUTA] = value & 0x00ffffff;
69 645 markom
      } else if (addr >= VGA_CLUTB) {
70 1368 nogj
        vga->palette[1][addr - VGA_CLUTB] = value & 0x00ffffff;
71 645 markom
      } else {
72 1368 nogj
        fprintf( stderr, "vga_write32( 0x%"PRIxADDR", 0x%08"PRIx32" ): Out of range\n", addr + vga->baseaddr, value);
73 645 markom
        return;
74
      }
75
      break;
76
  }
77
}
78
 
79
/* Read a register */
80 1359 nogj
uint32_t vga_read32(oraddr_t addr, void *dat)
81 645 markom
{
82 1368 nogj
  struct vga_state *vga = dat;
83 645 markom
 
84
  switch (addr) {
85 1368 nogj
    case VGA_CTRL:  return vga->ctrl;
86
    case VGA_STAT:  return vga->stat;
87
    case VGA_HTIM:  return vga->htim;
88
    case VGA_VTIM:  return vga->vtim;
89
    case VGA_HVLEN: return ((vga->hlen - 2) << 16) | (vga->vlen - 2);
90
    case VGA_VBARA: return vga->vbar[0];
91
    case VGA_VBARB: return vga->vbar[1];
92 645 markom
    default:
93
      if (addr >= VGA_CLUTA && addr < VGA_CLUTB) {
94 1368 nogj
        return vga->palette[0][addr - VGA_CLUTA];
95 645 markom
      } else if (addr >= VGA_CLUTB) {
96 1368 nogj
        return vga->palette[1][addr - VGA_CLUTB];
97 645 markom
      } else {
98 1350 nogj
        fprintf( stderr, "vga_read32( 0x%"PRIxADDR" ): Out of range\n", addr);
99 645 markom
        return 0;
100
      }
101
      break;
102
  }
103
  return 0;
104
}
105
 
106
/* This code will only work on little endian machines */
107
#ifdef __BIG_ENDIAN__
108
#warning Image dump not supported on big endian machines 
109
 
110 1368 nogj
static int vga_dump_image (char *filename, struct vga_start *vga)
111 645 markom
{
112
  return 1;
113
}
114
 
115
#else 
116
 
117
typedef struct {
118
   unsigned short int type;                 /* Magic identifier            */
119
   unsigned int size;                       /* File size in bytes          */
120
   unsigned short int reserved1, reserved2;
121
   unsigned int offset;                     /* Offset to image data, bytes */
122
} BMP_HEADER;
123
 
124
typedef struct {
125
   unsigned int size;               /* Header size in bytes      */
126
   int width,height;                /* Width and height of image */
127
   unsigned short int planes;       /* Number of colour planes   */
128
   unsigned short int bits;         /* Bits per pixel            */
129
   unsigned int compression;        /* Compression type          */
130
   unsigned int imagesize;          /* Image size in bytes       */
131
   int xresolution,yresolution;     /* Pixels per meter          */
132
   unsigned int ncolours;           /* Number of colours         */
133
   unsigned int importantcolours;   /* Important colours         */
134
} INFOHEADER;
135
 
136
 
137
/* Dumps a bmp file, based on current image */
138 1368 nogj
static int vga_dump_image (char *filename, struct vga_state *vga)
139 645 markom
{
140 1368 nogj
  int sx = vga->hlen;
141
  int sy = vga->vlen;
142 1557 nogj
  int i, x = 0, y = 0;
143 1368 nogj
  int pc = vga->ctrl & VGA_CTRL_PC;
144
  int rbpp = vga->ctrl & VGA_CTRL_CD;
145 645 markom
  int bpp = rbpp >> 8;
146
 
147
  BMP_HEADER bh;
148
  INFOHEADER ih;
149
  FILE *fo;
150
 
151 1368 nogj
  if (!sx || !sy) return 1;
152 645 markom
 
153
  /* 16bpp and 32 bpp will be converted to 24bpp */
154
  if (bpp == 1 || bpp == 3) bpp = 2;
155
 
156
  bh.type = 19778; /* BM */
157
  bh.size = sizeof (BMP_HEADER) + sizeof (INFOHEADER) + sx * sy * (bpp * 4 + 4) + (pc ? 1024 : 0);
158
  bh.reserved1 = bh.reserved2 = 0;
159
  bh.offset = sizeof (BMP_HEADER) + sizeof (INFOHEADER) + (pc ? 1024 : 0);
160
 
161
  ih.size = sizeof (INFOHEADER);
162
  ih.width = sx; ih.height = sy;
163
  ih.planes = 1; ih.bits = bpp * 4 + 4;
164
  ih.compression = 0; ih.imagesize = x * y * (bpp * 4 + 4);
165
  ih.xresolution = ih.yresolution = 0;
166
  ih.ncolours = 0; /* should be generated */
167
  ih.importantcolours = 0; /* all are important */
168
 
169
  fo = fopen (filename, "wb+");
170
  if (!fwrite (&bh, sizeof (BMP_HEADER), 1, fo)) return 1;
171
  if (!fwrite (&ih, sizeof (INFOHEADER), 1, fo)) return 1;
172
 
173
  if (pc) { /* Write palette? */
174
    for (i = 0; i < 256; i++) {
175
      unsigned long val, d;
176 1368 nogj
      d = vga->palette[vga->pindex][i];
177 645 markom
      val = (d >> 0) & 0xff;   /* Blue */
178
      val |= (d >> 8) & 0xff;  /* Green */
179
      val |= (d >> 16) & 0xff; /* Red */
180
      if (!fwrite (&val, sizeof (val), 1, fo)) return 1;
181
    }
182
  }
183
 
184
  /* Data is stored upside down */
185
  for (y = sy - 1; y >= 0; y--) {
186
    int align = 4 - ((bpp + 1) * sx) % 4;
187
    int zero = 0;
188
    for (x = 0; x < sx; x++) {
189 1487 nogj
      unsigned long pixel = eval_direct32 (vga->vbar[vga->vbindex] + (y * sx + x) * (bpp + 1), 0, 0);
190 645 markom
      if (!fwrite (&pixel, sizeof (pixel), 1, fo)) return 1;
191
    }
192
    if (!fwrite (&zero, align, 1, fo)) return 1;
193
  }
194
 
195
  fclose (fo);
196
  return 0;
197
}
198
#endif /* !__BIG_ENDIAN__ */
199
 
200 1368 nogj
void vga_job (void *dat)
201 805 markom
{
202 1368 nogj
  struct vga_state *vga = dat;
203 805 markom
  /* dump the image? */
204
  char temp[STR_SIZE];
205 1368 nogj
  sprintf (temp, "%s%04i.bmp", vga->filename, vga->pics++);
206
  vga_dump_image (temp, vga);
207 805 markom
 
208 1390 nogj
  SCHED_ADD(vga_job, dat, vga->refresh_rate);
209 805 markom
}
210
 
211 645 markom
/* Reset all VGAs */
212 1368 nogj
void vga_reset (void *dat)
213 645 markom
{
214 1368 nogj
  struct vga_state *vga = dat;
215 645 markom
 
216 1368 nogj
  int i;
217 645 markom
 
218 1368 nogj
  /* Init palette */
219
  for (i = 0; i < 256; i++)
220
    vga->palette[0][i] = vga->palette[1][i] = 0;
221 645 markom
 
222 1368 nogj
  vga->ctrl = vga->stat = vga->htim = vga->vtim = 0;
223
  vga->hlen = vga->vlen = 0;
224
  vga->vbar[0] = vga->vbar[1] = 0;
225
 
226
  /* Init screen dumping machine */
227
  vga->pics = 0;
228 645 markom
 
229 1368 nogj
  vga->pindex = 0;
230
  vga->vbindex = 0;
231
 
232 1390 nogj
  SCHED_ADD(vga_job, dat, vga->refresh_rate);
233 645 markom
}
234 1358 nogj
 
235
/*----------------------------------------------------[ VGA Configuration ]---*/
236
void vga_baseaddr(union param_val val, void *dat)
237
{
238 1368 nogj
  struct vga_state *vga = dat;
239
  vga->baseaddr = val.addr_val;
240 1358 nogj
}
241
 
242
void vga_irq(union param_val val, void *dat)
243
{
244 1368 nogj
  struct vga_state *vga = dat;
245
  vga->irq = val.int_val;
246 1358 nogj
}
247
 
248
void vga_refresh_rate(union param_val val, void *dat)
249
{
250 1368 nogj
  struct vga_state *vga = dat;
251
  vga->refresh_rate = val.int_val;
252 1358 nogj
}
253
 
254
void vga_filename(union param_val val, void *dat)
255
{
256 1368 nogj
  struct vga_state *vga = dat;
257
  if(!(vga->filename = strdup (val.str_val)));
258 1358 nogj
}
259
 
260 1461 nogj
void vga_enabled(union param_val val, void *dat)
261
{
262
  struct vga_state *vga = dat;
263 1477 nogj
  vga->enabled = val.int_val;
264 1461 nogj
}
265
 
266 1368 nogj
void *vga_sec_start(void)
267
{
268
  struct vga_state *new = malloc(sizeof(struct vga_state));
269
 
270
  if(!new) {
271
    fprintf(stderr, "Peripheral VGA: Run out of memory\n");
272
    exit(-1);
273
  }
274
 
275
  new->baseaddr = 0;
276 1461 nogj
  new->enabled = 1;
277 1368 nogj
 
278
  return new;
279
}
280
 
281
void vga_sec_end(void *dat)
282
{
283
  struct vga_state *vga = dat;
284 1486 nogj
  struct mem_ops ops;
285 1368 nogj
 
286 1461 nogj
  if(!vga->enabled) {
287
    free(dat);
288
    return;
289
  }
290
 
291 1486 nogj
  memset(&ops, 0, sizeof(struct mem_ops));
292 1368 nogj
 
293 1486 nogj
  ops.readfunc32 = vga_read32;
294
  ops.writefunc32 = vga_write32;
295
  ops.write_dat32 = dat;
296
  ops.read_dat32 = dat;
297
 
298
  /* FIXME: Correct delay? */
299
  ops.delayr = 2;
300
  ops.delayw = 2;
301
 
302
  reg_mem_area(vga->baseaddr, VGA_ADDR_SPACE, 0, &ops);
303
 
304 1368 nogj
  reg_sim_reset(vga_reset, dat);
305
}
306
 
307 1358 nogj
void reg_vga_sec(void)
308
{
309 1368 nogj
  struct config_section *sec = reg_config_sec("vga", vga_sec_start, vga_sec_end);
310 1358 nogj
 
311
  reg_config_param(sec, "baseaddr", paramt_addr, vga_baseaddr);
312 1461 nogj
  reg_config_param(sec, "enabled", paramt_int, vga_enabled);
313 1358 nogj
  reg_config_param(sec, "irq", paramt_int, vga_irq);
314
  reg_config_param(sec, "refresh_rate", paramt_int, vga_refresh_rate);
315
  reg_config_param(sec, "filename", paramt_str, vga_filename);
316
}

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