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1 264 markom
/* sim.cfg -- Simulator configuration script file
2 897 markom
   Copyright (C) 2001-2002, Marko Mlinar, markom@opencores.org
3 428 markom
 
4 264 markom
This file is part of OpenRISC 1000 Architectural Simulator.
5 876 rherveille
It contains the default configuration and help about configuring
6
the simulator.
7 264 markom
 
8
This program is free software; you can redistribute it and/or modify
9
it under the terms of the GNU General Public License as published by
10
the Free Software Foundation; either version 2 of the License, or
11
(at your option) any later version.
12
 
13
This program is distributed in the hope that it will be useful,
14
but WITHOUT ANY WARRANTY; without even the implied warranty of
15
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16
GNU General Public License for more details.
17
 
18
You should have received a copy of the GNU General Public License
19
along with this program; if not, write to the Free Software
20
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
21
 
22 312 markom
 
23
/* INTRODUCTION
24
 
25 876 rherveille
   The ork1sim has various parameters, that are set in configuration files
26
   like this one. The user can switch between configurations at startup by
27
   specifying the required configuration file with the -f  option.
28
   If no configuration file is specified or1ksim searches for the default
29
   configuration file sim.cfg. First it searches for './sim.cfg'. If this
30
   file is not found, it searches for '~/or1k/sim.cfg'. If this file is
31
   not found too, it reverts to the built-in default configuration.
32 1021 rherveille
 
33 876 rherveille
   NOTE: Users should not rely on the built-in configuration, since the
34
         default configuration may differ between version.
35
         Rather create a configuration file that sets all critical values.
36
 
37
   This file may contain (standard C) comments only - no // support.
38 1021 rherveille
 
39 876 rherveille
   Configure files may be be included, using:
40 568 markom
   include "file_name_to_include"
41 312 markom
 
42 876 rherveille
   Like normal configuration files, the included file is divided into
43
   sections. Each section is described in detail also.
44 428 markom
 
45 876 rherveille
   Some section have subsections. One example of such a subsection is:
46 428 markom
 
47 312 markom
   device 
48
     instance specific parameters...
49
   enddevice
50 428 markom
 
51 312 markom
   which creates a device instance.
52
*/
53
 
54 876 rherveille
 
55 312 markom
/* MEMORY SECTION
56
 
57 876 rherveille
   This section specifies how the memory is generated and the blocks
58
   it consists of.
59 428 markom
 
60 312 markom
   type = random/unknown/pattern
61 876 rherveille
      Specifies the initial memory values.
62
      'random' generates random memory using seed 'random_seed'.
63
      'pattern' fills memory with 'pattern'.
64
      'unknown' does not specify how memory should be generated,
65
      leaving the memory in a undefined state. This is the fastest
66
      option.
67 428 markom
 
68 312 markom
   random_seed = 
69 876 rherveille
      random seed for randomizer, used if type = 'random'.
70 428 markom
 
71 312 markom
   pattern = 
72 876 rherveille
      pattern to fill memory, used if type = 'pattern'.
73 428 markom
 
74 424 markom
   nmemories = 
75 428 markom
      number of memory instances connected
76
 
77 424 markom
   instance specific:
78
     baseaddr = 
79
        memory start address
80 428 markom
 
81 424 markom
     size = 
82
        memory size
83
 
84
     name = ""
85
        memory block name
86 428 markom
 
87 424 markom
     ce = 
88
        chip enable index of the memory instance
89
 
90
     delayr = 
91
        cycles, required for read access, -1 if instance does not support reading
92 428 markom
 
93 424 markom
     delayw = 
94
        cycles, required for write access, -1 if instance does not support writing
95 428 markom
 
96 424 markom
     log = ""
97
        filename, where to log memory accesses to, no log, if log command is not specified
98 312 markom
*/
99
 
100 1021 rherveille
 
101 262 markom
section memory
102 264 markom
  /*random_seed = 12345
103
  type = random*/
104 269 markom
  pattern = 0x00
105
  type = unknown /* Fastest */
106 428 markom
 
107 1021 rherveille
 
108
  nmemories = 3
109 424 markom
  device 0
110 553 markom
    name = "FLASH"
111 424 markom
    ce = 0
112 1021 rherveille
    baseaddr = 0xf0000000
113
    size = 0x00800000
114 424 markom
    delayr = 10
115
    delayw = -1
116
  enddevice
117 428 markom
 
118 424 markom
  device 1
119 553 markom
    name = "RAM"
120 424 markom
    ce = 1
121 1021 rherveille
    baseaddr = 0x00000000
122
    size = 0x00400000
123
    delayr = 1
124
    delayw = 2
125 424 markom
  enddevice
126 1021 rherveille
 
127
  device 2
128
    name = "SRAM"
129
    ce = 2
130
    baseaddr = 0x08000000
131
    size = 0x00400000
132
    delayr = 1
133
    delayw = 2
134
  enddevice
135 262 markom
end
136
 
137 434 markom
 
138 427 markom
/* IMMU SECTION
139 312 markom
 
140 876 rherveille
    This section configures the Instruction Memory Manangement Unit
141 428 markom
 
142 427 markom
    enabled = 0/1
143 876 rherveille
       '0': disabled
144
       '1': enabled
145 428 markom
       (NOTE: UPR bit is set)
146
 
147 427 markom
    nsets = 
148 428 markom
       number of ITLB sets; must be power of two
149
 
150 427 markom
    nways = 
151
       number of ITLB ways
152 428 markom
 
153 427 markom
    pagesize = 
154
       instruction page size; must be power of two
155 428 markom
 
156 427 markom
    entrysize = 
157
       instruction entry size in bytes
158 428 markom
 
159 427 markom
    ustates = 
160
       number of ITLB usage states (2, 3, 4 etc., max is 4)
161 1021 rherveille
 
162 541 markom
    hitdelay = 
163
       number of cycles immu hit costs
164 1021 rherveille
 
165 541 markom
    missdelay = 
166
       number of cycles immu miss costs
167 427 markom
*/
168
 
169
section immu
170 1021 rherveille
  enabled = 1
171
  nsets = 64
172 427 markom
  nways = 1
173 428 markom
  pagesize = 8192
174 541 markom
  hitdelay = 0
175
  missdelay = 0
176 427 markom
end
177 428 markom
 
178 434 markom
 
179 427 markom
/* DMMU SECTION
180
 
181 876 rherveille
    This section configures the Data Memory Manangement Unit
182 428 markom
 
183 427 markom
    enabled = 0/1
184 876 rherveille
       '0': disabled
185
       '1': enabled
186 428 markom
       (NOTE: UPR bit is set)
187
 
188 427 markom
    nsets = 
189
       number of DTLB sets; must be power of two
190 428 markom
 
191 427 markom
    nways = 
192
       number of DTLB ways
193 428 markom
 
194 427 markom
    pagesize = 
195
       data page size; must be power of two
196 428 markom
 
197 427 markom
    entrysize = 
198
       data entry size in bytes
199 428 markom
 
200 427 markom
    ustates = 
201
       number of DTLB usage states (2, 3, 4 etc., max is 4)
202 541 markom
 
203
    hitdelay = 
204 876 rherveille
       number of cycles dmmu hit costs
205
 
206 541 markom
    missdelay = 
207 876 rherveille
       number of cycles dmmu miss costs
208 427 markom
*/
209
 
210
section dmmu
211 1021 rherveille
  enabled = 1
212
  nsets = 64
213 427 markom
  nways = 1
214 428 markom
  pagesize = 8192
215 541 markom
  hitdelay = 0
216
  missdelay = 0
217 427 markom
end
218
 
219 428 markom
 
220
/* IC SECTION
221
 
222 876 rherveille
   This section configures the Instruction Cache
223 428 markom
 
224 541 markom
   enabled = 0/1
225 876 rherveille
       '0': disabled
226
       '1': enabled
227 541 markom
      (NOTE: UPR bit is set)
228 428 markom
 
229 541 markom
   nsets = 
230
      number of IC sets; must be power of two
231 428 markom
 
232 541 markom
   nways = 
233
      number of IC ways
234 428 markom
 
235 541 markom
   blocksize = 
236
      IC block size in bytes; must be power of two
237 428 markom
 
238 541 markom
   ustates = 
239
      number of IC usage states (2, 3, 4 etc., max is 4)
240
 
241
   hitdelay = 
242
      number of cycles ic hit costs
243 1021 rherveille
 
244 541 markom
    missdelay = 
245
      number of cycles ic miss costs
246 428 markom
*/
247
 
248
section ic
249 1021 rherveille
  enabled = 1
250
  nsets = 256
251 428 markom
  nways = 1
252
  blocksize = 16
253 541 markom
  hitdelay = 0
254
  missdelay = 0
255 428 markom
end
256
 
257 434 markom
 
258 428 markom
/* DC SECTION
259
 
260 876 rherveille
   This section configures the Data Cache
261 428 markom
 
262 541 markom
   enabled = 0/1
263 876 rherveille
       '0': disabled
264
       '1': enabled
265 541 markom
      (NOTE: UPR bit is set)
266 428 markom
 
267 541 markom
   nsets = 
268
      number of DC sets; must be power of two
269 428 markom
 
270 541 markom
   nways = 
271
      number of DC ways
272 428 markom
 
273 541 markom
   blocksize = 
274
      DC block size in bytes; must be power of two
275 428 markom
 
276 541 markom
   ustates = 
277
      number of DC usage states (2, 3, 4 etc., max is 4)
278
 
279
   load_hitdelay = 
280
      number of cycles dc load hit costs
281 1021 rherveille
 
282 541 markom
   load_missdelay = 
283
      number of cycles dc load miss costs
284 1021 rherveille
 
285 541 markom
   store_hitdelay = 
286
      number of cycles dc load hit costs
287 1021 rherveille
 
288 541 markom
   store_missdelay = 
289
      number of cycles dc load miss costs
290 428 markom
*/
291
 
292
section dc
293 1021 rherveille
  enabled = 1
294
  nsets = 256
295 428 markom
  nways = 1
296
  blocksize = 16
297 541 markom
  load_hitdelay = 0
298
  load_missdelay = 0
299
  store_hitdelay = 0
300
  store_missdelay = 0
301 428 markom
end
302
 
303 1021 rherveille
 
304 312 markom
/* SIM SECTION
305
 
306 876 rherveille
  This section specifies how or1ksim should behave.
307 428 markom
 
308 312 markom
  verbose = 0/1
309 876 rherveille
       '0': don't print extra messages
310
       '1': print extra messages
311 428 markom
 
312 344 markom
  debug = 0-9
313 876 rherveille
 
314
      1-9: debug message level.
315
           higher numbers produce more messages
316 428 markom
 
317 312 markom
  profile = 0/1
318 876 rherveille
      '0': don't generate profiling file 'sim.profile'
319
      '1': don't generate profiling file 'sim.profile'
320 428 markom
 
321 312 markom
  prof_fn = ""
322 876 rherveille
      optional filename for the profiling file.
323
      valid only if 'profile' is set
324 1021 rherveille
 
325 547 markom
  mprofile = 0/1
326 876 rherveille
      '0': don't generate memory profiling file 'sim.mprofile'
327
      '1': generate memory profiling file 'sim.mprofile'
328 428 markom
 
329 547 markom
  mprof_fn = ""
330 876 rherveille
      optional filename for the memory profiling file.
331
      valid only if 'mprofile' is set
332 547 markom
 
333 394 markom
  history = 0/1
334 876 rherveille
      '0': don't track execution flow
335
      '1': track execution flow
336
      Execution flow can be tracked for the simulator's
337
      'hist' command. Useful for back-trace debugging.
338 428 markom
 
339 312 markom
  iprompt = 0/1
340 876 rherveille
     '0': start in  (so what do we start in ???)
341
     '1': start in interactive prompt.
342 312 markom
 
343
  exe_log = 0/1
344 876 rherveille
      '0': don't generate execution log.
345
      '1': generate execution log.
346 1021 rherveille
 
347 675 markom
  exe_log = default/hardware/simple/software
348 876 rherveille
      type of execution log, default is used when not specified
349 1021 rherveille
 
350 672 markom
  exe_log_start = 
351 876 rherveille
      index of first instruction to start logging, default = 0
352 1021 rherveille
 
353 672 markom
  exe_log_end = 
354 876 rherveille
      index of last instruction to end logging; not limited, if omitted
355 1021 rherveille
 
356 672 markom
  exe_log_marker = 
357
       specifies number of instructions before horizontal marker is
358
      printed; if zero, markers are disabled (default)
359 428 markom
 
360 312 markom
  exe_log_fn = ""
361 876 rherveille
      filename for the exection log file.
362
      valid only if 'exe_log' is set
363 624 ivang
 
364
  spr_log = 0/1
365 876 rherveille
      '0': log reads/writes to/from sprs
366
      '1': don't log reads/write to/from sprs
367 624 ivang
 
368
  spr_log_fn = ""
369 876 rherveille
      filename for the sprs log file.
370
      valid only if 'spr_log' is set
371 1021 rherveille
 
372 433 markom
  clkcycle = [ps|ns|us|ms]
373
      specifies time measurement for one cycle
374 335 markom
*/
375
 
376 312 markom
section sim
377 335 markom
  /* verbose = 1 */
378 879 markom
  debug = 0
379 689 markom
  profile = 0
380 312 markom
  prof_fn = "sim.profile"
381 428 markom
 
382 394 markom
  history = 1
383 312 markom
  /* iprompt = 0 */
384
  exe_log = 0
385 1021 rherveille
  exe_log_type = software
386 672 markom
  exe_log_start = 0
387 1021 rherveille
/*  exe_log_end = 20000000*/
388
  exe_log_marker = 10000
389 312 markom
  exe_log_fn = "executed.log"
390 1021 rherveille
 
391
  spr_log = 0
392 624 ivang
  spr_log_fn = "spr.log"
393
  clkcycle = 100ns
394 312 markom
end
395
 
396
 
397
/* SECTION VAPI
398
 
399 876 rherveille
    This section configures the Verification API, used for Advanced
400 312 markom
    Core Verification.
401 428 markom
 
402 312 markom
    enabled = 0/1
403 876 rherveille
        '0': disbable VAPI server
404
        '1': enable/start VAPI server
405 428 markom
 
406 312 markom
    server_port = 
407
        TCP/IP port to start VAPI server on
408 428 markom
 
409 355 markom
    log_enabled = 0/1
410 876 rherveille
       '0': disable VAPI requests logging
411
       '1': enable VAPI requests logging
412 428 markom
 
413 486 erez
    hide_device_id = 0/1
414 876 rherveille
       '0': don't log device id (for compatability with old version)
415
       '1': log device id
416 1021 rherveille
 
417 486 erez
 
418 355 markom
    vapi_fn = 
419 876 rherveille
       filename for the log file.
420
       valid only if log_enabled is set
421 312 markom
*/
422
 
423
section VAPI
424
  enabled = 0
425
  server_port = 9998
426 355 markom
  log_enabled = 0
427 427 markom
  vapi_log_fn = "vapi.log"
428 312 markom
end
429
 
430
 
431
/* CPU SECTION
432
 
433
   This section specifies various CPU parameters.
434 428 markom
 
435 312 markom
   ver = 
436
   rev = 
437
      specifies version and revision of the CPU used
438 428 markom
 
439 312 markom
   upr = 
440
      changes the upr register
441 1021 rherveille
 
442 556 markom
   sr = 
443
      sets the initial Supervision Register value
444 428 markom
 
445 312 markom
   superscalar = 0/1
446 876 rherveille
      '0': CPU is scalar
447
      '1': CPU is superscalar
448 388 lampret
      (modify cpu/or32/execute.c to tune superscalar model)
449
 
450 312 markom
   hazards = 0/1
451 876 rherveille
      '0': don't track data hazards in superscalar CPU
452
      '1': track data hazards in superscalar CPU
453
      If tracked, data hazards can be displayed using the
454
      simulator's 'r' command.
455 388 lampret
 
456 312 markom
   dependstats = 0/1
457 876 rherveille
      '0': don't calculate inter-instruction dependencies.
458
      '1': calculate inter-instruction dependencies.
459
      If calculated, inter-instruction dependencies can be
460
      displayed using the simulator's 'stat' command.
461 388 lampret
 
462 626 markom
   sbuf_len = 
463
      length of store buffer (<= 256), 0 = disabled
464 312 markom
*/
465
 
466 263 markom
section cpu
467
  ver = 0x1200
468
  rev = 0x0001
469
  /* upr = */
470
  superscalar = 0
471
  hazards = 0
472
  dependstats = 0
473 626 markom
  sbuf_len = 0
474 263 markom
end
475
 
476 312 markom
 
477 557 markom
/* PM SECTION
478
 
479 876 rherveille
   This section specifies Power Management parameters
480
 
481 557 markom
   enabled = 0/1
482 876 rherveille
      '0': disable power management
483
      '1': enable power management
484 557 markom
*/
485
 
486
section pm
487
  enabled = 0
488
end
489
 
490 1021 rherveille
 
491 541 markom
/* BPB SECTION
492
 
493
   This section specifies how branch prediction should behave.
494 1021 rherveille
 
495 541 markom
   enabled = 0/1
496 876 rherveille
     '0': disable branch prediction
497
     '1': enable branch prediction
498 1021 rherveille
 
499 541 markom
   btic = 0/1
500 876 rherveille
     '0': disable branch target instruction cache model
501
     '1': enable branch target instruction cache model
502 541 markom
 
503
   sbp_bf_fwd = 0/1
504 876 rherveille
     Static branch prediction for 'l.bf'
505
     '0': don't use forward prediction
506 1021 rherveille
     '1': use forward prediction
507
 
508 541 markom
   sbp_bnf_fwd = 0/1
509 876 rherveille
     Static branch prediction for 'l.bnf'
510
     '0': don't use forward prediction
511
     '1': use forward prediction
512 541 markom
 
513
   hitdelay = 
514
       number of cycles bpb hit costs
515 1021 rherveille
 
516 541 markom
   missdelay = 
517
       number of cycles bpb miss costs
518
*/
519
 
520
section bpb
521
  enabled = 0
522
  btic = 0
523
  sbp_bf_fwd = 0
524
  sbp_bnf_fwd = 0
525
  hitdelay = 0
526
  missdelay = 0
527
end
528
 
529
 
530 312 markom
/* DEBUG SECTION
531
 
532 876 rherveille
   This sections specifies how the debug unit should behave.
533 428 markom
 
534 312 markom
   enabled = 0/1
535 876 rherveille
      '0': disable debug unit
536
      '1': enable debug unit
537 428 markom
 
538 312 markom
   gdb_enabled = 0/1
539 876 rherveille
      '0': don't start gdb server
540
      '1': start gdb server at port 'server_port'
541 428 markom
 
542 312 markom
   server_port = 
543 876 rherveille
      TCP/IP port to start gdb server on
544
      valid only if gdb_enabled is set
545 486 erez
 
546
   vapi_id = 
547
      Used to create "fake" vapi log file containing the JTAG proxy messages.
548 479 markom
*/
549 428 markom
 
550 269 markom
section debug
551 1021 rherveille
  enabled = 0
552 312 markom
  gdb_enabled = 0
553 269 markom
  server_port = 9999
554
end
555
 
556 264 markom
 
557 312 markom
/* MC SECTION
558
 
559
   This section configures the memory controller
560
 
561
   enabled = 0/1
562 876 rherveille
     '0': disable memory controller
563
     '1': enable memory controller
564 428 markom
 
565 312 markom
   baseaddr = 
566
      address of first MC register
567 428 markom
 
568 312 markom
   POC = 
569
      Power On Configuration register
570
*/
571
 
572 243 markom
section mc
573 1021 rherveille
  enabled = 1
574
  baseaddr = 0x93000000
575 261 markom
  POC = 0x00000008                 /* Power on configuration register */
576 243 markom
end
577 261 markom
 
578 312 markom
 
579
/* UART SECTION
580
 
581 876 rherveille
   This section configures the UARTs
582 312 markom
 
583
     baseaddr = 
584
        address of first UART register for this device
585 428 markom
 
586 1126 sfurman
 
587
     channel = :
588
 
589
        The channel parameter indicates the source of received UART characters
590
        and the sink for transmitted UART characters.
591 428 markom
 
592 1126 sfurman
        The  can be either "file", "xterm", "tcp", "fd", or "tty"
593
        (without quotes).
594 332 markom
 
595 1126 sfurman
          A) To send/receive characters from a pair of files, use a file
596
             channel:
597
 
598
               channel=file:,
599
 
600
          B) To create an interactive terminal window, use an xterm channel:
601
 
602
               channel=xterm:[]*
603
 
604
          C) To create a bidirectional tcp socket which one could, for example,
605
             access via telnet, use a tcp channel:
606
 
607
               channel=tcp:
608
 
609
          D) To cause the UART to read/write from existing numeric file
610
             descriptors, use an fd channel:
611
 
612
               channel=fd:,
613
 
614
          E) To connect the UART to a physical serial port, create a tty
615
             channel:
616
 
617
               channel=tty:device=/dev/ttyS0,baud=9600
618
 
619 332 markom
     irq = 
620
        irq number for this device
621 428 markom
 
622 341 markom
     16550 = 0/1
623 876 rherveille
        '0': this device is a UART16450
624
        '1': this device is a UART16550
625 428 markom
 
626 312 markom
     jitter = 
627
        in msecs... time to block, -1 to disable it
628 428 markom
 
629 313 markom
     vapi_id = 
630
        VAPI id of this instance
631 312 markom
*/
632
 
633 261 markom
section uart
634 1367 nogj
  baseaddr = 0x90000000
635
  irq = 2
636
  channel = "file:uart0.rx,uart0.tx"
637
  jitter = -1                     /* async behaviour */
638
  16550 = 1
639 261 markom
end
640
 
641 312 markom
 
642
/* DMA SECTION
643
 
644 876 rherveille
   This section configures the DMAs
645 312 markom
 
646
     baseaddr = 
647
        address of first DMA register for this device
648
 
649
     irq = 
650
        irq number for this device
651 428 markom
 
652 313 markom
     vapi_id = 
653
        VAPI id of this instance
654 312 markom
*/
655
 
656 261 markom
section dma
657 1370 nogj
  baseaddr = 0x9a000000
658
  irq = 11
659 261 markom
end
660 293 markom
 
661 304 markom
 
662 312 markom
/* ETHERNET SECTION
663
 
664 876 rherveille
   This section configures the ETHERNETs
665 312 markom
 
666
   nethernets = 
667
      make specified number of instances, configure each
668
      instance within device - enddevice construct.
669 428 markom
 
670 312 markom
   instance specific:
671
     baseaddr = 
672
        address of first ethernet register for this device
673
 
674
     dma = 
675
        which controller is this ethernet "connected" to
676 428 markom
 
677 724 ivang
     irq = 
678
        ethernet mac IRQ level
679
 
680 725 ivang
     rtx_type = 
681
        use 0 - file interface, 1 - socket interface
682
 
683 312 markom
     rx_channel = 
684
        DMA channel used for RX
685 428 markom
 
686 312 markom
     tx_channel = 
687
        DMA channel used for TX
688
 
689 664 markom
     rxfile = ""
690 312 markom
        filename, where to read data from
691 428 markom
 
692 664 markom
     txfile = ""
693 312 markom
        filename, where to write data to
694 428 markom
 
695 724 ivang
     sockif = ""
696
        interface name of ethernet socket
697
 
698 313 markom
     vapi_id = 
699
        VAPI id of this instance
700 312 markom
*/
701
 
702 304 markom
section ethernet
703 702 ivang
  nethernets = 1
704 428 markom
 
705 310 markom
  device 0
706 1021 rherveille
    baseaddr = 0x92000000
707 310 markom
    dma = 0
708 1021 rherveille
    irq = 4
709
    rtx_type = 1
710 310 markom
    tx_channel = 0
711
    rx_channel = 1
712 1021 rherveille
    rxfile = "eth0.rx"
713
    txfile = "eth0.tx"
714
    sockif = "eth0"
715 310 markom
  enddevice
716 304 markom
end
717 332 markom
 
718 1021 rherveille
 
719 486 erez
/* GPIO SECTION
720
 
721 876 rherveille
   This section configures the GPIOs
722 486 erez
 
723
   ngpios = 
724
      make specified number of instances, configure each
725
      instance within device - enddevice construct.
726
 
727
   instance specific:
728
     baseaddr = 
729
        address of first GPIO register for this device
730
 
731
     irq = 
732
        irq number for this device
733
 
734
     base_vapi_id = 
735
        first VAPI id of this instance
736
        GPIO uses 8 consecutive VAPI IDs
737
*/
738
 
739
section gpio
740
  ngpios = 1
741
 
742
  device 0
743 1021 rherveille
    baseaddr = 0x91000000
744
    irq = 3
745 486 erez
    base_vapi_id = 0x0200
746
  enddevice
747
end
748
 
749 645 markom
/* VGA SECTION
750 1021 rherveille
 
751 876 rherveille
    This section configures the VGA/LCD controller
752 1021 rherveille
 
753 645 markom
      baseaddr = 
754
        address of first VGA register
755 1021 rherveille
 
756 645 markom
      irq = 
757
        irq number for this device
758 1021 rherveille
 
759 645 markom
      refresh_rate = 
760
        number of cycles between screen dumps
761 1021 rherveille
 
762 645 markom
      filename = ""
763
        template name for generated names (e.g. "primary" produces "primary0023.bmp")
764
*/
765
 
766
section vga
767 1368 nogj
  baseaddr = 0x97100000
768
  irq = 8
769
  refresh_rate = 100000
770
  filename = "primary"
771 645 markom
end
772
 
773 876 rherveille
 
774 1021 rherveille
/* TICK TIMER SECTION
775 876 rherveille
 
776 1021 rherveille
    This section configures tick timer
777
 
778 645 markom
    enabled = 0/1
779 1021 rherveille
      whether tick timer is enabled
780
 
781
    irq = 
782
      irq number
783
*/
784
/*
785
section tick
786
  enabled = 1
787
  irq = 0
788
end
789
*/
790
 
791
/* FB SECTION
792
 
793
    This section configures the frame buffer
794
 
795 664 markom
    baseaddr = 
796 645 markom
      base address of frame buffer
797 1021 rherveille
 
798 645 markom
    paladdr = 
799
      base address of first palette entry
800 1021 rherveille
 
801 645 markom
    refresh_rate = 
802
      number of cycles between screen dumps
803 1021 rherveille
 
804 645 markom
    filename = ""
805
      template name for generated names (e.g. "primary" produces "primary0023.bmp")
806
*/
807
 
808
section fb
809 1021 rherveille
  baseaddr = 0x97000000
810
  refresh_rate = 1000000
811 645 markom
  filename = "primary"
812
end
813 664 markom
 
814 1021 rherveille
 
815 664 markom
/* KBD SECTION
816
 
817 876 rherveille
    This section configures the PS/2 compatible keyboard
818 1021 rherveille
 
819 664 markom
    enabled = 0/1
820
      whether keyboard is enabled
821 1021 rherveille
 
822 664 markom
    baseaddr = 
823
      base address of the keyboard device
824 1021 rherveille
 
825 664 markom
    rxfile = ""
826
      filename, where to read data from
827
*/
828
 
829
section kbd
830
  enabled = 1
831 1021 rherveille
  irq = 5
832
  baseaddr = 0x94000000
833
  rxfile = "kbd.rx"
834 664 markom
end
835 876 rherveille
 
836
 
837
/* ATA SECTION
838 1021 rherveille
 
839 876 rherveille
    This section configures the ATA/ATAPI host controller
840 1021 rherveille
 
841 876 rherveille
      baseaddr = 
842
        address of first ATA register
843 1021 rherveille
 
844 876 rherveille
      irq = 
845
        irq number for this device
846
 
847
      debug = 
848
        debug level for ata models.
849
        0: no debug messages
850
        1: verbose messages
851
        3: normal messages (more messages than verbose)
852
        5: debug messages (normal debug messages)
853
        7: flow control messages (debug statemachine flows)
854
        9: low priority message (display everything the code does)
855
 
856
      dev_type0/1 = 
857
        ata device 0 type
858
        0: NO_CONNeCT: none (not connected)
859
        1: FILE      : simulated harddisk
860
        2: LOCAL     : local system harddisk
861
 
862
      dev_file0/1 = ""
863
        filename for simulated ATA device
864
        valid only if dev_type0 == 1
865
 
866
      dev_size0/1 = 
867
        size of simulated hard-disk (in MBytes)
868
        valid only if dev_type0 == 1
869
 
870
      dev_packet0/1 = 
871
        0: simulated ATA device does NOT implement PACKET command feature set
872
        1: simulated ATA device does implement PACKET command feature set
873
 
874
   FIXME: irq number
875
*/
876
 
877
section ata
878 1364 nogj
  baseaddr = 0x9e000000
879
  irq = 15
880 876 rherveille
 
881 1364 nogj
  dev_type0   = 1
882
  dev_file0   = "/tmp/sim_atadev0"
883
  dev_size0   = 1
884
  dev_packet0 = 0
885 876 rherveille
 
886 1364 nogj
  dev_type1   = 0
887
  dev_file1   = ""
888
  dev_size1   = 0
889
  dev_packet1 = 0
890 876 rherveille
end
891 897 markom
 
892
 
893
/* CUC SECTION
894
 
895
    This section configures the OpenRISC Custom Unit Compiler
896
 
897
    memory_order = none/weak/strong/exact
898
      none   different memory ordering, even if there are dependencies,
899
             burst can be made, width can change
900
      weak   different memory ordering, if there cannot be dependencies
901
             burst can be made, width can change
902
      strong same memory ordering, burst can be made, width can change
903
      exact  exacltly the same memory ordering and widths
904
 
905
    calling_convention = 0/1
906
      whether programs follow OpenRISC calling conventions
907
 
908
    enable_bursts = 0/1
909
      whether burst are detected
910
 
911
    no_multicycle = 0/1
912
      if selected no multicycle logic paths will be generated
913
 
914
    timings_fn = ""
915
*/
916
 
917
section cuc
918
  memory_order = weak
919
  calling_convention = 1
920
  enable_bursts = 1
921
  no_multicycle = 1
922
  timings_fn = "virtex.tim"
923
end
924
 

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