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[/] [or1k/] [branches/] [stable_0_2_x/] [or1ksim/] [testbench/] [uos/] [tick.c] - Blame information for rev 1765

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Line No. Rev Author Line
1 222 markom
/* This file is part of test microkernel for OpenRISC 1000. */
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/* (C) 2001 Simon Srot, srot@opencores.org */
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#include "spr_defs.h"
5 343 erez
#include "support.h"
6 222 markom
 
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/* Tick timer period */
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unsigned long tick_period;
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/* Inform of tick interrupt */
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void (*tick_inf)();
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/* Tick interrupt routine */
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void tick_int()
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{
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  /* Call inf routine */
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  (*tick_inf)();
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  /* Set new counter period iand clear inet pending bit */
20 600 simons
        mtspr(SPR_TTMR, SPR_TTMR_IE | SPR_TTMR_RT | (tick_period & SPR_TTMR_PERIOD));
21 222 markom
}
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/* Initialize routine */
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int tick_init(unsigned long period, void (* inf)())
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{
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  /* Save tick timer period and inform routine */
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  tick_period = period;
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  tick_inf = inf;
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  /* Set counter period, enable timer and interrupt */
31 600 simons
  mtspr(SPR_TTMR, SPR_TTMR_IE | SPR_TTMR_RT | (period & SPR_TTMR_PERIOD));
32 222 markom
 
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  return 0;
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}

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