OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [LINUX_2_4_26_OR32/] [linux/] [linux-2.4/] [include/] [asm-m68k/] [raw_io.h] - Blame information for rev 1780

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 1276 phoenix 
/*
2 
 * linux/include/asm-m68k/raw_io.h
3 
 *
4 
 * 10/20/00 RZ: - created from bits of io.h and ide.h to cleanup namespace
5 
 *
6 
 */
7 
 
8 
#ifndef _RAW_IO_H
9 
#define _RAW_IO_H
10 
 
11 
#ifdef __KERNEL__
12 
 
13 
 
14 
/* Values for nocacheflag and cmode */
15 
#define IOMAP_FULL_CACHING              0
16 
#define IOMAP_NOCACHE_SER               1
17 
#define IOMAP_NOCACHE_NONSER            2
18 
#define IOMAP_WRITETHROUGH              3
19 
 
20 
extern void iounmap(void *addr);
21 
 
22 
extern void *__ioremap(unsigned long physaddr, unsigned long size,
23 
                       int cacheflag);
24 
extern void __iounmap(void *addr, unsigned long size);
25 
 
26 
 
27 
/* ++roman: The assignments to temp. vars avoid that gcc sometimes generates
28 
 * two accesses to memory, which may be undesirable for some devices.
29 
 */
30 
#define in_8(addr) \
31 
    ({ unsigned char __v = (*(volatile unsigned char *) (addr)); __v; })
32 
#define in_be16(addr) \
33 
    ({ unsigned short __v = (*(volatile unsigned short *) (addr)); __v; })
34 
#define in_be32(addr) \
35 
    ({ unsigned int __v = (*(volatile unsigned int *) (addr)); __v; })
36 
#define in_le16(addr) \
37 
    ({ unsigned short __v = le16_to_cpu(*(volatile unsigned short *) (addr)); __v; })
38 
#define in_le32(addr) \
39 
    ({ unsigned int __v = le32_to_cpu(*(volatile unsigned int *) (addr)); __v; })
40 
 
41 
#define out_8(addr,b) (void)((*(volatile unsigned char *) (addr)) = (b))
42 
#define out_be16(addr,w) (void)((*(volatile unsigned short *) (addr)) = (w))
43 
#define out_be32(addr,l) (void)((*(volatile unsigned int *) (addr)) = (l))
44 
#define out_le16(addr,w) (void)((*(volatile unsigned short *) (addr)) = cpu_to_le16(w))
45 
#define out_le32(addr,l) (void)((*(volatile unsigned int *) (addr)) = cpu_to_le32(l))
46 
 
47 
#define raw_inb in_8
48 
#define raw_inw in_be16
49 
#define raw_inl in_be32
50 
 
51 
#define raw_outb(val,port) out_8((port),(val))
52 
#define raw_outw(val,port) out_be16((port),(val))
53 
#define raw_outl(val,port) out_be32((port),(val))
54 
 
55 
static inline void raw_insb(volatile unsigned char *port, unsigned char *buf,
56 
                            unsigned int len)
57 
{
58 
        unsigned int i;
59 
 
60 
        for (i = 0; i < len; i++)
61 
                *buf++ = in_8(port);
62 
}
63 
 
64 
static inline void raw_outsb(volatile unsigned char *port,
65 
                             const unsigned char *buf, unsigned int len)
66 
{
67 
        unsigned int i;
68 
 
69 
        for (i = 0; i < len; i++)
70 
                out_8(port, *buf++);
71 
}
72 
 
73 
static inline void raw_insw(volatile unsigned short *port, unsigned short *buf,
74 
                            unsigned int nr)
75 
{
76 
        unsigned int tmp;
77 
 
78 
        if (nr & 15) {
79 
                tmp = (nr & 15) - 1;
80 
                asm volatile (
81 
                        "1: movew %2@,%0@+; dbra %1,1b"
82 
                        : "=a" (buf), "=d" (tmp)
83 
                        : "a" (port), "0" (buf),
84 
                          "1" (tmp));
85 
        }
86 
        if (nr >> 4) {
87 
                tmp = (nr >> 4) - 1;
88 
                asm volatile (
89 
                        "1: "
90 
                        "movew %2@,%0@+; "
91 
                        "movew %2@,%0@+; "
92 
                        "movew %2@,%0@+; "
93 
                        "movew %2@,%0@+; "
94 
                        "movew %2@,%0@+; "
95 
                        "movew %2@,%0@+; "
96 
                        "movew %2@,%0@+; "
97 
                        "movew %2@,%0@+; "
98 
                        "movew %2@,%0@+; "
99 
                        "movew %2@,%0@+; "
100 
                        "movew %2@,%0@+; "
101 
                        "movew %2@,%0@+; "
102 
                        "movew %2@,%0@+; "
103 
                        "movew %2@,%0@+; "
104 
                        "movew %2@,%0@+; "
105 
                        "movew %2@,%0@+; "
106 
                        "dbra %1,1b"
107 
                        : "=a" (buf), "=d" (tmp)
108 
                        : "a" (port), "0" (buf),
109 
                          "1" (tmp));
110 
        }
111 
}
112 
 
113 
static inline void raw_outsw(volatile unsigned short *port,
114 
                             const unsigned short *buf, unsigned int nr)
115 
{
116 
        unsigned int tmp;
117 
 
118 
        if (nr & 15) {
119 
                tmp = (nr & 15) - 1;
120 
                asm volatile (
121 
                        "1: movew %0@+,%2@; dbra %1,1b"
122 
                        : "=a" (buf), "=d" (tmp)
123 
                        : "a" (port), "0" (buf),
124 
                          "1" (tmp));
125 
        }
126 
        if (nr >> 4) {
127 
                tmp = (nr >> 4) - 1;
128 
                asm volatile (
129 
                        "1: "
130 
                        "movew %0@+,%2@; "
131 
                        "movew %0@+,%2@; "
132 
                        "movew %0@+,%2@; "
133 
                        "movew %0@+,%2@; "
134 
                        "movew %0@+,%2@; "
135 
                        "movew %0@+,%2@; "
136 
                        "movew %0@+,%2@; "
137 
                        "movew %0@+,%2@; "
138 
                        "movew %0@+,%2@; "
139 
                        "movew %0@+,%2@; "
140 
                        "movew %0@+,%2@; "
141 
                        "movew %0@+,%2@; "
142 
                        "movew %0@+,%2@; "
143 
                        "movew %0@+,%2@; "
144 
                        "movew %0@+,%2@; "
145 
                        "movew %0@+,%2@; "
146 
                        "dbra %1,1b"
147 
                        : "=a" (buf), "=d" (tmp)
148 
                        : "a" (port), "0" (buf),
149 
                          "1" (tmp));
150 
        }
151 
}
152 
 
153 
static inline void raw_insl(volatile unsigned int *port, unsigned int *buf,
154 
                            unsigned int nr)
155 
{
156 
        unsigned int tmp;
157 
 
158 
        if (nr & 15) {
159 
                tmp = (nr & 15) - 1;
160 
                asm volatile (
161 
                        "1: movel %2@,%0@+; dbra %1,1b"
162 
                        : "=a" (buf), "=d" (tmp)
163 
                        : "a" (port), "0" (buf),
164 
                          "1" (tmp));
165 
        }
166 
        if (nr >> 4) {
167 
                tmp = (nr >> 4) - 1;
168 
                asm volatile (
169 
                        "1: "
170 
                        "movel %2@,%0@+; "
171 
                        "movel %2@,%0@+; "
172 
                        "movel %2@,%0@+; "
173 
                        "movel %2@,%0@+; "
174 
                        "movel %2@,%0@+; "
175 
                        "movel %2@,%0@+; "
176 
                        "movel %2@,%0@+; "
177 
                        "movel %2@,%0@+; "
178 
                        "movel %2@,%0@+; "
179 
                        "movel %2@,%0@+; "
180 
                        "movel %2@,%0@+; "
181 
                        "movel %2@,%0@+; "
182 
                        "movel %2@,%0@+; "
183 
                        "movel %2@,%0@+; "
184 
                        "movel %2@,%0@+; "
185 
                        "movel %2@,%0@+; "
186 
                        "dbra %1,1b"
187 
                        : "=a" (buf), "=d" (tmp)
188 
                        : "a" (port), "0" (buf),
189 
                          "1" (tmp));
190 
        }
191 
}
192 
 
193 
static inline void raw_outsl(volatile unsigned int *port,
194 
                             const unsigned int *buf, unsigned int nr)
195 
{
196 
        unsigned int tmp;
197 
 
198 
        if (nr & 15) {
199 
                tmp = (nr & 15) - 1;
200 
                asm volatile (
201 
                        "1: movel %0@+,%2@; dbra %1,1b"
202 
                        : "=a" (buf), "=d" (tmp)
203 
                        : "a" (port), "0" (buf),
204 
                          "1" (tmp));
205 
        }
206 
        if (nr >> 4) {
207 
                tmp = (nr >> 4) - 1;
208 
                asm volatile (
209 
                        "1: "
210 
                        "movel %0@+,%2@; "
211 
                        "movel %0@+,%2@; "
212 
                        "movel %0@+,%2@; "
213 
                        "movel %0@+,%2@; "
214 
                        "movel %0@+,%2@; "
215 
                        "movel %0@+,%2@; "
216 
                        "movel %0@+,%2@; "
217 
                        "movel %0@+,%2@; "
218 
                        "movel %0@+,%2@; "
219 
                        "movel %0@+,%2@; "
220 
                        "movel %0@+,%2@; "
221 
                        "movel %0@+,%2@; "
222 
                        "movel %0@+,%2@; "
223 
                        "movel %0@+,%2@; "
224 
                        "movel %0@+,%2@; "
225 
                        "movel %0@+,%2@; "
226 
                        "dbra %1,1b"
227 
                        : "=a" (buf), "=d" (tmp)
228 
                        : "a" (port), "0" (buf),
229 
                          "1" (tmp));
230 
        }
231 
}
232 
 
233 
 
234 
static inline void raw_insw_swapw(volatile unsigned short *port,
235 
                                  unsigned short *buf, unsigned int nr)
236 
{
237 
    if ((nr) % 8)
238 
        __asm__ __volatile__
239 
               ("\tmovel %0,%/a0\n\t"
240 
                "movel %1,%/a1\n\t"
241 
                "movel %2,%/d6\n\t"
242 
                "subql #1,%/d6\n"
243 
                "1:\tmovew %/a0@,%/d0\n\t"
244 
                "rolw  #8,%/d0\n\t"
245 
                "movew %/d0,%/a1@+\n\t"
246 
                "dbra %/d6,1b"
247 
                :
248 
                : "g" (port), "g" (buf), "g" (nr)
249 
                : "d0", "a0", "a1", "d6");
250 
    else
251 
        __asm__ __volatile__
252 
               ("movel %0,%/a0\n\t"
253 
                "movel %1,%/a1\n\t"
254 
                "movel %2,%/d6\n\t"
255 
                "lsrl  #3,%/d6\n\t"
256 
                "subql #1,%/d6\n"
257 
                "1:\tmovew %/a0@,%/d0\n\t"
258 
                "rolw  #8,%/d0\n\t"
259 
                "movew %/d0,%/a1@+\n\t"
260 
                "movew %/a0@,%/d0\n\t"
261 
                "rolw  #8,%/d0\n\t"
262 
                "movew %/d0,%/a1@+\n\t"
263 
                "movew %/a0@,%/d0\n\t"
264 
                "rolw  #8,%/d0\n\t"
265 
                "movew %/d0,%/a1@+\n\t"
266 
                "movew %/a0@,%/d0\n\t"
267 
                "rolw  #8,%/d0\n\t"
268 
                "movew %/d0,%/a1@+\n\t"
269 
                "movew %/a0@,%/d0\n\t"
270 
                "rolw  #8,%/d0\n\t"
271 
                "movew %/d0,%/a1@+\n\t"
272 
                "movew %/a0@,%/d0\n\t"
273 
                "rolw  #8,%/d0\n\t"
274 
                "movew %/d0,%/a1@+\n\t"
275 
                "movew %/a0@,%/d0\n\t"
276 
                "rolw  #8,%/d0\n\t"
277 
                "movew %/d0,%/a1@+\n\t"
278 
                "movew %/a0@,%/d0\n\t"
279 
                "rolw  #8,%/d0\n\t"
280 
                "movew %/d0,%/a1@+\n\t"
281 
                "dbra %/d6,1b"
282 
                :
283 
                : "g" (port), "g" (buf), "g" (nr)
284 
                : "d0", "a0", "a1", "d6");
285 
}
286 
 
287 
static inline void raw_outsw_swapw(volatile unsigned short *port,
288 
                                   const unsigned short *buf, unsigned int nr)
289 
{
290 
    if ((nr) % 8)
291 
        __asm__ __volatile__
292 
               ("movel %0,%/a0\n\t"
293 
                "movel %1,%/a1\n\t"
294 
                "movel %2,%/d6\n\t"
295 
                "subql #1,%/d6\n"
296 
                "1:\tmovew %/a1@+,%/d0\n\t"
297 
                "rolw  #8,%/d0\n\t"
298 
                "movew %/d0,%/a0@\n\t"
299 
                "dbra %/d6,1b"
300 
                :
301 
                : "g" (port), "g" (buf), "g" (nr)
302 
                : "d0", "a0", "a1", "d6");
303 
    else
304 
        __asm__ __volatile__
305 
               ("movel %0,%/a0\n\t"
306 
                "movel %1,%/a1\n\t"
307 
                "movel %2,%/d6\n\t"
308 
                "lsrl  #3,%/d6\n\t"
309 
                "subql #1,%/d6\n"
310 
                "1:\tmovew %/a1@+,%/d0\n\t"
311 
                "rolw  #8,%/d0\n\t"
312 
                "movew %/d0,%/a0@\n\t"
313 
                "movew %/a1@+,%/d0\n\t"
314 
                "rolw  #8,%/d0\n\t"
315 
                "movew %/d0,%/a0@\n\t"
316 
                "movew %/a1@+,%/d0\n\t"
317 
                "rolw  #8,%/d0\n\t"
318 
                "movew %/d0,%/a0@\n\t"
319 
                "movew %/a1@+,%/d0\n\t"
320 
                "rolw  #8,%/d0\n\t"
321 
                "movew %/d0,%/a0@\n\t"
322 
                "movew %/a1@+,%/d0\n\t"
323 
                "rolw  #8,%/d0\n\t"
324 
                "movew %/d0,%/a0@\n\t"
325 
                "movew %/a1@+,%/d0\n\t"
326 
                "rolw  #8,%/d0\n\t"
327 
                "movew %/d0,%/a0@\n\t"
328 
                "movew %/a1@+,%/d0\n\t"
329 
                "rolw  #8,%/d0\n\t"
330 
                "movew %/d0,%/a0@\n\t"
331 
                "movew %/a1@+,%/d0\n\t"
332 
                "rolw  #8,%/d0\n\t"
333 
                "movew %/d0,%/a0@\n\t"
334 
                "dbra %/d6,1b"
335 
                :
336 
                : "g" (port), "g" (buf), "g" (nr)
337 
                : "d0", "a0", "a1", "d6");
338 
}
339 
 
340 
 
341 
#endif /* __KERNEL__ */
342 
 
343 
#endif /* _RAW_IO_H */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.