OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [LINUX_2_4_26_OR32/] [linux/] [linux-2.4/] [include/] [asm-sh/] [hd64461.h] - Blame information for rev 1765

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 1275 phoenix
#ifndef __ASM_SH_HD64461
2
#define __ASM_SH_HD64461
3
/*
4
 *      $Id: hd64461.h,v 1.1.1.1 2004-04-15 02:37:41 phoenix Exp $
5
 *      Copyright (C) 2000 YAEGASHI Takeshi
6
 *      Hitachi HD64461 companion chip support
7
 */
8
#include <linux/config.h>
9
 
10
#define HD64461_STBCR   0x10000
11
#define HD64461_SYSCR   0x10002
12
#define HD64461_SCPUCR  0x10004
13
 
14
#define HD64461_LCDCBAR         0x11000
15
#define HD64461_LCDCLOR         0x11002
16
#define HD64461_LCDCCRR         0x11004
17
#define HD64461_LDR1            0x11010
18
#define HD64461_LDR2            0x11012
19
#define HD64461_LDHNCR          0x11014
20
#define HD64461_LDHNSR          0x11016
21
#define HD64461_LDVNTR          0x11018
22
#define HD64461_LDVNDR          0x1101a
23
#define HD64461_LDVSPR          0x1101c
24
#define HD64461_LDR3            0x1101e
25
 
26
#define HD64461_CPTWAR          0x11030 
27
#define HD64461_CPTWDR          0x11032
28
#define HD64461_CPTRAR          0x11034 
29
#define HD64461_CPTRDR          0x11036
30
 
31
#define HD64461_PCC0ISR         0x12000
32
#define HD64461_PCC0GCR         0x12002
33
#define HD64461_PCC0CSCR        0x12004
34
#define HD64461_PCC0CSCIER      0x12006
35
#define HD64461_PCC0SCR         0x12008
36
#define HD64461_PCC1ISR         0x12010
37
#define HD64461_PCC1GCR         0x12012
38
#define HD64461_PCC1CSCR        0x12014
39
#define HD64461_PCC1CSCIER      0x12016
40
#define HD64461_PCC1SCR         0x12018
41
#define HD64461_P0OCR           0x1202a
42
#define HD64461_P1OCR           0x1202c
43
#define HD64461_PGCR            0x1202e
44
 
45
#define HD64461_GPACR           0x14000
46
#define HD64461_GPBCR           0x14002
47
#define HD64461_GPCCR           0x14004
48
#define HD64461_GPDCR           0x14006
49
#define HD64461_GPADR           0x14010
50
#define HD64461_GPBDR           0x14012
51
#define HD64461_GPCDR           0x14014
52
#define HD64461_GPDDR           0x14016
53
#define HD64461_GPAICR          0x14020
54
#define HD64461_GPBICR          0x14022
55
#define HD64461_GPCICR          0x14024
56
#define HD64461_GPDICR          0x14026
57
#define HD64461_GPAISR          0x14040
58
#define HD64461_GPBISR          0x14042
59
#define HD64461_GPCISR          0x14044
60
#define HD64461_GPDISR          0x14046
61
 
62
#define HD64461_NIRR            0x15000
63
#define HD64461_NIMR            0x15002
64
 
65
#ifndef CONFIG_HD64461_IOBASE
66
#define CONFIG_HD64461_IOBASE   0xb0000000
67
#endif
68
#ifndef CONFIG_HD64461_IRQ
69
#define CONFIG_HD64461_IRQ      36
70
#endif
71
 
72
#define HD64461_IRQBASE         OFFCHIP_IRQ_BASE
73
#define HD64461_IRQ_NUM         16
74
 
75
#endif

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.