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#ifndef __ASM_SH_PCI_H

#define __ASM_SH_PCI_H

#ifdef __KERNEL__

#include <linux/config.h>

/* Can be used to override the logic in pci_scan_bus for skipping

   already-configured bus numbers - to be used for buggy BIOSes

   or architectures with incomplete PCI setup by the loader */

#define pcibios_assign_all_busses()     1

#define pcibios_scan_all_fns()          0

#if defined(CONFIG_CPU_SUBTYPE_ST40)

/* These are currently the correct values for the ST40 based chips.

 * We need some way of setting this on a board specific way, it will

 * not be the same on other boards I think

 */

#define PCIBIOS_MIN_IO          0x2000

#define PCIBIOS_MIN_MEM         0x10000000

#elif defined(CONFIG_SH_DREAMCAST)

#define PCIBIOS_MIN_IO          0x2000

#define PCIBIOS_MIN_MEM         0x10000000

#elif defined(CONFIG_SH_BIGSUR) && defined(CONFIG_CPU_SUBTYPE_SH7751)

#define PCIBIOS_MIN_IO          0x2000

#define PCIBIOS_MIN_MEM         0xFD000000

#elif defined(CONFIG_SH_7751_SOLUTION_ENGINE) || defined(CONFIG_SH_SECUREEDGE5410)

#define PCIBIOS_MIN_IO          0x4000

#define PCIBIOS_MIN_MEM         0xFD000000

#elif defined(CONFIG_PCI_SD0001)

#define PCIBIOS_MIN_IO          0x2000

#define PCIBIOS_MIN_MEM         0x01000000L

#endif

struct pci_dev;

extern void pcibios_set_master(struct pci_dev *dev);

static inline void pcibios_penalize_isa_irq(int irq)

{

        /* We don't do dynamic PCI IRQ allocation */

}

/* Dynamic DMA mapping stuff.

 * SuperH has everything mapped statically like x86.

 */

#include <linux/types.h>

#include <linux/slab.h>

#include <asm/scatterlist.h>

#include <linux/string.h>

#include <asm/io.h>

struct pci_dev;

/* The PCI address space does equal the physical memory

 * address space.  The networking and block device layers use

 * this boolean for bounce buffer decisions.

 */

#define PCI_DMA_BUS_IS_PHYS     (1)

/* Allocate and map kernel buffer using consistent mode DMA for a device.

 * hwdev should be valid struct pci_dev pointer for PCI devices,

 * NULL for PCI-like buses (ISA, EISA).

 * Returns non-NULL cpu-view pointer to the buffer if successful and

 * sets *dma_addrp to the pci side dma address as well, else *dma_addrp

 * is undefined.

 */

extern void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size,

                                  dma_addr_t *dma_handle);

/* Free and unmap a consistent DMA buffer.

 * cpu_addr is what was returned from pci_alloc_consistent,

 * size must be the same as what as passed into pci_alloc_consistent,

 * and likewise dma_addr must be the same as what *dma_addrp was set to.

 *

 * References to the memory and mappings associated with cpu_addr/dma_addr

 * past this call are illegal.

 */

extern void pci_free_consistent(struct pci_dev *hwdev, size_t size,

                                void *vaddr, dma_addr_t dma_handle);

/* Map a single buffer of the indicated size for DMA in streaming mode.

 * The 32-bit bus address to use is returned.

 *

 * Once the device is given the dma address, the device owns this memory

 * until either pci_unmap_single or pci_dma_sync_single is performed.

 */

static inline dma_addr_t pci_map_single(struct pci_dev *hwdev, void *ptr,

                                        size_t size, int direction)

{

        if (direction == PCI_DMA_NONE)

                BUG();

#ifdef CONFIG_SH_PCIDMA_NONCOHERENT

        dma_cache_wback_inv(ptr, size);

#endif

        return virt_to_bus(ptr);

}

/* pci_unmap_{single,page} being a nop depends upon the

 * configuration.

 */

#ifdef CONFIG_SH_PCIDMA_NONCOHERENT

#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)       \

        dma_addr_t ADDR_NAME;

#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)         \

        __u32 LEN_NAME;

#define pci_unmap_addr(PTR, ADDR_NAME)                  \

        ((PTR)->ADDR_NAME)

#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL)         \

        (((PTR)->ADDR_NAME) = (VAL))

#define pci_unmap_len(PTR, LEN_NAME)                    \

        ((PTR)->LEN_NAME)

#define pci_unmap_len_set(PTR, LEN_NAME, VAL)           \

        (((PTR)->LEN_NAME) = (VAL))

#else

#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)

#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)

#define pci_unmap_addr(PTR, ADDR_NAME)          (0)

#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)

#define pci_unmap_len(PTR, LEN_NAME)            (0)

#define pci_unmap_len_set(PTR, LEN_NAME, VAL)   do { } while (0)

#endif

/* Unmap a single streaming mode DMA translation.  The dma_addr and size

 * must match what was provided for in a previous pci_map_single call.  All

 * other usages are undefined.

 *

 * After this call, reads by the cpu to the buffer are guarenteed to see

 * whatever the device wrote there.

 */

static inline void pci_unmap_single(struct pci_dev *hwdev, dma_addr_t dma_addr,

                                    size_t size,int direction)

{

        /* Nothing to do */

}

/* Map a set of buffers described by scatterlist in streaming

 * mode for DMA.  This is the scather-gather version of the

 * above pci_map_single interface.  Here the scatter gather list

 * elements are each tagged with the appropriate dma address

 * and length.  They are obtained via sg_dma_{address,length}(SG).

 *

 * NOTE: An implementation may be able to use a smaller number of

 *       DMA address/length pairs than there are SG table elements.

 *       (for example via virtual mapping capabilities)

 *       The routine returns the number of addr/length pairs actually

 *       used, at most nents.

 *

 * Device ownership issues as mentioned above for pci_map_single are

 * the same here.

 */

static inline int pci_map_sg(struct pci_dev *hwdev, struct scatterlist *sg,

                             int nents, int direction)

{

#ifdef CONFIG_SH_PCIDMA_NONCOHERENT

        int i;

        for (i=0; i<nents; i++)

                dma_cache_wback_inv(sg[i].address, sg[i].length);

#endif

        if (direction == PCI_DMA_NONE)

                BUG();

        return nents;

}

/* Unmap a set of streaming mode DMA translations.

 * Again, cpu read rules concerning calls here are the same as for

 * pci_unmap_single() above.

 */

static inline void pci_unmap_sg(struct pci_dev *hwdev, struct scatterlist *sg,

                                int nents, int direction)

{

        /* Nothing to do */

}

/* Make physical memory consistent for a single

 * streaming mode DMA translation after a transfer.

 *

 * If you perform a pci_map_single() but wish to interrogate the

 * buffer using the cpu, yet do not wish to teardown the PCI dma

 * mapping, you must call this function before doing so.  At the

 * next point you give the PCI dma address back to the card, the

 * device again owns the buffer.

 */

static inline void pci_dma_sync_single(struct pci_dev *hwdev,

                                       dma_addr_t dma_handle,

                                       size_t size, int direction)

{

        if (direction == PCI_DMA_NONE)

                BUG();

#ifdef CONFIG_SH_PCIDMA_NONCOHERENT

        dma_cache_wback_inv(bus_to_virt(dma_handle), size);

#endif

}

/* Make physical memory consistent for a set of streaming

 * mode DMA translations after a transfer.

 *

 * The same as pci_dma_sync_single but for a scatter-gather list,

 * same rules and usage.

 */

static inline void pci_dma_sync_sg(struct pci_dev *hwdev,

                                   struct scatterlist *sg,

                                   int nelems, int direction)

{

        if (direction == PCI_DMA_NONE)

                BUG();

#ifdef CONFIG_SH_PCIDMA_NONCOHERENT

        int i;

        for (i=0; i<nelems; i++)

                dma_cache_wback_inv(sg[i].address, sg[i].length);

#endif

}

/* Return whether the given PCI device DMA address mask can

 * be supported properly.  For example, if your device can

 * only drive the low 24-bits during PCI bus mastering, then

 * you would pass 0x00ffffff as the mask to this function.

 */

static inline int pci_dma_supported(struct pci_dev *hwdev, u64 mask)

{

        return 1;

}

/* Not supporting more than 32-bit PCI bus addresses now, but

 * must satisfy references to this function.  Change if needed.

 */

#define pci_dac_dma_supported(pci_dev, mask) (0)

/* Return the index of the PCI controller for device PDEV. */

#define pci_controller_num(PDEV)        (0)

/* These macros should be used after a pci_map_sg call has been done

 * to get bus addresses of each of the SG entries and their lengths.

 * You should only work with the number of sg entries pci_map_sg

 * returns, or alternatively stop on the first sg_dma_len(sg) which

 * is 0.

 */

#define sg_dma_address(sg)      (virt_to_bus((sg)->address))

#define sg_dma_len(sg)          ((sg)->length)

#endif /* __KERNEL__ */

#endif /* __ASM_SH_PCI_H */