| 1 |
1181 |
sfurman |
/* Target machine description for SGI Iris under Irix 5, for GDB.
|
| 2 |
|
|
Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1998, 2000
|
| 3 |
|
|
Free Software Foundation, Inc.
|
| 4 |
|
|
|
| 5 |
|
|
This file is part of GDB.
|
| 6 |
|
|
|
| 7 |
|
|
This program is free software; you can redistribute it and/or modify
|
| 8 |
|
|
it under the terms of the GNU General Public License as published by
|
| 9 |
|
|
the Free Software Foundation; either version 2 of the License, or
|
| 10 |
|
|
(at your option) any later version.
|
| 11 |
|
|
|
| 12 |
|
|
This program is distributed in the hope that it will be useful,
|
| 13 |
|
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
| 14 |
|
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
| 15 |
|
|
GNU General Public License for more details.
|
| 16 |
|
|
|
| 17 |
|
|
You should have received a copy of the GNU General Public License
|
| 18 |
|
|
along with this program; if not, write to the Free Software
|
| 19 |
|
|
Foundation, Inc., 59 Temple Place - Suite 330,
|
| 20 |
|
|
Boston, MA 02111-1307, USA. */
|
| 21 |
|
|
|
| 22 |
|
|
#include "mips/tm-irix3.h"
|
| 23 |
|
|
|
| 24 |
|
|
/* FIXME: cagney/2000-04-04: Testing the _MIPS_SIM_NABI32 and
|
| 25 |
|
|
_MIPS_SIM in a tm-*.h file is simply wrong! Those are
|
| 26 |
|
|
host-dependant macros (provided by /usr/include) and stop any
|
| 27 |
|
|
chance of the target being cross compiled */
|
| 28 |
|
|
#if defined (_MIPS_SIM_NABI32) && _MIPS_SIM == _MIPS_SIM_NABI32
|
| 29 |
|
|
/*
|
| 30 |
|
|
* Irix 6 (n32 ABI) has 32-bit GP regs and 64-bit FP regs
|
| 31 |
|
|
*/
|
| 32 |
|
|
|
| 33 |
|
|
#undef REGISTER_BYTES
|
| 34 |
|
|
#define REGISTER_BYTES (MIPS_NUMREGS * 8 + (NUM_REGS - MIPS_NUMREGS) * MIPS_REGSIZE)
|
| 35 |
|
|
|
| 36 |
|
|
#undef REGISTER_BYTE
|
| 37 |
|
|
#define REGISTER_BYTE(N) \
|
| 38 |
|
|
(((N) < FP0_REGNUM) ? (N) * MIPS_REGSIZE : \
|
| 39 |
|
|
((N) < FP0_REGNUM + 32) ? \
|
| 40 |
|
|
FP0_REGNUM * MIPS_REGSIZE + \
|
| 41 |
|
|
((N) - FP0_REGNUM) * sizeof(double) : \
|
| 42 |
|
|
32 * sizeof(double) + ((N) - 32) * MIPS_REGSIZE)
|
| 43 |
|
|
|
| 44 |
|
|
#undef REGISTER_VIRTUAL_TYPE
|
| 45 |
|
|
#define REGISTER_VIRTUAL_TYPE(N) \
|
| 46 |
|
|
(((N) >= FP0_REGNUM && (N) < FP0_REGNUM+32) ? builtin_type_double \
|
| 47 |
|
|
: ((N) == 32 /*SR*/) ? builtin_type_uint32 \
|
| 48 |
|
|
: ((N) >= 70 && (N) <= 89) ? builtin_type_uint32 \
|
| 49 |
|
|
: builtin_type_int)
|
| 50 |
|
|
|
| 51 |
|
|
#endif /* N32 */
|
| 52 |
|
|
|
| 53 |
|
|
|
| 54 |
|
|
/* The signal handler trampoline is called _sigtramp. */
|
| 55 |
|
|
#undef IN_SIGTRAMP
|
| 56 |
|
|
#define IN_SIGTRAMP(pc, name) ((name) && STREQ ("_sigtramp", name))
|
| 57 |
|
|
|
| 58 |
|
|
/* Irix 5 saves a full 64 bits for each register. We skip 2 * 4 to
|
| 59 |
|
|
get to the saved PC (the register mask and status register are both
|
| 60 |
|
|
32 bits) and then another 4 to get to the lower 32 bits. We skip
|
| 61 |
|
|
the same 4 bytes, plus the 8 bytes for the PC to get to the
|
| 62 |
|
|
registers, and add another 4 to get to the lower 32 bits. We skip
|
| 63 |
|
|
8 bytes per register. */
|
| 64 |
|
|
#undef SIGFRAME_PC_OFF
|
| 65 |
|
|
#define SIGFRAME_PC_OFF (SIGFRAME_BASE + 2 * 4 + 4)
|
| 66 |
|
|
#undef SIGFRAME_REGSAVE_OFF
|
| 67 |
|
|
#define SIGFRAME_REGSAVE_OFF (SIGFRAME_BASE + 2 * 4 + 8 + 4)
|
| 68 |
|
|
#undef SIGFRAME_FPREGSAVE_OFF
|
| 69 |
|
|
#define SIGFRAME_FPREGSAVE_OFF (SIGFRAME_BASE + 2 * 4 + 8 + 32 * 8 + 4)
|
| 70 |
|
|
#define SIGFRAME_REG_SIZE 8
|
