OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [VER_5_3/] [gdb-5.3/] [sim/] [mn10300/] [configure.in] - Blame information for rev 1783

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 1181 sfurman
dnl Process this file with autoconf to produce a configure script.
2
sinclude(../common/aclocal.m4)
3
dnl 2.12 botches SHELL substitution
4
AC_PREREQ(2.12.1)dnl
5
AC_INIT(Makefile.in)
6
 
7
SIM_AC_COMMON
8
 
9
SIM_AC_OPTION_ENDIAN(LITTLE_ENDIAN)
10
SIM_AC_OPTION_ALIGNMENT(NONSTRICT_ALIGNMENT)
11
SIM_AC_OPTION_HOSTENDIAN
12
SIM_AC_OPTION_WARNINGS
13
SIM_AC_OPTION_RESERVED_BITS
14
SIM_AC_OPTION_BITSIZE(32,31)
15
SIM_AC_OPTION_INLINE()
16
SIM_AC_OPTION_HARDWARE(yes,,mn103cpu mn103int mn103tim mn103ser mn103iop)
17
 
18
AC_CHECK_FUNCS(time chmod utime fork execve execv chown)
19
AC_CHECK_HEADERS(unistd.h stdlib.h string.h strings.h utime.h time.h)
20
 
21
#
22
# Enable common
23
#
24
AC_ARG_ENABLE(sim-common,
25
[  --enable-sim-common                  Enable common simulator],
26
[case "${enableval}" in
27
  yes) sim_gen="-DWITH_COMMON=1"; mn10300_common="WITH";;
28
  no)  sim_gen="-DWITH_COMMON=0"; mn10300_common="WITHOUT";;
29
  *)   AC_MSG_ERROR("Unknown value $enableval passed to --enable-sim-common"); sim_gen="";;
30
esac
31
if test x"$silent" != x"yes" && test x"$sim_gen" != x""; then
32
  echo "Setting sim_common = $sim_common" 6>&1
33
fi],[sim_gen="-DWITH_COMMON=1"; mn10300_common="WITH"])dnl
34
AC_SUBST(sim_gen)
35
AC_SUBST(mn10300_common)
36
 
37
SIM_AC_OUTPUT

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.