OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [before_ORP/] [uclinux/] [uClinux-2.0.x/] [drivers/] [char/] [riscom8.h] - Blame information for rev 1765

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 199 simons
/*
2
 *      linux/drivers/char/riscom8.h  -- RISCom/8 multiport serial driver.
3
 *
4
 *      Copyright (C) 1994-1996  Dmitry Gorodchanin (pgmdsg@ibi.com)
5
 *
6
 *      This code is loosely based on the Linux serial driver, written by
7
 *      Linus Torvalds, Theodore T'so and others. The RISCom/8 card
8
 *      programming info was obtained from various drivers for other OSes
9
 *      (FreeBSD, ISC, etc), but no source code from those drivers were
10
 *      directly included in this driver.
11
 *
12
 *
13
 *      This program is free software; you can redistribute it and/or modify
14
 *      it under the terms of the GNU General Public License as published by
15
 *      the Free Software Foundation; either version 2 of the License, or
16
 *      (at your option) any later version.
17
 *
18
 *      This program is distributed in the hope that it will be useful,
19
 *      but WITHOUT ANY WARRANTY; without even the implied warranty of
20
 *      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
21
 *      GNU General Public License for more details.
22
 *
23
 *      You should have received a copy of the GNU General Public License
24
 *      along with this program; if not, write to the Free Software
25
 *      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26
 */
27
 
28
#ifndef __LINUX_RISCOM8_H
29
#define __LINUX_RISCOM8_H
30
 
31
#include <linux/serial.h>
32
 
33
#ifdef __KERNEL__
34
 
35
#define RC_NBOARD               4
36
/* NOTE: RISCom decoder recognizes 16 addresses... */
37
#define RC_NPORT                8  
38
#define RC_BOARD(line)          (((line) >> 3) & 0x07)
39
#define RC_PORT(line)           ((line) & (RC_NPORT - 1))
40
 
41
/* Ticks per sec. Used for setting receiver timeout and break length */
42
#define RISCOM_TPS              4000
43
 
44
/* Yeah, after heavy testing I decided it must be 6.
45
 * Sure, You can change it if needed.
46
 */
47
#define RISCOM_RXFIFO           6       /* Max. receiver FIFO size (1-8) */
48
 
49
#define RISCOM8_MAGIC           0x0907
50
 
51
#define RC_IOBASE1      0x220
52
#define RC_IOBASE2      0x240
53
#define RC_IOBASE3      0x250
54
#define RC_IOBASE4      0x260
55
 
56
struct riscom_board {
57
        unsigned long   flags;
58
        unsigned short  base;
59
        unsigned char   irq;
60
        signed   char   count;
61
        unsigned char   DTR;
62
};
63
 
64
#define RC_BOARD_PRESENT        0x00000001
65
#define RC_BOARD_ACTIVE         0x00000002
66
 
67
struct riscom_port {
68
        int                     magic;
69
        int                     baud_base;
70
        int                     flags;
71
        struct tty_struct       * tty;
72
        int                     count;
73
        int                     blocked_open;
74
        int                     event;
75
        int                     timeout;
76
        int                     close_delay;
77
        long                    session;
78
        long                    pgrp;
79
        unsigned char           * xmit_buf;
80
        int                     custom_divisor;
81
        int                     xmit_head;
82
        int                     xmit_tail;
83
        int                     xmit_cnt;
84
        struct termios          normal_termios;
85
        struct termios          callout_termios;
86
        struct wait_queue       *open_wait;
87
        struct wait_queue       *close_wait;
88
        struct tq_struct        tqueue;
89
        struct tq_struct        tqueue_hangup;
90
        short                   wakeup_chars;
91
        short                   break_length;
92
        unsigned short          closing_wait;
93
        unsigned char           mark_mask;
94
        unsigned char           IER;
95
        unsigned char           MSVR;
96
        unsigned char           COR2;
97
#ifdef RC_REPORT_OVERRUN
98
        unsigned long           overrun;
99
#endif  
100
#ifdef RC_REPORT_FIFO
101
        unsigned long           hits[10];
102
#endif
103
};
104
 
105
#endif /* __KERNEL__ */
106
#endif /* __LINUX_RISCOM8_H */

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.