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/* $Id: diva.c,v 1.1.1.1 2001-09-10 07:44:18 simons Exp $
 
 * diva.c     low level stuff for Eicon.Diehl Diva Family ISDN cards
 *
 * Author     Karsten Keil (keil@isdn4linux.de)
 *
 * Thanks to Eicon Technology Diehl GmbH & Co. oHG for documents and informations
 *
 *
 * $Log: not supported by cvs2svn $
 * Revision 1.1.1.1  2001/07/02 17:58:32  simons
 * Initial revision
 *
 * Revision 1.1.2.11  1998/11/05 21:13:51  keil
 * minor fixes
 *
 * Revision 1.1.2.10  1998/11/03 00:06:10  keil
 * certification related changes
 * fixed logging for smaller stack use
 *
 * Revision 1.1.2.9  1998/06/27 21:58:34  keil
 * fix release of diva 2.01
 *
 * Revision 1.1.2.8  1998/05/27 18:05:11  keil
 * HiSax 3.0
 *
 * Revision 1.1.2.7  1998/04/24 13:37:13  keil
 * Support for DIVA 2.01 IPAC
 *
 * Revision 1.1.2.6  1998/04/08 22:05:21  keil
 * Forgot PCI fix
 *
 * Revision 1.1.2.5  1998/04/08 21:49:27  keil
 * New init; fix PCI for more as one card
 *
 * Revision 1.1.2.4  1998/03/07 23:15:14  tsbogend
 * made HiSax working on Linux/Alpha
 *
 * Revision 1.1.2.3  1998/01/27 22:37:35  keil
 * fast io
 *
 * Revision 1.1.2.2  1997/11/15 18:50:44  keil
 * new common init function
 *
 * Revision 1.1.2.1  1997/10/17 22:10:36  keil
 * new files on 2.0
 *
 * Revision 1.1  1997/09/18 17:11:20  keil
 * first version
 *
 *
 */
 
#define __NO_VERSION__
#include <linux/config.h>
#include "hisax.h"
#include "isac.h"
#include "hscx.h"
#include "ipac.h"
#include "isdnl1.h"
#include <linux/pci.h>
#include <linux/bios32.h>
 
extern const char *CardType[];
 
const char *Diva_revision = "$Revision: 1.1.1.1 $";
 
#define byteout(addr,val) outb(val,addr)
#define bytein(addr) inb(addr)
 
#define DIVA_HSCX_DATA          0
#define DIVA_HSCX_ADR           4
#define DIVA_ISA_ISAC_DATA      2
#define DIVA_ISA_ISAC_ADR       6
#define DIVA_ISA_CTRL           7
#define DIVA_IPAC_ADR           0
#define DIVA_IPAC_DATA          1
 
#define DIVA_PCI_ISAC_DATA      8
#define DIVA_PCI_ISAC_ADR       0xc
#define DIVA_PCI_CTRL           0x10
 
/* SUB Types */
#define DIVA_ISA        1
#define DIVA_PCI        2
#define DIVA_IPAC_ISA   3
 
/* PCI stuff */
#define PCI_VENDOR_EICON_DIEHL  0x1133
#define PCI_DIVA20PRO_ID        0xe001
#define PCI_DIVA20_ID           0xe002
#define PCI_DIVA20PRO_U_ID      0xe003
#define PCI_DIVA20_U_ID         0xe004
 
/* CTRL (Read) */
#define DIVA_IRQ_STAT   0x01
#define DIVA_EEPROM_SDA 0x02
/* CTRL (Write) */
#define DIVA_IRQ_REQ    0x01
#define DIVA_RESET      0x08
#define DIVA_EEPROM_CLK 0x40
#define DIVA_PCI_LED_A  0x10
#define DIVA_PCI_LED_B  0x20
#define DIVA_ISA_LED_A  0x20
#define DIVA_ISA_LED_B  0x40
#define DIVA_IRQ_CLR    0x80
 
static inline u_char
readreg(unsigned int ale, unsigned int adr, u_char off)
{
        register u_char ret;
        long flags;
 
        save_flags(flags);
        cli();
        byteout(ale, off);
        ret = bytein(adr);
        restore_flags(flags);
        return (ret);
}
 
static inline void
readfifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size)
{
        /* fifo read without cli because it's allready done  */
 
        byteout(ale, off);
        insb(adr, data, size);
}
 
 
static inline void
writereg(unsigned int ale, unsigned int adr, u_char off, u_char data)
{
        long flags;
 
        save_flags(flags);
        cli();
        byteout(ale, off);
        byteout(adr, data);
        restore_flags(flags);
}
 
static inline void
writefifo(unsigned int ale, unsigned int adr, u_char off, u_char *data, int size)
{
        /* fifo write without cli because it's allready done  */
        byteout(ale, off);
        outsb(adr, data, size);
}
 
/* Interface functions */
 
static u_char
ReadISAC(struct IsdnCardState *cs, u_char offset)
{
        return(readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, offset));
}
 
static void
WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
{
        writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, offset, value);
}
 
static void
ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
        readfifo(cs->hw.diva.isac_adr, cs->hw.diva.isac, 0, data, size);
}
 
static void
WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
{
        writefifo(cs->hw.diva.isac_adr, cs->hw.diva.isac, 0, data, size);
}
 
static u_char
ReadISAC_IPAC(struct IsdnCardState *cs, u_char offset)
{
        return (readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, offset+0x80));
}
 
static void
WriteISAC_IPAC(struct IsdnCardState *cs, u_char offset, u_char value)
{
        writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, offset|0x80, value);
}
 
static void
ReadISACfifo_IPAC(struct IsdnCardState *cs, u_char * data, int size)
{
        readfifo(cs->hw.diva.isac_adr, cs->hw.diva.isac, 0x80, data, size);
}
 
static void
WriteISACfifo_IPAC(struct IsdnCardState *cs, u_char * data, int size)
{
        writefifo(cs->hw.diva.isac_adr, cs->hw.diva.isac, 0x80, data, size);
}
 
static u_char
ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset)
{
        return(readreg(cs->hw.diva.hscx_adr,
                cs->hw.diva.hscx, offset + (hscx ? 0x40 : 0)));
}
 
static void
WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value)
{
        writereg(cs->hw.diva.hscx_adr,
                cs->hw.diva.hscx, offset + (hscx ? 0x40 : 0), value);
}
 
/*
 * fast interrupt HSCX stuff goes here
 */
 
#define READHSCX(cs, nr, reg) readreg(cs->hw.diva.hscx_adr, \
                cs->hw.diva.hscx, reg + (nr ? 0x40 : 0))
#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.diva.hscx_adr, \
                cs->hw.diva.hscx, reg + (nr ? 0x40 : 0), data)
 
#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.diva.hscx_adr, \
                cs->hw.diva.hscx, (nr ? 0x40 : 0), ptr, cnt)
 
#define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.diva.hscx_adr, \
                cs->hw.diva.hscx, (nr ? 0x40 : 0), ptr, cnt)
 
#include "hscx_irq.c"
 
static void
diva_interrupt(int intno, void *dev_id, struct pt_regs *regs)
{
        struct IsdnCardState *cs = dev_id;
        u_char val, sval, stat = 0;
        int cnt=8;
 
        if (!cs) {
                printk(KERN_WARNING "Diva: Spurious interrupt!\n");
                return;
        }
        while (((sval = bytein(cs->hw.diva.ctrl)) & DIVA_IRQ_REQ) && cnt) {
                val = readreg(cs->hw.diva.hscx_adr, cs->hw.diva.hscx, HSCX_ISTA + 0x40);
                if (val) {
                        hscx_int_main(cs, val);
                        stat |= 1;
                }
                val = readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, ISAC_ISTA);
                if (val) {
                        isac_interrupt(cs, val);
                        stat |= 2;
                }
                cnt--;
        }
        if (!cnt)
                printk(KERN_WARNING "Diva: IRQ LOOP\n");
        if (stat & 1) {
                writereg(cs->hw.diva.hscx_adr, cs->hw.diva.hscx, HSCX_MASK, 0xFF);
                writereg(cs->hw.diva.hscx_adr, cs->hw.diva.hscx, HSCX_MASK + 0x40, 0xFF);
                writereg(cs->hw.diva.hscx_adr, cs->hw.diva.hscx, HSCX_MASK, 0x0);
                writereg(cs->hw.diva.hscx_adr, cs->hw.diva.hscx, HSCX_MASK + 0x40, 0x0);
        }
        if (stat & 2) {
                writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, ISAC_MASK, 0xFF);
                writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, ISAC_MASK, 0x0);
        }
}
 
static void
diva_interrupt_ipac(int intno, void *dev_id, struct pt_regs *regs)
{
        struct IsdnCardState *cs = dev_id;
        u_char ista,val;
        int icnt=20;
 
        if (!cs) {
                printk(KERN_WARNING "Diva: Spurious interrupt!\n");
                return;
        }
        ista = readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, IPAC_ISTA);
Start_IPAC:
        if (cs->debug & L1_DEB_IPAC)
                debugl1(cs, "IPAC ISTA %02X", ista);
        if (ista & 0x0f) {
                val = readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, HSCX_ISTA + 0x40);
                if (ista & 0x01)
                        val |= 0x01;
                if (ista & 0x04)
                        val |= 0x02;
                if (ista & 0x08)
                        val |= 0x04;
                if (val)
                        hscx_int_main(cs, val);
        }
        if (ista & 0x20) {
                val = 0xfe & readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, ISAC_ISTA + 0x80);
                if (val) {
                        isac_interrupt(cs, val);
                }
        }
        if (ista & 0x10) {
                val = 0x01;
                isac_interrupt(cs, val);
        }
        ista  = readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, IPAC_ISTA);
        if ((ista & 0x3f) && icnt) {
                icnt--;
                goto Start_IPAC;
        }
        if (!icnt)
                printk(KERN_WARNING "DIVA IPAC IRQ LOOP\n");
        writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, IPAC_MASK, 0xFF);
        writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, IPAC_MASK, 0xC0);
}
 
 
void
release_io_diva(struct IsdnCardState *cs)
{
        int bytecnt;
 
        if (cs->subtyp != DIVA_IPAC_ISA) {
                del_timer(&cs->hw.diva.tl);
                if (cs->hw.diva.cfg_reg)
                        byteout(cs->hw.diva.ctrl, 0); /* LED off, Reset */
        }
        if ((cs->subtyp == DIVA_ISA) || (cs->subtyp == DIVA_IPAC_ISA))
                bytecnt = 8;
        else
                bytecnt = 32;
        if (cs->hw.diva.cfg_reg) {
                release_region(cs->hw.diva.cfg_reg, bytecnt);
        }
}
 
static void
reset_diva(struct IsdnCardState *cs)
{
        long flags;
 
        save_flags(flags);
        sti();
        if (cs->subtyp == DIVA_IPAC_ISA) {
                writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, IPAC_POTA2, 0x20);
                current->state = TASK_INTERRUPTIBLE;
                current->timeout = jiffies + (10 * HZ) / 1000;  /* Timeout 10ms */
                schedule();
                writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, IPAC_POTA2, 0x00);
                current->state = TASK_INTERRUPTIBLE;
                current->timeout = jiffies + (10 * HZ) / 1000;  /* Timeout 10ms */
                schedule();
                writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, IPAC_MASK, 0xc0);
                schedule();
        } else {
                cs->hw.diva.ctrl_reg = 0;        /* Reset On */
                byteout(cs->hw.diva.ctrl, cs->hw.diva.ctrl_reg);
                current->state = TASK_INTERRUPTIBLE;
                current->timeout = jiffies + (10 * HZ) / 1000;  /* Timeout 10ms */
                schedule();
                cs->hw.diva.ctrl_reg |= DIVA_RESET;  /* Reset Off */
                byteout(cs->hw.diva.ctrl, cs->hw.diva.ctrl_reg);
                current->state = TASK_INTERRUPTIBLE;
                current->timeout = jiffies + (10 * HZ) / 1000;  /* Timeout 10ms */
                schedule();
                if (cs->subtyp == DIVA_ISA)
                        cs->hw.diva.ctrl_reg |= DIVA_ISA_LED_A;
                else
                        cs->hw.diva.ctrl_reg |= DIVA_PCI_LED_A;
                byteout(cs->hw.diva.ctrl, cs->hw.diva.ctrl_reg);
        }
        restore_flags(flags);
}
 
#define DIVA_ASSIGN 1
 
static void
diva_led_handler(struct IsdnCardState *cs)
{
        int blink = 0;
 
        if (cs->subtyp == DIVA_IPAC_ISA)
                return;
        del_timer(&cs->hw.diva.tl);
        if (cs->hw.diva.status & DIVA_ASSIGN)
                cs->hw.diva.ctrl_reg |= (DIVA_ISA == cs->subtyp) ?
                        DIVA_ISA_LED_A : DIVA_PCI_LED_A;
        else {
                cs->hw.diva.ctrl_reg ^= (DIVA_ISA == cs->subtyp) ?
                        DIVA_ISA_LED_A : DIVA_PCI_LED_A;
                blink = 250;
        }
        if (cs->hw.diva.status & 0xf000)
                cs->hw.diva.ctrl_reg |= (DIVA_ISA == cs->subtyp) ?
                        DIVA_ISA_LED_B : DIVA_PCI_LED_B;
        else if (cs->hw.diva.status & 0x0f00) {
                cs->hw.diva.ctrl_reg ^= (DIVA_ISA == cs->subtyp) ?
                        DIVA_ISA_LED_B : DIVA_PCI_LED_B;
                blink = 500;
        } else
                cs->hw.diva.ctrl_reg &= ~((DIVA_ISA == cs->subtyp) ?
                        DIVA_ISA_LED_B : DIVA_PCI_LED_B);
 
        byteout(cs->hw.diva.ctrl, cs->hw.diva.ctrl_reg);
        if (blink) {
                init_timer(&cs->hw.diva.tl);
                cs->hw.diva.tl.expires = jiffies + ((blink * HZ) / 1000);
                add_timer(&cs->hw.diva.tl);
        }
}
 
static int
Diva_card_msg(struct IsdnCardState *cs, int mt, void *arg)
{
        u_int irq_flag = I4L_IRQ_FLAG;
 
        switch (mt) {
                case CARD_RESET:
                        reset_diva(cs);
                        return(0);
                case CARD_RELEASE:
                        release_io_diva(cs);
                        return(0);
                case CARD_SETIRQ:
                        if (cs->subtyp == DIVA_PCI)
                                irq_flag |= SA_SHIRQ;
                        if (cs->subtyp == DIVA_IPAC_ISA) {
                                return(request_irq(cs->irq, &diva_interrupt_ipac,
                                                irq_flag, "HiSax", cs));
                        } else {
                                return(request_irq(cs->irq, &diva_interrupt,
                                                irq_flag, "HiSax", cs));
                        }
                case CARD_INIT:
                        inithscxisac(cs, 3);
                        return(0);
                case CARD_TEST:
                        return(0);
                case (MDL_REMOVE | REQUEST):
                        cs->hw.diva.status = 0;
                        break;
                case (MDL_ASSIGN | REQUEST):
                        cs->hw.diva.status |= DIVA_ASSIGN;
                        break;
                case MDL_INFO_SETUP:
                        if ((long)arg)
                                cs->hw.diva.status |=  0x0200;
                        else
                                cs->hw.diva.status |=  0x0100;
                        break;
                case MDL_INFO_CONN:
                        if ((long)arg)
                                cs->hw.diva.status |=  0x2000;
                        else
                                cs->hw.diva.status |=  0x1000;
                        break;
                case MDL_INFO_REL:
                        if ((long)arg) {
                                cs->hw.diva.status &=  ~0x2000;
                                cs->hw.diva.status &=  ~0x0200;
                        } else {
                                cs->hw.diva.status &=  ~0x1000;
                                cs->hw.diva.status &=  ~0x0100;
                        }
                        break;
        }
        if (cs->subtyp != DIVA_IPAC_ISA)
                diva_led_handler(cs);
        return(0);
}
 
 
 
static  int pci_index __initdata = 0;
 
__initfunc(int
setup_diva(struct IsdnCard *card))
{
        int bytecnt;
        u_char val;
        struct IsdnCardState *cs = card->cs;
        char tmp[64];
 
        strcpy(tmp, Diva_revision);
        printk(KERN_INFO "HiSax: Eicon.Diehl Diva driver Rev. %s\n", HiSax_getrev(tmp));
        if (cs->typ != ISDN_CTYPE_DIEHLDIVA)
                return(0);
        cs->hw.diva.status = 0;
        if (card->para[1]) {
                cs->hw.diva.ctrl_reg = 0;
                cs->hw.diva.cfg_reg = card->para[1];
                val = readreg(cs->hw.diva.cfg_reg + DIVA_IPAC_ADR,
                        cs->hw.diva.cfg_reg + DIVA_IPAC_DATA, IPAC_ID);
                printk(KERN_INFO "Diva: IPAC version %x\n", val);
                if (val == 1) {
                        cs->subtyp = DIVA_IPAC_ISA;
                        cs->hw.diva.ctrl = 0;
                        cs->hw.diva.isac = card->para[1] + DIVA_IPAC_DATA;
                        cs->hw.diva.hscx = card->para[1] + DIVA_IPAC_DATA;
                        cs->hw.diva.isac_adr = card->para[1] + DIVA_IPAC_ADR;
                        cs->hw.diva.hscx_adr = card->para[1] + DIVA_IPAC_ADR;
                        test_and_set_bit(HW_IPAC, &cs->HW_Flags);
                } else {
                        cs->subtyp = DIVA_ISA;
                        cs->hw.diva.ctrl = card->para[1] + DIVA_ISA_CTRL;
                        cs->hw.diva.isac = card->para[1] + DIVA_ISA_ISAC_DATA;
                        cs->hw.diva.hscx = card->para[1] + DIVA_HSCX_DATA;
                        cs->hw.diva.isac_adr = card->para[1] + DIVA_ISA_ISAC_ADR;
                        cs->hw.diva.hscx_adr = card->para[1] + DIVA_HSCX_ADR;
                }
                cs->irq = card->para[0];
                bytecnt = 8;
        } else {
#if CONFIG_PCI
                u_char pci_bus, pci_device_fn, pci_irq;
                u_int pci_ioaddr;
 
                cs->subtyp = 0;
                for (; pci_index < 0xff; pci_index++) {
                        if (pcibios_find_device(PCI_VENDOR_EICON_DIEHL,
                           PCI_DIVA20_ID, pci_index, &pci_bus, &pci_device_fn)
                           == PCIBIOS_SUCCESSFUL)
                                cs->subtyp = DIVA_PCI;
                        else if (pcibios_find_device(PCI_VENDOR_EICON_DIEHL,
                           PCI_DIVA20_ID, pci_index, &pci_bus, &pci_device_fn)
                           == PCIBIOS_SUCCESSFUL)
                                cs->subtyp = DIVA_PCI;
                        else
                                break;
                        /* get IRQ */
                        pcibios_read_config_byte(pci_bus, pci_device_fn,
                                PCI_INTERRUPT_LINE, &pci_irq);
 
                        /* get IO address */
                        pcibios_read_config_dword(pci_bus, pci_device_fn,
                                PCI_BASE_ADDRESS_2, &pci_ioaddr);
                        if (cs->subtyp)
                                break;
                }
                if (!cs->subtyp) {
                        printk(KERN_WARNING "Diva: No PCI card found\n");
                        return(0);
                }
                pci_index++;
                if (!pci_irq) {
                        printk(KERN_WARNING "Diva: No IRQ for PCI card found\n");
                        return(0);
                }
 
                if (!pci_ioaddr) {
                        printk(KERN_WARNING "Diva: No IO-Adr for PCI card found\n");
                        return(0);
                }
                pci_ioaddr &= ~3; /* remove io/mem flag */
                cs->hw.diva.cfg_reg = pci_ioaddr;
                cs->hw.diva.ctrl = pci_ioaddr + DIVA_PCI_CTRL;
                cs->hw.diva.isac = pci_ioaddr + DIVA_PCI_ISAC_DATA;
                cs->hw.diva.hscx = pci_ioaddr + DIVA_HSCX_DATA;
                cs->hw.diva.isac_adr = pci_ioaddr + DIVA_PCI_ISAC_ADR;
                cs->hw.diva.hscx_adr = pci_ioaddr + DIVA_HSCX_ADR;
                cs->irq = pci_irq;
                bytecnt = 32;
#else
                printk(KERN_WARNING "Diva: cfgreg 0 and NO_PCI_BIOS\n");
                printk(KERN_WARNING "Diva: unable to config DIVA PCI\n");
                return (0);
#endif /* CONFIG_PCI */
        }
 
        printk(KERN_INFO
                "Diva: %s card configured at 0x%x IRQ %d\n",
                (cs->subtyp == DIVA_PCI) ? "PCI" :
                (cs->subtyp == DIVA_ISA) ? "ISA" : "IPAC",
                cs->hw.diva.cfg_reg, cs->irq);
        if (check_region(cs->hw.diva.cfg_reg, bytecnt)) {
                printk(KERN_WARNING
                       "HiSax: %s config port %x-%x already in use\n",
                       CardType[card->typ],
                       cs->hw.diva.cfg_reg,
                       cs->hw.diva.cfg_reg + bytecnt);
                return (0);
        } else {
                request_region(cs->hw.diva.cfg_reg, bytecnt, "diva isdn");
        }
 
        reset_diva(cs);
        cs->BC_Read_Reg  = &ReadHSCX;
        cs->BC_Write_Reg = &WriteHSCX;
        cs->BC_Send_Data = &hscx_fill_fifo;
        cs->cardmsg = &Diva_card_msg;
        if (cs->subtyp == DIVA_IPAC_ISA) {
                cs->readisac  = &ReadISAC_IPAC;
                cs->writeisac = &WriteISAC_IPAC;
                cs->readisacfifo  = &ReadISACfifo_IPAC;
                cs->writeisacfifo = &WriteISACfifo_IPAC;
                val = readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, IPAC_ID);
                printk(KERN_INFO "Diva: IPAC version %x\n", val);
        } else {
                cs->hw.diva.tl.function = (void *) diva_led_handler;
                cs->hw.diva.tl.data = (long) cs;
                init_timer(&cs->hw.diva.tl);
                cs->readisac  = &ReadISAC;
                cs->writeisac = &WriteISAC;
                cs->readisacfifo  = &ReadISACfifo;
                cs->writeisacfifo = &WriteISACfifo;
                ISACVersion(cs, "Diva:");
                if (HscxVersion(cs, "Diva:")) {
                        printk(KERN_WARNING
                       "Diva: wrong HSCX versions check IO address\n");
                        release_io_diva(cs);
                        return (0);
                }
        }
        return (1);
}

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[/] [or1k/] [tags/] [before_ORP/] [uclinux/] [uClinux-2.0.x/] [drivers/] [isdn/] [hisax/] [diva.c] - Blame information for rev 1765

Line No.	Rev	Author	Line
1	199	simons	`/* $Id: diva.c,v 1.1.1.1 2001-09-10 07:44:18 simons Exp $`
2
3			`* diva.c low level stuff for Eicon.Diehl Diva Family ISDN cards`
4			`*`
5			`* Author Karsten Keil (keil@isdn4linux.de)`
6			`*`
7			`* Thanks to Eicon Technology Diehl GmbH & Co. oHG for documents and informations`
8			`*`
9			`*`
10			`* $Log: not supported by cvs2svn $`
11			`* Revision 1.1.1.1 2001/07/02 17:58:32 simons`
12			`* Initial revision`
13			`*`
14			`* Revision 1.1.2.11 1998/11/05 21:13:51 keil`
15			`* minor fixes`
16			`*`
17			`* Revision 1.1.2.10 1998/11/03 00:06:10 keil`
18			`* certification related changes`
19			`* fixed logging for smaller stack use`
20			`*`
21			`* Revision 1.1.2.9 1998/06/27 21:58:34 keil`
22			`* fix release of diva 2.01`
23			`*`
24			`* Revision 1.1.2.8 1998/05/27 18:05:11 keil`
25			`* HiSax 3.0`
26			`*`
27			`* Revision 1.1.2.7 1998/04/24 13:37:13 keil`
28			`* Support for DIVA 2.01 IPAC`
29			`*`
30			`* Revision 1.1.2.6 1998/04/08 22:05:21 keil`
31			`* Forgot PCI fix`
32			`*`
33			`* Revision 1.1.2.5 1998/04/08 21:49:27 keil`
34			`* New init; fix PCI for more as one card`
35			`*`
36			`* Revision 1.1.2.4 1998/03/07 23:15:14 tsbogend`
37			`* made HiSax working on Linux/Alpha`
38			`*`
39			`* Revision 1.1.2.3 1998/01/27 22:37:35 keil`
40			`* fast io`
41			`*`
42			`* Revision 1.1.2.2 1997/11/15 18:50:44 keil`
43			`* new common init function`
44			`*`
45			`* Revision 1.1.2.1 1997/10/17 22:10:36 keil`
46			`* new files on 2.0`
47			`*`
48			`* Revision 1.1 1997/09/18 17:11:20 keil`
49			`* first version`
50			`*`
51			`*`
52			`*/`
53
54			`#define __NO_VERSION__`
55			`#include <linux/config.h>`
56			`#include "hisax.h"`
57			`#include "isac.h"`
58			`#include "hscx.h"`
59			`#include "ipac.h"`
60			`#include "isdnl1.h"`
61			`#include <linux/pci.h>`
62			`#include <linux/bios32.h>`
63
64			`extern const char *CardType[];`
65
66			`const char *Diva_revision = "$Revision: 1.1.1.1 $";`
67
68			`#define byteout(addr,val) outb(val,addr)`
69			`#define bytein(addr) inb(addr)`
70
71			`#define DIVA_HSCX_DATA 0`
72			`#define DIVA_HSCX_ADR 4`
73			`#define DIVA_ISA_ISAC_DATA 2`
74			`#define DIVA_ISA_ISAC_ADR 6`
75			`#define DIVA_ISA_CTRL 7`
76			`#define DIVA_IPAC_ADR 0`
77			`#define DIVA_IPAC_DATA 1`
78
79			`#define DIVA_PCI_ISAC_DATA 8`
80			`#define DIVA_PCI_ISAC_ADR 0xc`
81			`#define DIVA_PCI_CTRL 0x10`
82
83			`/* SUB Types */`
84			`#define DIVA_ISA 1`
85			`#define DIVA_PCI 2`
86			`#define DIVA_IPAC_ISA 3`
87
88			`/* PCI stuff */`
89			`#define PCI_VENDOR_EICON_DIEHL 0x1133`
90			`#define PCI_DIVA20PRO_ID 0xe001`
91			`#define PCI_DIVA20_ID 0xe002`
92			`#define PCI_DIVA20PRO_U_ID 0xe003`
93			`#define PCI_DIVA20_U_ID 0xe004`
94
95			`/* CTRL (Read) */`
96			`#define DIVA_IRQ_STAT 0x01`
97			`#define DIVA_EEPROM_SDA 0x02`
98			`/* CTRL (Write) */`
99			`#define DIVA_IRQ_REQ 0x01`
100			`#define DIVA_RESET 0x08`
101			`#define DIVA_EEPROM_CLK 0x40`
102			`#define DIVA_PCI_LED_A 0x10`
103			`#define DIVA_PCI_LED_B 0x20`
104			`#define DIVA_ISA_LED_A 0x20`
105			`#define DIVA_ISA_LED_B 0x40`
106			`#define DIVA_IRQ_CLR 0x80`
107
108			`static inline u_char`
109			`readreg(unsigned int ale, unsigned int adr, u_char off)`
110			`{`
111			`register u_char ret;`
112			`long flags;`
113
114			`save_flags(flags);`
115			`cli();`
116			`byteout(ale, off);`
117			`ret = bytein(adr);`
118			`restore_flags(flags);`
119			`return (ret);`
120			`}`
121
122			`static inline void`
123			`readfifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size)`
124			`{`
125			`/* fifo read without cli because it's allready done */`
126
127			`byteout(ale, off);`
128			`insb(adr, data, size);`
129			`}`
130
131
132			`static inline void`
133			`writereg(unsigned int ale, unsigned int adr, u_char off, u_char data)`
134			`{`
135			`long flags;`
136
137			`save_flags(flags);`
138			`cli();`
139			`byteout(ale, off);`
140			`byteout(adr, data);`
141			`restore_flags(flags);`
142			`}`
143
144			`static inline void`
145			`writefifo(unsigned int ale, unsigned int adr, u_char off, u_char *data, int size)`
146			`{`
147			`/* fifo write without cli because it's allready done */`
148			`byteout(ale, off);`
149			`outsb(adr, data, size);`
150			`}`
151
152			`/* Interface functions */`
153
154			`static u_char`
155			`ReadISAC(struct IsdnCardState *cs, u_char offset)`
156			`{`
157			`return(readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, offset));`
158			`}`
159
160			`static void`
161			`WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)`
162			`{`
163			`writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, offset, value);`
164			`}`
165
166			`static void`
167			`ReadISACfifo(struct IsdnCardState cs, u_char data, int size)`
168			`{`
169			`readfifo(cs->hw.diva.isac_adr, cs->hw.diva.isac, 0, data, size);`
170			`}`
171
172			`static void`
173			`WriteISACfifo(struct IsdnCardState cs, u_char data, int size)`
174			`{`
175			`writefifo(cs->hw.diva.isac_adr, cs->hw.diva.isac, 0, data, size);`
176			`}`
177
178			`static u_char`
179			`ReadISAC_IPAC(struct IsdnCardState *cs, u_char offset)`
180			`{`
181			`return (readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, offset+0x80));`
182			`}`
183
184			`static void`
185			`WriteISAC_IPAC(struct IsdnCardState *cs, u_char offset, u_char value)`
186			`{`
187			`writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, offset\|0x80, value);`
188			`}`
189
190			`static void`
191			`ReadISACfifo_IPAC(struct IsdnCardState cs, u_char data, int size)`
192			`{`
193			`readfifo(cs->hw.diva.isac_adr, cs->hw.diva.isac, 0x80, data, size);`
194			`}`
195
196			`static void`
197			`WriteISACfifo_IPAC(struct IsdnCardState cs, u_char data, int size)`
198			`{`
199			`writefifo(cs->hw.diva.isac_adr, cs->hw.diva.isac, 0x80, data, size);`
200			`}`
201
202			`static u_char`
203			`ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset)`
204			`{`
205			`return(readreg(cs->hw.diva.hscx_adr,`
206			`cs->hw.diva.hscx, offset + (hscx ? 0x40 : 0)));`
207			`}`
208
209			`static void`
210			`WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value)`
211			`{`
212			`writereg(cs->hw.diva.hscx_adr,`
213			`cs->hw.diva.hscx, offset + (hscx ? 0x40 : 0), value);`
214			`}`
215
216			`/*`
217			`* fast interrupt HSCX stuff goes here`
218			`*/`
219
220			`#define READHSCX(cs, nr, reg) readreg(cs->hw.diva.hscx_adr, \`
221			`cs->hw.diva.hscx, reg + (nr ? 0x40 : 0))`
222			`#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.diva.hscx_adr, \`
223			`cs->hw.diva.hscx, reg + (nr ? 0x40 : 0), data)`
224
225			`#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.diva.hscx_adr, \`
226			`cs->hw.diva.hscx, (nr ? 0x40 : 0), ptr, cnt)`
227
228			`#define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.diva.hscx_adr, \`
229			`cs->hw.diva.hscx, (nr ? 0x40 : 0), ptr, cnt)`
230
231			`#include "hscx_irq.c"`
232
233			`static void`
234			`diva_interrupt(int intno, void dev_id, struct pt_regs regs)`
235			`{`
236			`struct IsdnCardState *cs = dev_id;`
237			`u_char val, sval, stat = 0;`
238			`int cnt=8;`
239
240			`if (!cs) {`
241			`printk(KERN_WARNING "Diva: Spurious interrupt!\n");`
242			`return;`
243			`}`
244			`while (((sval = bytein(cs->hw.diva.ctrl)) & DIVA_IRQ_REQ) && cnt) {`
245			`val = readreg(cs->hw.diva.hscx_adr, cs->hw.diva.hscx, HSCX_ISTA + 0x40);`
246			`if (val) {`
247			`hscx_int_main(cs, val);`
248			`stat \|= 1;`
249			`}`
250			`val = readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, ISAC_ISTA);`
251			`if (val) {`
252			`isac_interrupt(cs, val);`
253			`stat \|= 2;`
254			`}`
255			`cnt--;`
256			`}`
257			`if (!cnt)`
258			`printk(KERN_WARNING "Diva: IRQ LOOP\n");`
259			`if (stat & 1) {`
260			`writereg(cs->hw.diva.hscx_adr, cs->hw.diva.hscx, HSCX_MASK, 0xFF);`
261			`writereg(cs->hw.diva.hscx_adr, cs->hw.diva.hscx, HSCX_MASK + 0x40, 0xFF);`
262			`writereg(cs->hw.diva.hscx_adr, cs->hw.diva.hscx, HSCX_MASK, 0x0);`
263			`writereg(cs->hw.diva.hscx_adr, cs->hw.diva.hscx, HSCX_MASK + 0x40, 0x0);`
264			`}`
265			`if (stat & 2) {`
266			`writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, ISAC_MASK, 0xFF);`
267			`writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, ISAC_MASK, 0x0);`
268			`}`
269			`}`
270
271			`static void`
272			`diva_interrupt_ipac(int intno, void dev_id, struct pt_regs regs)`
273			`{`
274			`struct IsdnCardState *cs = dev_id;`
275			`u_char ista,val;`
276			`int icnt=20;`
277
278			`if (!cs) {`
279			`printk(KERN_WARNING "Diva: Spurious interrupt!\n");`
280			`return;`
281			`}`
282			`ista = readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, IPAC_ISTA);`
283			`Start_IPAC:`
284			`if (cs->debug & L1_DEB_IPAC)`
285			`debugl1(cs, "IPAC ISTA %02X", ista);`
286			`if (ista & 0x0f) {`
287			`val = readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, HSCX_ISTA + 0x40);`
288			`if (ista & 0x01)`
289			`val \|= 0x01;`
290			`if (ista & 0x04)`
291			`val \|= 0x02;`
292			`if (ista & 0x08)`
293			`val \|= 0x04;`
294			`if (val)`
295			`hscx_int_main(cs, val);`
296			`}`
297			`if (ista & 0x20) {`
298			`val = 0xfe & readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, ISAC_ISTA + 0x80);`
299			`if (val) {`
300			`isac_interrupt(cs, val);`
301			`}`
302			`}`
303			`if (ista & 0x10) {`
304			`val = 0x01;`
305			`isac_interrupt(cs, val);`
306			`}`
307			`ista = readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, IPAC_ISTA);`
308			`if ((ista & 0x3f) && icnt) {`
309			`icnt--;`
310			`goto Start_IPAC;`
311			`}`
312			`if (!icnt)`
313			`printk(KERN_WARNING "DIVA IPAC IRQ LOOP\n");`
314			`writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, IPAC_MASK, 0xFF);`
315			`writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, IPAC_MASK, 0xC0);`
316			`}`
317
318
319			`void`
320			`release_io_diva(struct IsdnCardState *cs)`
321			`{`
322			`int bytecnt;`
323
324			`if (cs->subtyp != DIVA_IPAC_ISA) {`
325			`del_timer(&cs->hw.diva.tl);`
326			`if (cs->hw.diva.cfg_reg)`
327			`byteout(cs->hw.diva.ctrl, 0); /* LED off, Reset */`
328			`}`
329			`if ((cs->subtyp == DIVA_ISA) \|\| (cs->subtyp == DIVA_IPAC_ISA))`
330			`bytecnt = 8;`
331			`else`
332			`bytecnt = 32;`
333			`if (cs->hw.diva.cfg_reg) {`
334			`release_region(cs->hw.diva.cfg_reg, bytecnt);`
335			`}`
336			`}`
337
338			`static void`
339			`reset_diva(struct IsdnCardState *cs)`
340			`{`
341			`long flags;`
342
343			`save_flags(flags);`
344			`sti();`
345			`if (cs->subtyp == DIVA_IPAC_ISA) {`
346			`writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, IPAC_POTA2, 0x20);`
347			`current->state = TASK_INTERRUPTIBLE;`
348			`current->timeout = jiffies + (10 * HZ) / 1000; /* Timeout 10ms */`
349			`schedule();`
350			`writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, IPAC_POTA2, 0x00);`
351			`current->state = TASK_INTERRUPTIBLE;`
352			`current->timeout = jiffies + (10 * HZ) / 1000; /* Timeout 10ms */`
353			`schedule();`
354			`writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, IPAC_MASK, 0xc0);`
355			`schedule();`
356			`} else {`
357			`cs->hw.diva.ctrl_reg = 0; /* Reset On */`
358			`byteout(cs->hw.diva.ctrl, cs->hw.diva.ctrl_reg);`
359			`current->state = TASK_INTERRUPTIBLE;`
360			`current->timeout = jiffies + (10 * HZ) / 1000; /* Timeout 10ms */`
361			`schedule();`
362			`cs->hw.diva.ctrl_reg \|= DIVA_RESET; /* Reset Off */`
363			`byteout(cs->hw.diva.ctrl, cs->hw.diva.ctrl_reg);`
364			`current->state = TASK_INTERRUPTIBLE;`
365			`current->timeout = jiffies + (10 * HZ) / 1000; /* Timeout 10ms */`
366			`schedule();`
367			`if (cs->subtyp == DIVA_ISA)`
368			`cs->hw.diva.ctrl_reg \|= DIVA_ISA_LED_A;`
369			`else`
370			`cs->hw.diva.ctrl_reg \|= DIVA_PCI_LED_A;`
371			`byteout(cs->hw.diva.ctrl, cs->hw.diva.ctrl_reg);`
372			`}`
373			`restore_flags(flags);`
374			`}`
375
376			`#define DIVA_ASSIGN 1`
377
378			`static void`
379			`diva_led_handler(struct IsdnCardState *cs)`
380			`{`
381			`int blink = 0;`
382
383			`if (cs->subtyp == DIVA_IPAC_ISA)`
384			`return;`
385			`del_timer(&cs->hw.diva.tl);`
386			`if (cs->hw.diva.status & DIVA_ASSIGN)`
387			`cs->hw.diva.ctrl_reg \|= (DIVA_ISA == cs->subtyp) ?`
388			`DIVA_ISA_LED_A : DIVA_PCI_LED_A;`
389			`else {`
390			`cs->hw.diva.ctrl_reg ^= (DIVA_ISA == cs->subtyp) ?`
391			`DIVA_ISA_LED_A : DIVA_PCI_LED_A;`
392			`blink = 250;`
393			`}`
394			`if (cs->hw.diva.status & 0xf000)`
395			`cs->hw.diva.ctrl_reg \|= (DIVA_ISA == cs->subtyp) ?`
396			`DIVA_ISA_LED_B : DIVA_PCI_LED_B;`
397			`else if (cs->hw.diva.status & 0x0f00) {`
398			`cs->hw.diva.ctrl_reg ^= (DIVA_ISA == cs->subtyp) ?`
399			`DIVA_ISA_LED_B : DIVA_PCI_LED_B;`
400			`blink = 500;`
401			`} else`
402			`cs->hw.diva.ctrl_reg &= ~((DIVA_ISA == cs->subtyp) ?`
403			`DIVA_ISA_LED_B : DIVA_PCI_LED_B);`
404
405			`byteout(cs->hw.diva.ctrl, cs->hw.diva.ctrl_reg);`
406			`if (blink) {`
407			`init_timer(&cs->hw.diva.tl);`
408			`cs->hw.diva.tl.expires = jiffies + ((blink * HZ) / 1000);`
409			`add_timer(&cs->hw.diva.tl);`
410			`}`
411			`}`
412
413			`static int`
414			`Diva_card_msg(struct IsdnCardState cs, int mt, void arg)`
415			`{`
416			`u_int irq_flag = I4L_IRQ_FLAG;`
417
418			`switch (mt) {`
419			`case CARD_RESET:`
420			`reset_diva(cs);`
421			`return(0);`
422			`case CARD_RELEASE:`
423			`release_io_diva(cs);`
424			`return(0);`
425			`case CARD_SETIRQ:`
426			`if (cs->subtyp == DIVA_PCI)`
427			`irq_flag \|= SA_SHIRQ;`
428			`if (cs->subtyp == DIVA_IPAC_ISA) {`
429			`return(request_irq(cs->irq, &diva_interrupt_ipac,`
430			`irq_flag, "HiSax", cs));`
431			`} else {`
432			`return(request_irq(cs->irq, &diva_interrupt,`
433			`irq_flag, "HiSax", cs));`
434			`}`
435			`case CARD_INIT:`
436			`inithscxisac(cs, 3);`
437			`return(0);`
438			`case CARD_TEST:`
439			`return(0);`
440			`case (MDL_REMOVE \| REQUEST):`
441			`cs->hw.diva.status = 0;`
442			`break;`
443			`case (MDL_ASSIGN \| REQUEST):`
444			`cs->hw.diva.status \|= DIVA_ASSIGN;`
445			`break;`
446			`case MDL_INFO_SETUP:`
447			`if ((long)arg)`
448			`cs->hw.diva.status \|= 0x0200;`
449			`else`
450			`cs->hw.diva.status \|= 0x0100;`
451			`break;`
452			`case MDL_INFO_CONN:`
453			`if ((long)arg)`
454			`cs->hw.diva.status \|= 0x2000;`
455			`else`
456			`cs->hw.diva.status \|= 0x1000;`
457			`break;`
458			`case MDL_INFO_REL:`
459			`if ((long)arg) {`
460			`cs->hw.diva.status &= ~0x2000;`
461			`cs->hw.diva.status &= ~0x0200;`
462			`} else {`
463			`cs->hw.diva.status &= ~0x1000;`
464			`cs->hw.diva.status &= ~0x0100;`
465			`}`
466			`break;`
467			`}`
468			`if (cs->subtyp != DIVA_IPAC_ISA)`
469			`diva_led_handler(cs);`
470			`return(0);`
471			`}`
472
473
474
475			`static int pci_index __initdata = 0;`
476
477			`__initfunc(int`
478			`setup_diva(struct IsdnCard *card))`
479			`{`
480			`int bytecnt;`
481			`u_char val;`
482			`struct IsdnCardState *cs = card->cs;`
483			`char tmp[64];`
484
485			`strcpy(tmp, Diva_revision);`
486			`printk(KERN_INFO "HiSax: Eicon.Diehl Diva driver Rev. %s\n", HiSax_getrev(tmp));`
487			`if (cs->typ != ISDN_CTYPE_DIEHLDIVA)`
488			`return(0);`
489			`cs->hw.diva.status = 0;`
490			`if (card->para[1]) {`
491			`cs->hw.diva.ctrl_reg = 0;`
492			`cs->hw.diva.cfg_reg = card->para[1];`
493			`val = readreg(cs->hw.diva.cfg_reg + DIVA_IPAC_ADR,`
494			`cs->hw.diva.cfg_reg + DIVA_IPAC_DATA, IPAC_ID);`
495			`printk(KERN_INFO "Diva: IPAC version %x\n", val);`
496			`if (val == 1) {`
497			`cs->subtyp = DIVA_IPAC_ISA;`
498			`cs->hw.diva.ctrl = 0;`
499			`cs->hw.diva.isac = card->para[1] + DIVA_IPAC_DATA;`
500			`cs->hw.diva.hscx = card->para[1] + DIVA_IPAC_DATA;`
501			`cs->hw.diva.isac_adr = card->para[1] + DIVA_IPAC_ADR;`
502			`cs->hw.diva.hscx_adr = card->para[1] + DIVA_IPAC_ADR;`
503			`test_and_set_bit(HW_IPAC, &cs->HW_Flags);`
504			`} else {`
505			`cs->subtyp = DIVA_ISA;`
506			`cs->hw.diva.ctrl = card->para[1] + DIVA_ISA_CTRL;`
507			`cs->hw.diva.isac = card->para[1] + DIVA_ISA_ISAC_DATA;`
508			`cs->hw.diva.hscx = card->para[1] + DIVA_HSCX_DATA;`
509			`cs->hw.diva.isac_adr = card->para[1] + DIVA_ISA_ISAC_ADR;`
510			`cs->hw.diva.hscx_adr = card->para[1] + DIVA_HSCX_ADR;`
511			`}`
512			`cs->irq = card->para[0];`
513			`bytecnt = 8;`
514			`} else {`
515			`#if CONFIG_PCI`
516			`u_char pci_bus, pci_device_fn, pci_irq;`
517			`u_int pci_ioaddr;`
518
519			`cs->subtyp = 0;`
520			`for (; pci_index < 0xff; pci_index++) {`
521			`if (pcibios_find_device(PCI_VENDOR_EICON_DIEHL,`
522			`PCI_DIVA20_ID, pci_index, &pci_bus, &pci_device_fn)`
523			`== PCIBIOS_SUCCESSFUL)`
524			`cs->subtyp = DIVA_PCI;`
525			`else if (pcibios_find_device(PCI_VENDOR_EICON_DIEHL,`
526			`PCI_DIVA20_ID, pci_index, &pci_bus, &pci_device_fn)`
527			`== PCIBIOS_SUCCESSFUL)`
528			`cs->subtyp = DIVA_PCI;`
529			`else`
530			`break;`
531			`/* get IRQ */`
532			`pcibios_read_config_byte(pci_bus, pci_device_fn,`
533			`PCI_INTERRUPT_LINE, &pci_irq);`
534
535			`/* get IO address */`
536			`pcibios_read_config_dword(pci_bus, pci_device_fn,`
537			`PCI_BASE_ADDRESS_2, &pci_ioaddr);`
538			`if (cs->subtyp)`
539			`break;`
540			`}`
541			`if (!cs->subtyp) {`
542			`printk(KERN_WARNING "Diva: No PCI card found\n");`
543			`return(0);`
544			`}`
545			`pci_index++;`
546			`if (!pci_irq) {`
547			`printk(KERN_WARNING "Diva: No IRQ for PCI card found\n");`
548			`return(0);`
549			`}`
550
551			`if (!pci_ioaddr) {`
552			`printk(KERN_WARNING "Diva: No IO-Adr for PCI card found\n");`
553			`return(0);`
554			`}`
555			`pci_ioaddr &= ~3; /* remove io/mem flag */`
556			`cs->hw.diva.cfg_reg = pci_ioaddr;`
557			`cs->hw.diva.ctrl = pci_ioaddr + DIVA_PCI_CTRL;`
558			`cs->hw.diva.isac = pci_ioaddr + DIVA_PCI_ISAC_DATA;`
559			`cs->hw.diva.hscx = pci_ioaddr + DIVA_HSCX_DATA;`
560			`cs->hw.diva.isac_adr = pci_ioaddr + DIVA_PCI_ISAC_ADR;`
561			`cs->hw.diva.hscx_adr = pci_ioaddr + DIVA_HSCX_ADR;`
562			`cs->irq = pci_irq;`
563			`bytecnt = 32;`
564			`#else`
565			`printk(KERN_WARNING "Diva: cfgreg 0 and NO_PCI_BIOS\n");`
566			`printk(KERN_WARNING "Diva: unable to config DIVA PCI\n");`
567			`return (0);`
568			`#endif /* CONFIG_PCI */`
569			`}`
570
571			`printk(KERN_INFO`
572			`"Diva: %s card configured at 0x%x IRQ %d\n",`
573			`(cs->subtyp == DIVA_PCI) ? "PCI" :`
574			`(cs->subtyp == DIVA_ISA) ? "ISA" : "IPAC",`
575			`cs->hw.diva.cfg_reg, cs->irq);`
576			`if (check_region(cs->hw.diva.cfg_reg, bytecnt)) {`
577			`printk(KERN_WARNING`
578			`"HiSax: %s config port %x-%x already in use\n",`
579			`CardType[card->typ],`
580			`cs->hw.diva.cfg_reg,`
581			`cs->hw.diva.cfg_reg + bytecnt);`
582			`return (0);`
583			`} else {`
584			`request_region(cs->hw.diva.cfg_reg, bytecnt, "diva isdn");`
585			`}`
586
587			`reset_diva(cs);`
588			`cs->BC_Read_Reg = &ReadHSCX;`
589			`cs->BC_Write_Reg = &WriteHSCX;`
590			`cs->BC_Send_Data = &hscx_fill_fifo;`
591			`cs->cardmsg = &Diva_card_msg;`
592			`if (cs->subtyp == DIVA_IPAC_ISA) {`
593			`cs->readisac = &ReadISAC_IPAC;`
594			`cs->writeisac = &WriteISAC_IPAC;`
595			`cs->readisacfifo = &ReadISACfifo_IPAC;`
596			`cs->writeisacfifo = &WriteISACfifo_IPAC;`
597			`val = readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, IPAC_ID);`
598			`printk(KERN_INFO "Diva: IPAC version %x\n", val);`
599			`} else {`
600			`cs->hw.diva.tl.function = (void *) diva_led_handler;`
601			`cs->hw.diva.tl.data = (long) cs;`
602			`init_timer(&cs->hw.diva.tl);`
603			`cs->readisac = &ReadISAC;`
604			`cs->writeisac = &WriteISAC;`
605			`cs->readisacfifo = &ReadISACfifo;`
606			`cs->writeisacfifo = &WriteISACfifo;`
607			`ISACVersion(cs, "Diva:");`
608			`if (HscxVersion(cs, "Diva:")) {`
609			`printk(KERN_WARNING`
610			`"Diva: wrong HSCX versions check IO address\n");`
611			`release_io_diva(cs);`
612			`return (0);`
613			`}`
614			`}`
615			`return (1);`
616			`}`