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[/] [or1k/] [tags/] [final_interface/] [gdb-5.0/] [sim/] [m32r/] [sim-if.c] - Blame information for rev 1765

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1 106 markom
/* Main simulator entry points specific to the M32R.
2
   Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
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   Contributed by Cygnus Support.
4
 
5
This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
9
 
10
This program is distributed in the hope that it will be useful,
11
but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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GNU General Public License for more details.
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15
You should have received a copy of the GNU General Public License along
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with this program; if not, write to the Free Software Foundation, Inc.,
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59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
18
 
19
#include "sim-main.h"
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#include "sim-options.h"
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#include "libiberty.h"
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#include "bfd.h"
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24
#ifdef HAVE_STRING_H
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#include <string.h>
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#else
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#ifdef HAVE_STRINGS_H
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#include <strings.h>
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#endif
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#endif
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#ifdef HAVE_STDLIB_H
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#include <stdlib.h>
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#endif
34
 
35
static void free_state (SIM_DESC);
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static void print_m32r_misc_cpu (SIM_CPU *cpu, int verbose);
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/* Records simulator descriptor so utilities like m32r_dump_regs can be
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   called from gdb.  */
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SIM_DESC current_state;
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42
/* Cover function of sim_state_free to free the cpu buffers as well.  */
43
 
44
static void
45
free_state (SIM_DESC sd)
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{
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  if (STATE_MODULES (sd) != NULL)
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    sim_module_uninstall (sd);
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  sim_cpu_free_all (sd);
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  sim_state_free (sd);
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}
52
 
53
/* Create an instance of the simulator.  */
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55
SIM_DESC
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sim_open (kind, callback, abfd, argv)
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     SIM_OPEN_KIND kind;
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     host_callback *callback;
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     struct _bfd *abfd;
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     char **argv;
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{
62
  SIM_DESC sd = sim_state_alloc (kind, callback);
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  char c;
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  int i;
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66
  /* The cpu data is kept in a separately allocated chunk of memory.  */
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  if (sim_cpu_alloc_all (sd, 1, cgen_cpu_max_extra_bytes ()) != SIM_RC_OK)
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    {
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      free_state (sd);
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      return 0;
71
    }
72
 
73
#if 0 /* FIXME: pc is in mach-specific struct */
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  /* FIXME: watchpoints code shouldn't need this */
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  {
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    SIM_CPU *current_cpu = STATE_CPU (sd, 0);
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    STATE_WATCHPOINTS (sd)->pc = &(PC);
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    STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC);
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  }
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#endif
81
 
82
  if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
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    {
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      free_state (sd);
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      return 0;
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    }
87
 
88
#ifdef HAVE_DV_SOCKSER /* FIXME: was done differently before */
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  if (dv_sockser_install (sd) != SIM_RC_OK)
90
    {
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      free_state (sd);
92
      return 0;
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    }
94
#endif
95
 
96
#if 0 /* FIXME: 'twould be nice if we could do this */
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  /* These options override any module options.
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     Obviously ambiguity should be avoided, however the caller may wish to
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     augment the meaning of an option.  */
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  if (extra_options != NULL)
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    sim_add_option_table (sd, extra_options);
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#endif
103
 
104
  /* getopt will print the error message so we just have to exit if this fails.
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     FIXME: Hmmm...  in the case of gdb we need getopt to call
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     print_filtered.  */
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  if (sim_parse_args (sd, argv) != SIM_RC_OK)
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    {
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      free_state (sd);
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      return 0;
111
    }
112
 
113
  /* Allocate a handler for the control registers and other devices
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     if no memory for that range has been allocated by the user.
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     All are allocated in one chunk to keep things from being
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     unnecessarily complicated.  */
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  if (sim_core_read_buffer (sd, NULL, read_map, &c, M32R_DEVICE_ADDR, 1) == 0)
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    sim_core_attach (sd, NULL,
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120
                     access_read_write,
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                     M32R_DEVICE_ADDR, M32R_DEVICE_LEN /*nr_bytes*/,
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124
                     &m32r_devices,
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                     NULL /*buffer*/);
126
 
127
  /* Allocate core managed memory if none specified by user.
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     Use address 4 here in case the user wanted address 0 unmapped.  */
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  if (sim_core_read_buffer (sd, NULL, read_map, &c, 4, 1) == 0)
130
    sim_do_commandf (sd, "memory region 0,0x%x", M32R_DEFAULT_MEM_SIZE);
131
 
132
  /* check for/establish the reference program image */
133
  if (sim_analyze_program (sd,
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                           (STATE_PROG_ARGV (sd) != NULL
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                            ? *STATE_PROG_ARGV (sd)
136
                            : NULL),
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                           abfd) != SIM_RC_OK)
138
    {
139
      free_state (sd);
140
      return 0;
141
    }
142
 
143
  /* Establish any remaining configuration options.  */
144
  if (sim_config (sd) != SIM_RC_OK)
145
    {
146
      free_state (sd);
147
      return 0;
148
    }
149
 
150
  if (sim_post_argv_init (sd) != SIM_RC_OK)
151
    {
152
      free_state (sd);
153
      return 0;
154
    }
155
 
156
  /* Open a copy of the cpu descriptor table.  */
157
  {
158
    CGEN_CPU_DESC cd = m32r_cgen_cpu_open_1 (STATE_ARCHITECTURE (sd)->printable_name,
159
                                             CGEN_ENDIAN_BIG);
160
    for (i = 0; i < MAX_NR_PROCESSORS; ++i)
161
      {
162
        SIM_CPU *cpu = STATE_CPU (sd, i);
163
        CPU_CPU_DESC (cpu) = cd;
164
        CPU_DISASSEMBLER (cpu) = sim_cgen_disassemble_insn;
165
      }
166
    m32r_cgen_init_dis (cd);
167
  }
168
 
169
  /* Initialize various cgen things not done by common framework.
170
     Must be done after m32r_cgen_cpu_open.  */
171
  cgen_init (sd);
172
 
173
  for (c = 0; c < MAX_NR_PROCESSORS; ++c)
174
    {
175
      /* Only needed for profiling, but the structure member is small.  */
176
      memset (CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i)), 0,
177
              sizeof (* CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i))));
178
      /* Hook in callback for reporting these stats */
179
      PROFILE_INFO_CPU_CALLBACK (CPU_PROFILE_DATA (STATE_CPU (sd, i)))
180
        = print_m32r_misc_cpu;
181
    }
182
 
183
  /* Store in a global so things like sparc32_dump_regs can be invoked
184
     from the gdb command line.  */
185
  current_state = sd;
186
 
187
  return sd;
188
}
189
 
190
void
191
sim_close (sd, quitting)
192
     SIM_DESC sd;
193
     int quitting;
194
{
195
  m32r_cgen_cpu_close (CPU_CPU_DESC (STATE_CPU (sd, 0)));
196
  sim_module_uninstall (sd);
197
}
198
 
199
SIM_RC
200
sim_create_inferior (sd, abfd, argv, envp)
201
     SIM_DESC sd;
202
     struct _bfd *abfd;
203
     char **argv;
204
     char **envp;
205
{
206
  SIM_CPU *current_cpu = STATE_CPU (sd, 0);
207
  SIM_ADDR addr;
208
 
209
  if (abfd != NULL)
210
    addr = bfd_get_start_address (abfd);
211
  else
212
    addr = 0;
213
  sim_pc_set (current_cpu, addr);
214
 
215
#if 0
216
  STATE_ARGV (sd) = sim_copy_argv (argv);
217
  STATE_ENVP (sd) = sim_copy_argv (envp);
218
#endif
219
 
220
  return SIM_RC_OK;
221
}
222
 
223
/* PROFILE_CPU_CALLBACK */
224
 
225
static void
226
print_m32r_misc_cpu (SIM_CPU *cpu, int verbose)
227
{
228
  SIM_DESC sd = CPU_STATE (cpu);
229
  char buf[20];
230
 
231
  if (CPU_PROFILE_FLAGS (cpu) [PROFILE_INSN_IDX])
232
    {
233
      sim_io_printf (sd, "Miscellaneous Statistics\n\n");
234
      sim_io_printf (sd, "  %-*s %s\n\n",
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                     PROFILE_LABEL_WIDTH, "Fill nops:",
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                     sim_add_commas (buf, sizeof (buf),
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                                     CPU_M32R_MISC_PROFILE (cpu)->fillnop_count));
238
      if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_m32rx)
239
        sim_io_printf (sd, "  %-*s %s\n\n",
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                       PROFILE_LABEL_WIDTH, "Parallel insns:",
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                       sim_add_commas (buf, sizeof (buf),
242
                                       CPU_M32R_MISC_PROFILE (cpu)->parallel_count));
243
    }
244
}
245
 
246
void
247
sim_do_command (sd, cmd)
248
     SIM_DESC sd;
249
     char *cmd;
250
{
251
  char **argv;
252
 
253
  if (cmd == NULL)
254
    return;
255
 
256
  argv = buildargv (cmd);
257
 
258
  if (argv[0] != NULL
259
      && strcasecmp (argv[0], "info") == 0
260
      && argv[1] != NULL
261
      && strncasecmp (argv[1], "reg", 3) == 0)
262
    {
263
      SI val;
264
 
265
      /* We only support printing bbpsw,bbpc here as there is no equivalent
266
         functionality in gdb.  */
267
      if (argv[2] == NULL)
268
        sim_io_eprintf (sd, "Missing register in `%s'\n", cmd);
269
      else if (argv[3] != NULL)
270
        sim_io_eprintf (sd, "Too many arguments in `%s'\n", cmd);
271
      else if (strcasecmp (argv[2], "bbpsw") == 0)
272
        {
273
          val = a_m32r_h_cr_get (STATE_CPU (sd, 0), H_CR_BBPSW);
274
          sim_io_printf (sd, "bbpsw 0x%x %d\n", val, val);
275
        }
276
      else if (strcasecmp (argv[2], "bbpc") == 0)
277
        {
278
          val = a_m32r_h_cr_get (STATE_CPU (sd, 0), H_CR_BBPC);
279
          sim_io_printf (sd, "bbpc 0x%x %d\n", val, val);
280
        }
281
      else
282
        sim_io_eprintf (sd, "Printing of register `%s' not supported with `sim info'\n",
283
                        argv[2]);
284
    }
285
  else
286
    {
287
      if (sim_args_command (sd, cmd) != SIM_RC_OK)
288
        sim_io_eprintf (sd, "Unknown sim command `%s'\n", cmd);
289
    }
290
 
291
  freeargv (argv);
292
}

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