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106 |
markom |
1999-09-15 Doug Evans
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| 2 |
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* sim/arm/b.cgs: New testcase.
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| 4 |
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* sim/arm/bic.cgs: New testcase.
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| 5 |
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* sim/arm/bl.cgs: New testcase.
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| 6 |
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| 7 |
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Thu Sep 2 18:15:53 1999 Andrew Cagney
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* configure: Regenerated to track ../common/aclocal.m4 changes.
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| 11 |
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1999-08-30 Doug Evans
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| 13 |
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* lib/sim-defs.exp (run_sim_test): Rename all_machs arg to
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| 14 |
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requested_machs, now is list of machs to run tests for.
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| 15 |
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Delete locals AS,ASFLAGS,LD,LDFLAGS. Use target_assemble
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and target_link instead.
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| 17 |
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| 18 |
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1999-04-21 Doug Evans
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| 20 |
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* sim/m32r/nop.cgs: Add missing nop insn.
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| 21 |
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| 22 |
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Mon Mar 22 13:28:56 1999 Dave Brolley
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| 23 |
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| 24 |
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* sim/fr30/stb.cgs: Correct for unaligned access.
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| 25 |
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* sim/fr30/sth.cgs: Correct for unaligned access.
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| 26 |
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* sim/fr30/ldub.cgs: Fix typo: lduh->ldub. Correct
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| 27 |
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for unaligned access.
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| 28 |
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* sim/fr30/and.cgs: Test unaligned access.
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| 29 |
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| 30 |
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Fri Feb 5 12:41:11 1999 Doug Evans
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| 32 |
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* lib/sim-defs.exp (sim_run): Print simulator arguments log message.
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| 33 |
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| 34 |
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1999-01-05 Doug Evans
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| 35 |
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* lib/sim-defs.exp (run_sim_test): New arg all_machs.
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| 37 |
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* sim/fr30/allinsn.exp: Update.
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| 38 |
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* sim/fr30/misc.exp: Update.
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| 39 |
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* sim/m32r/allinsn.exp: Update.
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| 40 |
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* sim/m32r/misc.exp: Update.
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| 41 |
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| 42 |
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Fri Dec 18 17:19:34 1998 Dave Brolley
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| 43 |
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| 44 |
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* sim/fr30/ldres.cgs: New testcase.
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| 45 |
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* sim/fr30/copld.cgs: New testcase.
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| 46 |
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* sim/fr30/copst.cgs: New testcase.
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| 47 |
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* sim/fr30/copsv.cgs: New testcase.
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| 48 |
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* sim/fr30/nop.cgs: New testcase.
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| 49 |
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* sim/fr30/andccr.cgs: New testcase.
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| 50 |
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* sim/fr30/orccr.cgs: New testcase.
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| 51 |
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* sim/fr30/addsp.cgs: New testcase.
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| 52 |
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* sim/fr30/stilm.cgs: New testcase.
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| 53 |
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* sim/fr30/extsb.cgs: New testcase.
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| 54 |
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* sim/fr30/extub.cgs: New testcase.
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| 55 |
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* sim/fr30/extsh.cgs: New testcase.
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| 56 |
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* sim/fr30/extuh.cgs: New testcase.
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| 57 |
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* sim/fr30/enter.cgs: New testcase.
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| 58 |
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* sim/fr30/leave.cgs: New testcase.
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| 59 |
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* sim/fr30/xchb.cgs: New testcase.
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| 60 |
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* sim/fr30/dmovb.cgs: New testcase.
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| 61 |
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* sim/fr30/dmov.cgs: New testcase.
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| 62 |
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* sim/fr30/dmovh.cgs: New testcase.
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| 63 |
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| 64 |
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Thu Dec 17 17:18:43 1998 Dave Brolley
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| 66 |
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* sim/fr30/testutils.inc (take_branch{_d},no_branch{_d}): New macros.
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| 67 |
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* sim/fr30/ret.cgs: Add tests fir ret:d.
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| 68 |
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* sim/fr30/inte.cgs: New testcase.
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| 69 |
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* sim/fr30/reti.cgs: New testcase.
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| 70 |
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* sim/fr30/bra.cgs: New testcase.
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| 71 |
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* sim/fr30/bno.cgs: New testcase.
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| 72 |
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* sim/fr30/beq.cgs: New testcase.
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| 73 |
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* sim/fr30/bne.cgs: New testcase.
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| 74 |
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* sim/fr30/bc.cgs: New testcase.
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| 75 |
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* sim/fr30/bnc.cgs: New testcase.
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| 76 |
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* sim/fr30/bn.cgs: New testcase.
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| 77 |
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* sim/fr30/bp.cgs: New testcase.
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| 78 |
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* sim/fr30/bv.cgs: New testcase.
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| 79 |
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* sim/fr30/bnv.cgs: New testcase.
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| 80 |
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* sim/fr30/blt.cgs: New testcase.
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| 81 |
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* sim/fr30/bge.cgs: New testcase.
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| 82 |
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* sim/fr30/ble.cgs: New testcase.
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| 83 |
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* sim/fr30/bgt.cgs: New testcase.
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| 84 |
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* sim/fr30/bls.cgs: New testcase.
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| 85 |
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* sim/fr30/bhi.cgs: New testcase.
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| 86 |
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| 87 |
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Tue Dec 15 17:47:13 1998 Dave Brolley
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| 88 |
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| 89 |
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* sim/fr30/div.cgs (int): Add signed division scenario.
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| 90 |
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* sim/fr30/int.cgs (int): Complete testcase.
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| 91 |
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* sim/fr30/testutils.inc (_start): Initialize tbr.
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| 92 |
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(test_s_user,test_s_system,set_i,test_i): New macros.
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| 93 |
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| 94 |
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1998-12-14 Doug Evans
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| 95 |
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| 96 |
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* lib/sim-defs.exp (run_sim_test): New option xerror, for expected
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| 97 |
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errors. Translate \n sequences in expected output to newline char.
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| 98 |
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(slurp_options): Make parentheses optional.
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| 99 |
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(sim_run): Look for board_info sim,options.
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| 100 |
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* sim/fr30/hello.ms: Add trailing \n to expected output.
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| 101 |
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* sim/m32r/hello.ms: Ditto.
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| 102 |
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* sim/m32r/hw-trap.ms: Ditto.
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| 103 |
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| 104 |
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* sim/m32r/trap.cgs: Properly align trap2_handler.
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| 105 |
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| 106 |
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* sim/m32r/uread16.ms: New testcase.
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| 107 |
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* sim/m32r/uread32.ms: New testcase.
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| 108 |
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* sim/m32r/uwrite16.ms: New testcase.
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| 109 |
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* sim/m32r/uwrite32.ms: New testcase.
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| 110 |
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| 111 |
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1998-12-14 Dave Brolley
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| 112 |
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| 113 |
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* sim/fr30/call.cgs: Test ret here as well.
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| 114 |
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* sim/fr30/ld.cgs: Remove bogus comment.
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| 115 |
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* sim/fr30/testutils.inc (save_rp,restore_rp): New macros.
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| 116 |
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* sim/fr30/div.ms: New testcase.
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| 117 |
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* sim/fr30/st.cgs: New testcase.
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| 118 |
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* sim/fr30/sth.cgs: New testcase.
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| 119 |
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* sim/fr30/stb.cgs: New testcase.
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| 120 |
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* sim/fr30/mov.cgs: New testcase.
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| 121 |
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* sim/fr30/jmp.cgs: New testcase.
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| 122 |
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* sim/fr30/ret.cgs: New testcase.
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| 123 |
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* sim/fr30/int.cgs: New testcase.
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| 124 |
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| 125 |
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Thu Dec 10 18:46:25 1998 Dave Brolley
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| 126 |
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| 127 |
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* sim/fr30/div0s.cgs: New testcase.
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| 128 |
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* sim/fr30/div0u.cgs: New testcase.
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| 129 |
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* sim/fr30/div1.cgs: New testcase.
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| 130 |
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* sim/fr30/div2.cgs: New testcase.
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| 131 |
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* sim/fr30/div3.cgs: New testcase.
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| 132 |
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* sim/fr30/div4s.cgs: New testcase.
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| 133 |
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* sim/fr30/testutils.inc (mvi_h_dr,set_dbits,test_dbits): New Macros.
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| 134 |
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| 135 |
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Tue Dec 8 13:16:53 1998 Dave Brolley
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| 136 |
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| 137 |
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* sim/fr30/testutils.inc (set_s_user): Correct Mask.
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| 138 |
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(set_s_system): Correct Mask.
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| 139 |
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* sim/fr30/ld.cgs (ld): Move previously failing test back
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| 140 |
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into place.
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| 141 |
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* sim/fr30/ldm0.cgs: New testcase.
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| 142 |
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* sim/fr30/ldm1.cgs: New testcase.
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| 143 |
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* sim/fr30/stm0.cgs: New testcase.
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| 144 |
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* sim/fr30/stm1.cgs: New testcase.
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| 145 |
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| 146 |
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Thu Dec 3 14:20:03 1998 Dave Brolley
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| 147 |
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| 148 |
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* sim/fr30/ld.cgs: Implement more loads.
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| 149 |
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* sim/fr30/call.cgs: New testcase.
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| 150 |
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* sim/fr30/testutils.inc (testr_h_dr): New macro.
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| 151 |
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(set_s_user,set_s_system): New macros.
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| 152 |
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| 153 |
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* sim/fr30: New Directory.
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| 154 |
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| 155 |
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Wed Nov 18 10:50:19 1998 Andrew Cagney
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| 156 |
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| 157 |
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* common/bits-gen.c (main): Add BYTE_ORDER so that it matches
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| 158 |
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recent sim/common/sim-basics.h changes.
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| 159 |
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* common/Makefile.in: Update.
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| 160 |
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| 161 |
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Fri Oct 30 00:37:31 1998 Felix Lee
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| 162 |
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| 163 |
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* lib/sim-defs.exp (sim_run): download target program to remote
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| 164 |
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host, if necessary. for unix-driven win32 testing.
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| 165 |
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| 166 |
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Tue Sep 15 14:56:22 1998 Doug Evans
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| 167 |
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| 168 |
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* sim/m32r/testutils.inc (test_h_gr): Use mvaddr_h_gr.
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| 169 |
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* sim/m32r/rte.cgs: Test bbpc,bbpsw.
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| 170 |
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* sim/m32r/trap.cgs: Test bbpc,bbpsw.
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| 171 |
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| 172 |
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Fri Jul 31 17:49:13 1998 Felix Lee
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| 173 |
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| 174 |
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* lib/sim-defs.exp (sim_run): remote_spawn, use writeto instead of
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| 175 |
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writeonly.
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| 176 |
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| 177 |
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Fri Jul 24 09:40:34 1998 Doug Evans
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| 178 |
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| 179 |
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* Makefile.in (clean,mostlyclean): Change leading spaces to a tab.
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| 180 |
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| 181 |
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Wed Jul 1 15:57:54 1998 Doug Evans
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| 182 |
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| 183 |
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* sim/m32r/hw-trap.ms: New testcase.
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| 184 |
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| 185 |
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Tue Jun 16 15:44:01 1998 Jillian Ye
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| 186 |
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| 187 |
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* lib/sim-defs.exp: Print out timeout setting info when "-v" is used.
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| 188 |
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| 189 |
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Thu Jun 11 15:24:53 1998 Doug Evans
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| 190 |
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| 191 |
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* lib/sim-defs.exp (sim_run): Argument env_vals renamed to options,
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| 192 |
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which is now a list of options controlling the behaviour of sim_run.
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| 193 |
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| 194 |
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Wed Jun 10 10:53:20 1998 Doug Evans
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| 195 |
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| 196 |
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* sim/m32r/addx.cgs: Add another test.
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| 197 |
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* sim/m32r/jmp.cgs: Add another test.
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| 198 |
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| 199 |
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Mon Jun 8 16:08:27 1998 Doug Evans
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| 200 |
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| 201 |
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* sim/m32r/trap.cgs: Test trap 2.
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| 202 |
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| 203 |
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Mon Jun 1 18:54:22 1998 Frank Ch. Eigler
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| 204 |
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| 205 |
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* lib/sim-defs.exp (sim_run): Add possible environment variable
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| 206 |
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list to simulator run.
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| 207 |
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| 208 |
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Thu May 28 14:59:46 1998 Jillian Ye
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| 209 |
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| 210 |
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* Makefile.in: Take RUNTEST out of FLAG_TO_PASS
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| 211 |
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so that make check can be invoked recursively.
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| 212 |
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| 213 |
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Thu May 14 11:48:35 1998 Doug Evans
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| 214 |
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| 215 |
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* config/default.exp (CC,SIM): Delete.
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| 216 |
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| 217 |
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* lib/sim-defs.exp (sim_run): Fix handling of output redirection.
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| 218 |
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New arg prog_opts. All callers updated.
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| 219 |
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| 220 |
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Fri May 8 18:10:28 1998 Jillian Ye
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| 221 |
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| 222 |
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* Makefile.in: Made "check" the target of two
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| 223 |
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dependencies (test1, test2) so that test2 get a chance to
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| 224 |
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run even when test1 failed if "make -k check" is used.
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| 225 |
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| 226 |
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Fri May 8 14:41:28 1998 Doug Evans
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| 227 |
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| 228 |
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* lib/sim-defs.exp (sim_version): Simplify.
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| 229 |
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(sim_run): Implement.
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| 230 |
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(run_sim_test): Use sim_run.
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| 231 |
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(sim_compile): New proc.
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| 232 |
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| 233 |
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Mon May 4 17:59:11 1998 Frank Ch. Eigler
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| 234 |
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| 235 |
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* config/default.exp: Added C compiler settings.
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| 236 |
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| 237 |
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Wed Apr 22 12:26:28 1998 Doug Evans
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| 238 |
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| 239 |
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* Makefile.in (TARGET_FLAGS_TO_PASS): Delete LIBS, LDFLAGS.
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| 240 |
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| 241 |
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Tue Apr 21 10:49:03 1998 Doug Evans
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| 242 |
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| 243 |
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* lib/sim-defs.exp (run_sim_test): Don't exit early if one mach fails,
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| 244 |
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try all machs.
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| 245 |
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| 246 |
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* sim/m32r/addx.cgs: Test (-1)+(-1)+1.
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| 247 |
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| 248 |
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Fri Apr 17 16:00:52 1998 Doug Evans
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| 249 |
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| 250 |
|
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* sim/m32r/mv[ft]achi.cgs: Fix expected result
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| 251 |
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(sign extension of top 8 bits).
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| 252 |
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| 253 |
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Wed Feb 25 11:01:17 1998 Doug Evans
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| 254 |
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| 255 |
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* Makefile.in (RUNTEST): Fix path to runtest.
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| 256 |
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| 257 |
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Fri Feb 20 11:00:02 1998 Nick Clifton
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| 258 |
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| 259 |
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* sim/m32r/unlock.cgs: Fixed test.
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| 260 |
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* sim/m32r/mvfc.cgs: Fixed test.
|
| 261 |
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* sim/m32r/remu.cgs: Fixed test.
|
| 262 |
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* sim/m32r/bnc24.cgs: Test long BNC instruction.
|
| 263 |
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* sim/m32r/bnc8.cgs: Test short BNC instruction.
|
| 264 |
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* sim/m32r/ld-plus.cgs: Test LD instruction.
|
| 265 |
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* sim/m32r/macwhi.cgs: Test MACWHI instruction.
|
| 266 |
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* sim/m32r/macwlo.cgs: Test MACWLO instruction.
|
| 267 |
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* sim/m32r/mulwhi.cgs: Test MULWHI instruction.
|
| 268 |
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* sim/m32r/mulwlo.cgs: Test MULWLO instruction.
|
| 269 |
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* sim/m32r/mvfachi.cgs: Test MVFACHI instruction.
|
| 270 |
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* sim/m32r/mvfaclo.cgs: Test MVFACLO instruction.
|
| 271 |
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* sim/m32r/mvtaclo.cgs: Test MVTACLO instruction.
|
| 272 |
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* sim/m32r/addv.cgs: Test ADDV instruction.
|
| 273 |
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* sim/m32r/addv3.cgs: Test ADDV3 instruction.
|
| 274 |
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* sim/m32r/addx.cgs: Test ADDX instruction.
|
| 275 |
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* sim/m32r/lock.cgs: Test LOCK instruction.
|
| 276 |
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* sim/m32r/neg.cgs: Test NEG instruction.
|
| 277 |
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* sim/m32r/not.cgs: Test NOT instruction.
|
| 278 |
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* sim/m32r/unlock.cgs: Test UNLOCK instruction.
|
| 279 |
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| 280 |
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Thu Feb 19 11:15:45 1998 Nick Clifton
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| 281 |
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| 282 |
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* sim/m32r/testutils.inc (mvaddr_h_gr): new macro to load an
|
| 283 |
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address into a general register.
|
| 284 |
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| 285 |
|
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* sim/m32r/or3.cgs: Test OR3 instruction.
|
| 286 |
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* sim/m32r/rach.cgs: Test RACH instruction.
|
| 287 |
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* sim/m32r/rem.cgs: Test REM instruction.
|
| 288 |
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* sim/m32r/sub.cgs: Test SUB instruction.
|
| 289 |
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* sim/m32r/mv.cgs: Test MV instruction.
|
| 290 |
|
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* sim/m32r/mul.cgs: Test MUL instruction.
|
| 291 |
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* sim/m32r/bl24.cgs: Test long BL instruction.
|
| 292 |
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* sim/m32r/bl8.cgs: Test short BL instruction.
|
| 293 |
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* sim/m32r/blez.cgs: Test BLEZ instruction.
|
| 294 |
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* sim/m32r/bltz.cgs: Test BLTZ instruction.
|
| 295 |
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* sim/m32r/bne.cgs: Test BNE instruction.
|
| 296 |
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* sim/m32r/bnez.cgs: Test BNEZ instruction.
|
| 297 |
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* sim/m32r/bra24.cgs: Test long BRA instruction.
|
| 298 |
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* sim/m32r/bra8.cgs: Test short BRA instruction.
|
| 299 |
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* sim/m32r/jl.cgs: Test JL instruction.
|
| 300 |
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* sim/m32r/or.cgs: Test OR instruction.
|
| 301 |
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* sim/m32r/jmp.cgs: Test JMP instruction.
|
| 302 |
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* sim/m32r/and.cgs: Test AND instruction.
|
| 303 |
|
|
* sim/m32r/and3.cgs: Test AND3 instruction.
|
| 304 |
|
|
* sim/m32r/beq.cgs: Test BEQ instruction.
|
| 305 |
|
|
* sim/m32r/beqz.cgs: Test BEQZ instruction.
|
| 306 |
|
|
* sim/m32r/bgez.cgs: Test BGEZ instruction.
|
| 307 |
|
|
* sim/m32r/bgtz.cgs: Test BGTZ instruction.
|
| 308 |
|
|
* sim/m32r/cmp.cgs: Test CMP instruction.
|
| 309 |
|
|
* sim/m32r/cmpi.cgs: Test CMPI instruction.
|
| 310 |
|
|
* sim/m32r/cmpu.cgs: Test CMPU instruction.
|
| 311 |
|
|
* sim/m32r/cmpui.cgs: Test CMPUI instruction.
|
| 312 |
|
|
* sim/m32r/div.cgs: Test DIV instruction.
|
| 313 |
|
|
* sim/m32r/divu.cgs: Test DIVU instruction.
|
| 314 |
|
|
* sim/m32r/cmpeq.cgs: Test CMPEQ instruction.
|
| 315 |
|
|
* sim/m32r/sll.cgs: Test SLL instruction.
|
| 316 |
|
|
* sim/m32r/sll3.cgs: Test SLL3 instruction.
|
| 317 |
|
|
* sim/m32r/slli.cgs: Test SLLI instruction.
|
| 318 |
|
|
* sim/m32r/sra.cgs: Test SRA instruction.
|
| 319 |
|
|
* sim/m32r/sra3.cgs: Test SRA3 instruction.
|
| 320 |
|
|
* sim/m32r/srai.cgs: Test SRAI instruction.
|
| 321 |
|
|
* sim/m32r/srl.cgs: Test SRL instruction.
|
| 322 |
|
|
* sim/m32r/srl3.cgs: Test SRL3 instruction.
|
| 323 |
|
|
* sim/m32r/srli.cgs: Test SRLI instruction.
|
| 324 |
|
|
* sim/m32r/xor3.cgs: Test XOR3 instruction.
|
| 325 |
|
|
* sim/m32r/xor.cgs: Test XOR instruction.
|
| 326 |
|
|
|
| 327 |
|
|
Tue Feb 17 12:46:05 1998 Doug Evans
|
| 328 |
|
|
|
| 329 |
|
|
* config/default.exp: New file.
|
| 330 |
|
|
* lib/sim-defs.exp: New file.
|
| 331 |
|
|
* sim/m32r/*: m32r dejagnu simulator testsuite.
|
| 332 |
|
|
|
| 333 |
|
|
* Makefile.in (build_alias): Define.
|
| 334 |
|
|
(arch): Define.
|
| 335 |
|
|
(RUNTEST_FOR_TARGET): Delete.
|
| 336 |
|
|
(RUNTEST): Fix.
|
| 337 |
|
|
(check): Depend on site.exp. Run dejagnu.
|
| 338 |
|
|
(site.exp): New target.
|
| 339 |
|
|
* configure.in (arch): Define from target_cpu.
|
| 340 |
|
|
* configure: Regenerate.
|
| 341 |
|
|
|
| 342 |
|
|
Wed Sep 17 10:21:26 1997 Andrew Cagney
|
| 343 |
|
|
|
| 344 |
|
|
* common/bits-gen.c (gen_bit): Pass in the full name of the macro.
|
| 345 |
|
|
(gen_mask): Ditto.
|
| 346 |
|
|
|
| 347 |
|
|
* common/bits-tst.c (main): Add tests for LSSEXT, MSSEXT.
|
| 348 |
|
|
(calc): Add support for 8 bit version of macros.
|
| 349 |
|
|
(main): Add tests for 8 bit versions of macros.
|
| 350 |
|
|
(check_sext): Check SEXT of zero clears bits.
|
| 351 |
|
|
|
| 352 |
|
|
* common/bits-gen.c (main): Generate tests for 8 bit versions of
|
| 353 |
|
|
macros.
|
| 354 |
|
|
|
| 355 |
|
|
Thu Sep 11 13:04:40 1997 Andrew Cagney
|
| 356 |
|
|
|
| 357 |
|
|
* common/Make-common.in: New file, provide generic rules for
|
| 358 |
|
|
running checks.
|
| 359 |
|
|
|
| 360 |
|
|
Mon Sep 1 16:43:55 1997 Andrew Cagney
|
| 361 |
|
|
|
| 362 |
|
|
* configure.in (configdirs): Test for the target directory instead
|
| 363 |
|
|
of matching on a target.
|
| 364 |
|
|
|
