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[/] [or1k/] [tags/] [nog_patch_34/] [or1ksim/] [tick/] [tick.c] - Blame information for rev 133

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1 91 lampret
/* tick.c -- Simulation of OpenRISC 1000 tick timer
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   Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
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This file is part of OpenRISC 1000 Architectural Simulator.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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/* This is functional simulation of OpenRISC 1000 architectural
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   tick timer.
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*/
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#include <stdlib.h>
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#include <stdio.h>
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#include <string.h>
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#include "tick.h"
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#include "../cpu/or1k/spr_defs.h"
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#include "pic.h"
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/* For mode 10 only: timer stops until we write into TTCR.  */
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int tt_stopped = 0;
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/* Reset. It initializes TTCR register. */
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void tick_reset()
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{
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  printf("Resetting Tick Timer.\n");
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  mtspr(SPR_TTCR, 0);
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  mtspr(SPR_TTMR, 0);
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  tt_stopped = 0;
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}
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/* Simulation hook. Must be called every clock cycle to simulate tick
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   timer. It does internal functional tick timer simulation. */
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void tick_clock()
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{
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  unsigned long ttcr;
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  unsigned long ttmr;
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  ttcr = mfspr(SPR_TTCR);
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  ttmr = mfspr(SPR_TTMR);
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  if (!(ttmr & SPR_TTMR_M) || tt_stopped)
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    return;
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  if ((ttcr & SPR_TTCR_PERIOD) == (ttmr & SPR_TTMR_PERIOD)) {
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    if (ttmr & SPR_TTMR_IE) {
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      setsprbits(SPR_TTMR, SPR_TTMR_IP, 1);
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      report_interrupt(INT_TICK);
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    }
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    if (ttmr & SPR_TTMR_M == 1) {
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      /* Mode 01: Restart timer.  */
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      ttcr = 0;
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      mtspr(SPR_TTCR, ttcr);
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      return;
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    } else if (ttmr & SPR_TTMR_M == 2) {
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      /* Mode 10: Temporarly stop timer.  */
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      tt_stopped = 1;
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      return;
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    }
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  }
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  if (!tt_stopped)
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    ttcr++;
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  mtspr(SPR_TTCR, ttcr);
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}

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