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[/] [or1k/] [tags/] [nog_patch_42/] [or1ksim/] [cpu/] [or32/] [insnset.c] - Blame information for rev 706

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/* execute.c -- Instruction specific functions.
   Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
                 2000-2002 Marko Mlinar, markom@opencores.org
 
This file is part of OpenRISC 1000 Architectural Simulator.
 
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 2 of the License, or
(at your option) any later version.
 
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.
 
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 
INSTRUCTION (l_add) {
  signed long temp1;
  signed char temp4;
 
  IFF (config.cpu.dependstats) cur->func_unit = it_arith;
  temp1 = (signed long)eval_operand32(2, &breakpoint)+(signed long)eval_operand32(1, &breakpoint);
  set_operand32(0, temp1, &breakpoint);
  set_ov_flag (temp1);
  if (ARITH_SET_FLAG) {
    flag = temp1 == 0;
    setsprbits(SPR_SR, SPR_SR_F, flag);
  }
 
  temp4 = temp1;
  if (temp4 == temp1)
    mstats.byteadd++;
}
INSTRUCTION (l_sw) {
  int old_cyc = 0;
  IFF (config.cpu.dependstats) cur->func_unit = it_store;
  IFF (config.cpu.sbuf_len) old_cyc = mem_cycles;
  set_operand32(0, eval_operand32(1, &breakpoint), &breakpoint);
  if (config.cpu.sbuf_len) {
    int t = mem_cycles;
    mem_cycles = old_cyc;
    sbuf_store (t - old_cyc);
  }
}
INSTRUCTION (l_sb) {
  int old_cyc = 0;
  IFF (config.cpu.dependstats) cur->func_unit = it_store;
  IFF (config.cpu.sbuf_len) old_cyc = mem_cycles;
  set_operand8(0, eval_operand32(1, &breakpoint), &breakpoint);
  if (config.cpu.sbuf_len) {
    int t = mem_cycles;
    mem_cycles = old_cyc;
    sbuf_store (t- old_cyc);
  }
}
INSTRUCTION (l_sh) {
  int old_cyc = 0;
  IFF (config.cpu.dependstats) cur->func_unit = it_store;
  IFF (config.cpu.sbuf_len) old_cyc = mem_cycles;
  set_operand16(0, eval_operand32(1, &breakpoint), &breakpoint);
  if (config.cpu.sbuf_len) {
    int t = mem_cycles;
    mem_cycles = old_cyc;
    sbuf_store (t - old_cyc);
  }
}
INSTRUCTION (l_lwz) {
  unsigned long val;
  IFF (config.cpu.dependstats) cur->func_unit = it_load;
  if (config.cpu.sbuf_len) sbuf_load ();
  val = eval_operand32(1, &breakpoint);
  /* If eval operand produced exception don't set anything */
  if (!pending.valid)
    set_operand32(0, val, &breakpoint);
}
INSTRUCTION (l_lbs) {
  signed char val;
  IFF (config.cpu.dependstats) cur->func_unit = it_load;
  if (config.cpu.sbuf_len) sbuf_load ();
  val = eval_operand8(1, &breakpoint);
  /* If eval opreand produced exception don't set anything */
  if (!pending.valid)
    set_operand32(0, val, &breakpoint);
}
INSTRUCTION (l_lbz) {
  unsigned char val;
  IFF (config.cpu.dependstats) cur->func_unit = it_load;
  if (config.cpu.sbuf_len) sbuf_load ();
  val = eval_operand8(1, &breakpoint);
  /* If eval opreand produced exception don't set anything */
  if (!pending.valid)
    set_operand32(0, val, &breakpoint);
}
INSTRUCTION (l_lhs) {
  signed short val;
  IFF (config.cpu.dependstats) cur->func_unit = it_load;
  if (config.cpu.sbuf_len) sbuf_load ();
  val = eval_operand16(1, &breakpoint);
  /* If eval opreand produced exception don't set anything */
  if (!pending.valid)
    set_operand32(0, val, &breakpoint);
}
INSTRUCTION (l_lhz) {
  unsigned short val;
  IFF (config.cpu.dependstats) cur->func_unit = it_load;
  if (config.cpu.sbuf_len) sbuf_load ();
  val = eval_operand16(1, &breakpoint);
  /* If eval opreand produced exception don't set anything */
  if (!pending.valid)
    set_operand32(0, val, &breakpoint);
}
INSTRUCTION (l_movhi) {
  IFF (config.cpu.dependstats) cur->func_unit = it_movimm;
  set_operand32(0, eval_operand32(1, &breakpoint) << 16, &breakpoint);
}
INSTRUCTION (l_and) {
  unsigned long temp1;
  IFF (config.cpu.dependstats) cur->func_unit = it_arith;
  set_operand32(0, temp1 = set_ov_flag (eval_operand32(1, &breakpoint) & (unsigned)eval_operand32(2, &breakpoint)), &breakpoint);
  if (ARITH_SET_FLAG) {
    flag = temp1 == 0;
    setsprbits(SPR_SR, SPR_SR_F, flag);
  }
}
INSTRUCTION (l_or) {
  IFF (config.cpu.dependstats) cur->func_unit = it_arith;
  set_operand32(0, set_ov_flag (eval_operand32(1, &breakpoint) | (unsigned)eval_operand32(2, &breakpoint)), &breakpoint);
}
INSTRUCTION (l_xor) {
  IFF (config.cpu.dependstats) cur->func_unit = it_arith;
  set_operand32(0, set_ov_flag (eval_operand32(1, &breakpoint) ^ (signed)eval_operand32(2, &breakpoint)), &breakpoint);
}
INSTRUCTION (l_sub) {
  IFF (config.cpu.dependstats) cur->func_unit = it_arith;
  set_operand32(0, set_ov_flag ((signed long)eval_operand32(1, &breakpoint) - (signed long)eval_operand32(2, &breakpoint)), &breakpoint);
}
/*int mcount = 0;*/
INSTRUCTION (l_mul) {
  signed long temp3, temp2, temp1;
 
  IFF (config.cpu.dependstats) cur->func_unit = it_arith;
  set_operand32(0, set_ov_flag ((signed long)eval_operand32(1, &breakpoint) * (signed long)eval_operand32(2, &breakpoint)), &breakpoint);
  /*if (!(mcount++ & 1023)) {
    printf ("[%i]\n",mcount);
    }*/
}
INSTRUCTION (l_div) {
  signed long temp3, temp2, temp1;
 
  IFF (config.cpu.dependstats) cur->func_unit = it_arith;
  temp3 = eval_operand32(2, &breakpoint);
  temp2 = eval_operand32(1, &breakpoint);
  if (temp3)
    temp1 = temp2 / temp3;
  else {
    except_handle(EXCEPT_ILLEGAL, iqueue[0].insn_addr);
    return;
  }
  set_operand32(0, set_ov_flag (temp1), &breakpoint);
}
INSTRUCTION (l_divu) {
  unsigned long temp3, temp2, temp1;
 
  IFF (config.cpu.dependstats) cur->func_unit = it_arith;
  temp3 = eval_operand32(2, &breakpoint);
  temp2 = eval_operand32(1, &breakpoint);
  temp1 = temp2 / temp3;
  /* cycles += 16; */
  set_operand32(0, set_ov_flag (temp1), &breakpoint);
}
INSTRUCTION (l_sll) {
  int sign = 1;
  IFF (config.cpu.dependstats) cur->func_unit = it_shift;
  if ((signed)eval_operand32(1, &breakpoint) < 0)
    sign = -1;
  /* cycles += 2; */
  set_operand32(0, set_ov_flag (eval_operand32(1, &breakpoint) << eval_operand32(2, &breakpoint)), &breakpoint);
}
INSTRUCTION (l_sra) {
  unsigned long sign = 0;
  IFF (config.cpu.dependstats) cur->func_unit = it_shift;
 
  if ((signed)eval_operand32(1, &breakpoint) < 0)
    sign = -1;
  /* cycles += 2; */
  set_operand32(0, set_ov_flag ((signed)eval_operand32(1, &breakpoint) >> eval_operand32(2, &breakpoint)), &breakpoint);
}
INSTRUCTION (l_srl) {
  IFF (config.cpu.dependstats) cur->func_unit = it_shift;
  /* cycles += 2; */
  set_operand32(0, set_ov_flag (eval_operand32(1, &breakpoint) >> eval_operand32(2, &breakpoint)), &breakpoint);
}
INSTRUCTION (l_bf) {
  if (config.bpb.enabled) {
    int fwd = (eval_operand32(0, &breakpoint) >= pc) ? 1 : 0;
    IFF (config.cpu.dependstats) cur->func_unit = it_branch;
    mstats.bf[flag][fwd]++;
    bpb_update(cur->insn_addr, flag);
  }
  if (flag) {
    debug(5, "\nl.bf relative: pc=%x pcnext=%x\n", pc, pcnext);
    pcdelay = pc + (signed)eval_operand32(0, &breakpoint) * 4;
    btic_update(pcnext);
    next_delay_insn = 1;
  } else {
    btic_update(pc);
  }
}
INSTRUCTION (l_bnf) {
  if (config.bpb.enabled) {
    int fwd = (eval_operand32(0, &breakpoint) >= pc) ? 1 : 0;
    IFF (config.cpu.dependstats) cur->func_unit = it_branch;
    mstats.bnf[!flag][fwd]++;
    bpb_update(cur->insn_addr, flag == 0);
  }
  if (flag == 0) {
    debug(5, "\nl.bnf relative: pc=%x pcnext=%x\n", pc, pcnext);
    pcdelay = pc + (signed)eval_operand32(0, &breakpoint) * 4;
    btic_update(pcnext);
    next_delay_insn = 1;
  } else {
    btic_update(pc);
  }
}
INSTRUCTION (l_j) {
  debug(5, "\nl.j relative: pc=%x pcnext=%x\n", pc, pcnext);
  pcdelay = pc + (signed)eval_operand32(0, &breakpoint) * 4;
  IFF (config.cpu.dependstats) cur->func_unit = it_jump;
  next_delay_insn = 1;
}
INSTRUCTION (l_jal) {
  debug(5, "\nl.jal relative: pc=%x pcnext=%x\n", pc, pcnext);
  pcdelay = pc + (signed)eval_operand32(0, &breakpoint) * 4;
 
  IFF (config.cpu.dependstats) cur->func_unit = it_jump;
  set_reg32(LINK_REGNO, pc + 8);
  next_delay_insn = 1;
  if (config.sim.profile) {
    struct mem_entry *entry;
    struct label_entry *tmp;
    if (verify_memoryarea(pcdelay) && (tmp = get_label (pcdelay)))
      fprintf (runtime.sim.fprof, "+%08X %08X %08X %s\n", cycles, pc + 8, pcdelay, tmp->name);
    else
      fprintf (runtime.sim.fprof, "+%08X %08X %08X @%08X\n", cycles, pc + 8, pcdelay, pcdelay);
  }
}
INSTRUCTION (l_jalr) {
  IFF (config.cpu.dependstats) cur->func_unit = it_jump;
  pcdelay = eval_operand32(0, &breakpoint);
  set_reg32(LINK_REGNO, pc + 8);
  next_delay_insn = 1;
}
INSTRUCTION (l_jr) {
  IFF (config.cpu.dependstats) cur->func_unit = it_jump;
  pcdelay = eval_operand32(0, &breakpoint);
  next_delay_insn = 1;
  if (config.sim.profile)
    fprintf (runtime.sim.fprof, "-%08X %08X\n", cycles, pcdelay);
}
INSTRUCTION (l_rfe) {
  IFF (config.cpu.dependstats) cur->func_unit = it_exception;
  pcnext = mfspr(SPR_EPCR_BASE);
  mtspr(SPR_SR, mfspr(SPR_ESR_BASE));
}
INSTRUCTION (l_nop) {
  unsigned long stackaddr;
  int k = eval_operand32(0, &breakpoint);
  IFF (config.cpu.dependstats) cur->func_unit = it_nop;
  switch (k) {
    case NOP_NOP:
      break;
    case NOP_EXIT:
      printf("exit(%d)\n", evalsim_reg32 (3));
      if (config.debug.gdb_enabled)
        set_stall_state (1);
      else
        cont_run = 0;
      break;
    case NOP_PRINTF:
      stackaddr = evalsim_reg32(4);
      simprintf(stackaddr, evalsim_reg32(3));
      debug(5, "simprintf %x\n", stackaddr);
      break;
    case NOP_REPORT:
      printf("report(0x%x);\n", evalsim_reg32(3));
    default:
      if (k >= NOP_REPORT_FIRST && k <= NOP_REPORT_LAST)
      printf("report %i (0x%x);\n", k - NOP_REPORT_FIRST, evalsim_reg32(3));
      break;
  }
}
INSTRUCTION (l_sfeq) {
  IFF (config.cpu.dependstats) cur->func_unit = it_compare;
  flag = eval_operand32(0, &breakpoint) == eval_operand32(1, &breakpoint);
  setsprbits(SPR_SR, SPR_SR_F, flag);
}
INSTRUCTION (l_sfne) {
  IFF (config.cpu.dependstats) cur->func_unit = it_compare;
  flag = eval_operand32(0, &breakpoint) != eval_operand32(1, &breakpoint);
  setsprbits(SPR_SR, SPR_SR_F, flag);
}
INSTRUCTION (l_sfgts) {
  IFF (config.cpu.dependstats) cur->func_unit = it_compare;
  flag = (signed)eval_operand32(0, &breakpoint) > (signed)eval_operand32(1, &breakpoint);
  setsprbits(SPR_SR, SPR_SR_F, flag);
}
INSTRUCTION (l_sfges) {
  IFF (config.cpu.dependstats) cur->func_unit = it_compare;
  flag = (signed)eval_operand32(0, &breakpoint) >= (signed)eval_operand32(1, &breakpoint);
  setsprbits(SPR_SR, SPR_SR_F, flag);
}
INSTRUCTION (l_sflts) {
  IFF (config.cpu.dependstats) cur->func_unit = it_compare;
  flag = (signed)eval_operand32(0, &breakpoint) < (signed)eval_operand32(1, &breakpoint);
  setsprbits(SPR_SR, SPR_SR_F, flag);
}
INSTRUCTION (l_sfles) {
  IFF (config.cpu.dependstats) cur->func_unit = it_compare;
  flag = (signed)eval_operand32(0, &breakpoint) <= (signed)eval_operand32(1, &breakpoint);
  setsprbits(SPR_SR, SPR_SR_F, flag);
}
INSTRUCTION (l_sfgtu) {
  IFF (config.cpu.dependstats) cur->func_unit = it_compare;
  flag = (unsigned)eval_operand32(0, &breakpoint) > (unsigned)eval_operand32(1, &breakpoint);
  setsprbits(SPR_SR, SPR_SR_F, flag);
}
INSTRUCTION (l_sfgeu) {
  IFF (config.cpu.dependstats) cur->func_unit = it_compare;
  flag = (unsigned)eval_operand32(0, &breakpoint) >= (unsigned) eval_operand32(1, &breakpoint);
  setsprbits(SPR_SR, SPR_SR_F, flag);
}
INSTRUCTION (l_sfltu) {
  IFF (config.cpu.dependstats) cur->func_unit = it_compare;
  flag = (unsigned)eval_operand32(0, &breakpoint) < (unsigned)eval_operand32(1, &breakpoint);
  setsprbits(SPR_SR, SPR_SR_F, flag);
}
INSTRUCTION (l_sfleu) {
  IFF (config.cpu.dependstats) cur->func_unit = it_compare;
  flag = (unsigned)eval_operand32(0, &breakpoint) <= (unsigned)eval_operand32(1, &breakpoint);
  setsprbits(SPR_SR, SPR_SR_F, flag);
}
INSTRUCTION (l_extbs) {
  unsigned char x;
  IFF (config.cpu.dependstats) cur->func_unit = it_move;
  x = eval_operand32(1, &breakpoint);
  set_operand32(0, (signed long)x, &breakpoint);
}
INSTRUCTION (l_extbz) {
  unsigned char x;
  IFF (config.cpu.dependstats) cur->func_unit = it_move;
  x = eval_operand32(1, &breakpoint);
  set_operand32(0, (unsigned long)x, &breakpoint);
}
INSTRUCTION (l_exths) {
  unsigned short x;
  IFF (config.cpu.dependstats) cur->func_unit = it_move;
  x = eval_operand32(1, &breakpoint);
  set_operand32(0, (signed long)x, &breakpoint);
}
INSTRUCTION (l_exthz) {
  unsigned short x;
  IFF (config.cpu.dependstats) cur->func_unit = it_move;
  x = eval_operand32(1, &breakpoint);
  set_operand32(0, (unsigned long)x, &breakpoint);
}
INSTRUCTION (l_extws) {
  unsigned int x;
  IFF (config.cpu.dependstats) cur->func_unit = it_move;
  x = eval_operand32(1, &breakpoint);
  set_operand32(0, (signed long)x, &breakpoint);
}
INSTRUCTION (l_extwz) {
  unsigned int x;
  IFF (config.cpu.dependstats) cur->func_unit = it_move;
  x = eval_operand32(1, &breakpoint);
  set_operand32(0, (unsigned long)x, &breakpoint);
}
INSTRUCTION (l_mtspr) {
  unsigned long regno = eval_operand32(0, &breakpoint) + eval_operand32(2, &breakpoint);
  unsigned long value = eval_operand32(1, &breakpoint);
 
  if (runtime.sim.fspr_log) {
    fprintf(runtime.sim.fspr_log, "Write to SPR  : [%08lX] <- [%08lX]\n", regno, value);
  }
 
  IFF (config.cpu.dependstats) cur->func_unit = it_move;
  if (mfspr(SPR_SR) & SPR_SR_SM)
    mtspr(regno, value);
  else {
    printf("WARNING: trying to write SPR while SR[SUPV] is cleared.\n");
    cont_run = 0;
  }
}
INSTRUCTION (l_mfspr) {
  unsigned long regno = eval_operand32(1, &breakpoint) + eval_operand32(2, &breakpoint);
  unsigned long value = mfspr(regno);
 
  if (runtime.sim.fspr_log) {
    fprintf(runtime.sim.fspr_log, "Read from SPR : [%08lX] -> [%08lX]\n", regno, value);
  }
 
  IFF (config.cpu.dependstats) cur->func_unit = it_move;
  if (mfspr(SPR_SR) & SPR_SR_SM)
    set_operand32(0, value, &breakpoint);
  else {
    set_operand32(0, 0, &breakpoint);
    printf("WARNING: trying to read SPR while SR[SUPV] is cleared.\n");
    cont_run = 0;
  }
}
INSTRUCTION (l_sys) {
  except_handle(EXCEPT_SYSCALL, mfspr(SPR_EEAR_BASE));
}
INSTRUCTION (l_trap) {
  /* TODO: some SR related code here! */
  except_handle(EXCEPT_TRAP, mfspr(SPR_EEAR_BASE));
}
INSTRUCTION (l_mac) {
  sprword lo, hi;
  LONGEST l;
  long x, y;
  IFF (config.cpu.dependstats) cur->func_unit = it_mac;
  lo = mfspr (SPR_MACLO);
  hi = mfspr (SPR_MACHI);
  x = eval_operand32(0, &breakpoint);
  y = eval_operand32(1, &breakpoint);
  printf ("[%08x,%08x]\t", (unsigned long)(x), (unsigned long)(y));
  l = (ULONGEST)lo | ((LONGEST)hi << 32);
  l += (LONGEST) x * (LONGEST) y;
 
  /* This implementation is very fast - it needs only one cycle for mac.  */
  lo = ((ULONGEST)l) & 0xFFFFFFFF;
  hi = ((LONGEST)l) >> 32;
  mtspr (SPR_MACLO, lo);
  mtspr (SPR_MACHI, hi);
  printf ("(%08x,%08x)\n", hi, lo);
}
INSTRUCTION (l_msb) {
  sprword lo, hi;
  LONGEST l;
  long x, y;
  IFF (config.cpu.dependstats) cur->func_unit = it_mac;
  lo = mfspr (SPR_MACLO);
  hi = mfspr (SPR_MACHI);
  x = eval_operand32(0, &breakpoint);
  y = eval_operand32(1, &breakpoint);
  printf ("[%08x,%08x]\t", (unsigned long)(x), (unsigned long)(y));
  l = (ULONGEST)lo | ((LONGEST)hi << 32);
  l -= (LONGEST) eval_operand32(0, &breakpoint) * (LONGEST)eval_operand32(1, &breakpoint);
 
  /* This implementation is very fast - it needs only one cycle for msb.  */
  lo = ((ULONGEST)l) & 0xFFFFFFFF;
  hi = ((LONGEST)l) >> 32;
  mtspr (SPR_MACLO, lo);
  mtspr (SPR_MACHI, hi);
  printf ("(%08x,%08x)\n", hi, lo);
}
INSTRUCTION (l_macrc) {
  sprword lo, hi;
  LONGEST l;
  IFF (config.cpu.dependstats) cur->func_unit = it_mac;
  /* No need for synchronization here -- all MAC instructions are 1 cycle long.  */
  lo =  mfspr (SPR_MACLO);
  hi =  mfspr (SPR_MACHI);
  l = (ULONGEST) lo | ((LONGEST)hi << 32);
  l >>= 28;
  //printf ("<%08x>\n", (unsigned long)l);
  set_operand32(0, (long)l, &breakpoint);
  mtspr (SPR_MACLO, 0);
  mtspr (SPR_MACHI, 0);
}
INSTRUCTION (l_cmov) {
  IFF (config.cpu.dependstats) cur->func_unit = it_move;
  set_operand32 (0, flag ? eval_operand32(1, &breakpoint) : eval_operand32(2, &breakpoint), &breakpoint);
}
INSTRUCTION (l_cust1) {
  /*int destr = cur->insn >> 21;
    int src1r = cur->insn >> 15;
    int src2r = cur->insn >> 9;*/
}
INSTRUCTION (l_cust2) {
}
INSTRUCTION (l_cust3) {
}
INSTRUCTION (l_cust4) {
}

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[/] [or1k/] [tags/] [nog_patch_42/] [or1ksim/] [cpu/] [or32/] [insnset.c] - Blame information for rev 706

Line No.	Rev	Author	Line
1	706	markom	`/* execute.c -- Instruction specific functions.`
2			`Copyright (C) 1999 Damjan Lampret, lampret@opencores.org`
3			`2000-2002 Marko Mlinar, markom@opencores.org`
4
5			`This file is part of OpenRISC 1000 Architectural Simulator.`
6
7			`This program is free software; you can redistribute it and/or modify`
8			`it under the terms of the GNU General Public License as published by`
9			`the Free Software Foundation; either version 2 of the License, or`
10			`(at your option) any later version.`
11
12			`This program is distributed in the hope that it will be useful,`
13			`but WITHOUT ANY WARRANTY; without even the implied warranty of`
14			`MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the`
15			`GNU General Public License for more details.`
16
17			`You should have received a copy of the GNU General Public License`
18			`along with this program; if not, write to the Free Software`
19			`Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */`
20
21			`INSTRUCTION (l_add) {`
22			`signed long temp1;`
23			`signed char temp4;`
24
25			`IFF (config.cpu.dependstats) cur->func_unit = it_arith;`
26			`temp1 = (signed long)eval_operand32(2, &breakpoint)+(signed long)eval_operand32(1, &breakpoint);`
27			`set_operand32(0, temp1, &breakpoint);`
28			`set_ov_flag (temp1);`
29			`if (ARITH_SET_FLAG) {`
30			`flag = temp1 == 0;`
31			`setsprbits(SPR_SR, SPR_SR_F, flag);`
32			`}`
33
34			`temp4 = temp1;`
35			`if (temp4 == temp1)`
36			`mstats.byteadd++;`
37			`}`
38			`INSTRUCTION (l_sw) {`
39			`int old_cyc = 0;`
40			`IFF (config.cpu.dependstats) cur->func_unit = it_store;`
41			`IFF (config.cpu.sbuf_len) old_cyc = mem_cycles;`
42			`set_operand32(0, eval_operand32(1, &breakpoint), &breakpoint);`
43			`if (config.cpu.sbuf_len) {`
44			`int t = mem_cycles;`
45			`mem_cycles = old_cyc;`
46			`sbuf_store (t - old_cyc);`
47			`}`
48			`}`
49			`INSTRUCTION (l_sb) {`
50			`int old_cyc = 0;`
51			`IFF (config.cpu.dependstats) cur->func_unit = it_store;`
52			`IFF (config.cpu.sbuf_len) old_cyc = mem_cycles;`
53			`set_operand8(0, eval_operand32(1, &breakpoint), &breakpoint);`
54			`if (config.cpu.sbuf_len) {`
55			`int t = mem_cycles;`
56			`mem_cycles = old_cyc;`
57			`sbuf_store (t- old_cyc);`
58			`}`
59			`}`
60			`INSTRUCTION (l_sh) {`
61			`int old_cyc = 0;`
62			`IFF (config.cpu.dependstats) cur->func_unit = it_store;`
63			`IFF (config.cpu.sbuf_len) old_cyc = mem_cycles;`
64			`set_operand16(0, eval_operand32(1, &breakpoint), &breakpoint);`
65			`if (config.cpu.sbuf_len) {`
66			`int t = mem_cycles;`
67			`mem_cycles = old_cyc;`
68			`sbuf_store (t - old_cyc);`
69			`}`
70			`}`
71			`INSTRUCTION (l_lwz) {`
72			`unsigned long val;`
73			`IFF (config.cpu.dependstats) cur->func_unit = it_load;`
74			`if (config.cpu.sbuf_len) sbuf_load ();`
75			`val = eval_operand32(1, &breakpoint);`
76			`/* If eval operand produced exception don't set anything */`
77			`if (!pending.valid)`
78			`set_operand32(0, val, &breakpoint);`
79			`}`
80			`INSTRUCTION (l_lbs) {`
81			`signed char val;`
82			`IFF (config.cpu.dependstats) cur->func_unit = it_load;`
83			`if (config.cpu.sbuf_len) sbuf_load ();`
84			`val = eval_operand8(1, &breakpoint);`
85			`/* If eval opreand produced exception don't set anything */`
86			`if (!pending.valid)`
87			`set_operand32(0, val, &breakpoint);`
88			`}`
89			`INSTRUCTION (l_lbz) {`
90			`unsigned char val;`
91			`IFF (config.cpu.dependstats) cur->func_unit = it_load;`
92			`if (config.cpu.sbuf_len) sbuf_load ();`
93			`val = eval_operand8(1, &breakpoint);`
94			`/* If eval opreand produced exception don't set anything */`
95			`if (!pending.valid)`
96			`set_operand32(0, val, &breakpoint);`
97			`}`
98			`INSTRUCTION (l_lhs) {`
99			`signed short val;`
100			`IFF (config.cpu.dependstats) cur->func_unit = it_load;`
101			`if (config.cpu.sbuf_len) sbuf_load ();`
102			`val = eval_operand16(1, &breakpoint);`
103			`/* If eval opreand produced exception don't set anything */`
104			`if (!pending.valid)`
105			`set_operand32(0, val, &breakpoint);`
106			`}`
107			`INSTRUCTION (l_lhz) {`
108			`unsigned short val;`
109			`IFF (config.cpu.dependstats) cur->func_unit = it_load;`
110			`if (config.cpu.sbuf_len) sbuf_load ();`
111			`val = eval_operand16(1, &breakpoint);`
112			`/* If eval opreand produced exception don't set anything */`
113			`if (!pending.valid)`
114			`set_operand32(0, val, &breakpoint);`
115			`}`
116			`INSTRUCTION (l_movhi) {`
117			`IFF (config.cpu.dependstats) cur->func_unit = it_movimm;`
118			`set_operand32(0, eval_operand32(1, &breakpoint) << 16, &breakpoint);`
119			`}`
120			`INSTRUCTION (l_and) {`
121			`unsigned long temp1;`
122			`IFF (config.cpu.dependstats) cur->func_unit = it_arith;`
123			`set_operand32(0, temp1 = set_ov_flag (eval_operand32(1, &breakpoint) & (unsigned)eval_operand32(2, &breakpoint)), &breakpoint);`
124			`if (ARITH_SET_FLAG) {`
125			`flag = temp1 == 0;`
126			`setsprbits(SPR_SR, SPR_SR_F, flag);`
127			`}`
128			`}`
129			`INSTRUCTION (l_or) {`
130			`IFF (config.cpu.dependstats) cur->func_unit = it_arith;`
131			`set_operand32(0, set_ov_flag (eval_operand32(1, &breakpoint) \| (unsigned)eval_operand32(2, &breakpoint)), &breakpoint);`
132			`}`
133			`INSTRUCTION (l_xor) {`
134			`IFF (config.cpu.dependstats) cur->func_unit = it_arith;`
135			`set_operand32(0, set_ov_flag (eval_operand32(1, &breakpoint) ^ (signed)eval_operand32(2, &breakpoint)), &breakpoint);`
136			`}`
137			`INSTRUCTION (l_sub) {`
138			`IFF (config.cpu.dependstats) cur->func_unit = it_arith;`
139			`set_operand32(0, set_ov_flag ((signed long)eval_operand32(1, &breakpoint) - (signed long)eval_operand32(2, &breakpoint)), &breakpoint);`
140			`}`
141			`/int mcount = 0;/`
142			`INSTRUCTION (l_mul) {`
143			`signed long temp3, temp2, temp1;`
144
145			`IFF (config.cpu.dependstats) cur->func_unit = it_arith;`
146			`set_operand32(0, set_ov_flag ((signed long)eval_operand32(1, &breakpoint) * (signed long)eval_operand32(2, &breakpoint)), &breakpoint);`
147			`/*if (!(mcount++ & 1023)) {`
148			`printf ("[%i]\n",mcount);`
149			`}*/`
150			`}`
151			`INSTRUCTION (l_div) {`
152			`signed long temp3, temp2, temp1;`
153
154			`IFF (config.cpu.dependstats) cur->func_unit = it_arith;`
155			`temp3 = eval_operand32(2, &breakpoint);`
156			`temp2 = eval_operand32(1, &breakpoint);`
157			`if (temp3)`
158			`temp1 = temp2 / temp3;`
159			`else {`
160			`except_handle(EXCEPT_ILLEGAL, iqueue[0].insn_addr);`
161			`return;`
162			`}`
163			`set_operand32(0, set_ov_flag (temp1), &breakpoint);`
164			`}`
165			`INSTRUCTION (l_divu) {`
166			`unsigned long temp3, temp2, temp1;`
167
168			`IFF (config.cpu.dependstats) cur->func_unit = it_arith;`
169			`temp3 = eval_operand32(2, &breakpoint);`
170			`temp2 = eval_operand32(1, &breakpoint);`
171			`temp1 = temp2 / temp3;`
172			`/* cycles += 16; */`
173			`set_operand32(0, set_ov_flag (temp1), &breakpoint);`
174			`}`
175			`INSTRUCTION (l_sll) {`
176			`int sign = 1;`
177			`IFF (config.cpu.dependstats) cur->func_unit = it_shift;`
178			`if ((signed)eval_operand32(1, &breakpoint) < 0)`
179			`sign = -1;`
180			`/* cycles += 2; */`
181			`set_operand32(0, set_ov_flag (eval_operand32(1, &breakpoint) << eval_operand32(2, &breakpoint)), &breakpoint);`
182			`}`
183			`INSTRUCTION (l_sra) {`
184			`unsigned long sign = 0;`
185			`IFF (config.cpu.dependstats) cur->func_unit = it_shift;`
186
187			`if ((signed)eval_operand32(1, &breakpoint) < 0)`
188			`sign = -1;`
189			`/* cycles += 2; */`
190			`set_operand32(0, set_ov_flag ((signed)eval_operand32(1, &breakpoint) >> eval_operand32(2, &breakpoint)), &breakpoint);`
191			`}`
192			`INSTRUCTION (l_srl) {`
193			`IFF (config.cpu.dependstats) cur->func_unit = it_shift;`
194			`/* cycles += 2; */`
195			`set_operand32(0, set_ov_flag (eval_operand32(1, &breakpoint) >> eval_operand32(2, &breakpoint)), &breakpoint);`
196			`}`
197			`INSTRUCTION (l_bf) {`
198			`if (config.bpb.enabled) {`
199			`int fwd = (eval_operand32(0, &breakpoint) >= pc) ? 1 : 0;`
200			`IFF (config.cpu.dependstats) cur->func_unit = it_branch;`
201			`mstats.bf[flag][fwd]++;`
202			`bpb_update(cur->insn_addr, flag);`
203			`}`
204			`if (flag) {`
205			`debug(5, "\nl.bf relative: pc=%x pcnext=%x\n", pc, pcnext);`
206			`pcdelay = pc + (signed)eval_operand32(0, &breakpoint) * 4;`
207			`btic_update(pcnext);`
208			`next_delay_insn = 1;`
209			`} else {`
210			`btic_update(pc);`
211			`}`
212			`}`
213			`INSTRUCTION (l_bnf) {`
214			`if (config.bpb.enabled) {`
215			`int fwd = (eval_operand32(0, &breakpoint) >= pc) ? 1 : 0;`
216			`IFF (config.cpu.dependstats) cur->func_unit = it_branch;`
217			`mstats.bnf[!flag][fwd]++;`
218			`bpb_update(cur->insn_addr, flag == 0);`
219			`}`
220			`if (flag == 0) {`
221			`debug(5, "\nl.bnf relative: pc=%x pcnext=%x\n", pc, pcnext);`
222			`pcdelay = pc + (signed)eval_operand32(0, &breakpoint) * 4;`
223			`btic_update(pcnext);`
224			`next_delay_insn = 1;`
225			`} else {`
226			`btic_update(pc);`
227			`}`
228			`}`
229			`INSTRUCTION (l_j) {`
230			`debug(5, "\nl.j relative: pc=%x pcnext=%x\n", pc, pcnext);`
231			`pcdelay = pc + (signed)eval_operand32(0, &breakpoint) * 4;`
232			`IFF (config.cpu.dependstats) cur->func_unit = it_jump;`
233			`next_delay_insn = 1;`
234			`}`
235			`INSTRUCTION (l_jal) {`
236			`debug(5, "\nl.jal relative: pc=%x pcnext=%x\n", pc, pcnext);`
237			`pcdelay = pc + (signed)eval_operand32(0, &breakpoint) * 4;`
238
239			`IFF (config.cpu.dependstats) cur->func_unit = it_jump;`
240			`set_reg32(LINK_REGNO, pc + 8);`
241			`next_delay_insn = 1;`
242			`if (config.sim.profile) {`
243			`struct mem_entry *entry;`
244			`struct label_entry *tmp;`
245			`if (verify_memoryarea(pcdelay) && (tmp = get_label (pcdelay)))`
246			`fprintf (runtime.sim.fprof, "+%08X %08X %08X %s\n", cycles, pc + 8, pcdelay, tmp->name);`
247			`else`
248			`fprintf (runtime.sim.fprof, "+%08X %08X %08X @%08X\n", cycles, pc + 8, pcdelay, pcdelay);`
249			`}`
250			`}`
251			`INSTRUCTION (l_jalr) {`
252			`IFF (config.cpu.dependstats) cur->func_unit = it_jump;`
253			`pcdelay = eval_operand32(0, &breakpoint);`
254			`set_reg32(LINK_REGNO, pc + 8);`
255			`next_delay_insn = 1;`
256			`}`
257			`INSTRUCTION (l_jr) {`
258			`IFF (config.cpu.dependstats) cur->func_unit = it_jump;`
259			`pcdelay = eval_operand32(0, &breakpoint);`
260			`next_delay_insn = 1;`
261			`if (config.sim.profile)`
262			`fprintf (runtime.sim.fprof, "-%08X %08X\n", cycles, pcdelay);`
263			`}`
264			`INSTRUCTION (l_rfe) {`
265			`IFF (config.cpu.dependstats) cur->func_unit = it_exception;`
266			`pcnext = mfspr(SPR_EPCR_BASE);`
267			`mtspr(SPR_SR, mfspr(SPR_ESR_BASE));`
268			`}`
269			`INSTRUCTION (l_nop) {`
270			`unsigned long stackaddr;`
271			`int k = eval_operand32(0, &breakpoint);`
272			`IFF (config.cpu.dependstats) cur->func_unit = it_nop;`
273			`switch (k) {`
274			`case NOP_NOP:`
275			`break;`
276			`case NOP_EXIT:`
277			`printf("exit(%d)\n", evalsim_reg32 (3));`
278			`if (config.debug.gdb_enabled)`
279			`set_stall_state (1);`
280			`else`
281			`cont_run = 0;`
282			`break;`
283			`case NOP_PRINTF:`
284			`stackaddr = evalsim_reg32(4);`
285			`simprintf(stackaddr, evalsim_reg32(3));`
286			`debug(5, "simprintf %x\n", stackaddr);`
287			`break;`
288			`case NOP_REPORT:`
289			`printf("report(0x%x);\n", evalsim_reg32(3));`
290			`default:`
291			`if (k >= NOP_REPORT_FIRST && k <= NOP_REPORT_LAST)`
292			`printf("report %i (0x%x);\n", k - NOP_REPORT_FIRST, evalsim_reg32(3));`
293			`break;`
294			`}`
295			`}`
296			`INSTRUCTION (l_sfeq) {`
297			`IFF (config.cpu.dependstats) cur->func_unit = it_compare;`
298			`flag = eval_operand32(0, &breakpoint) == eval_operand32(1, &breakpoint);`
299			`setsprbits(SPR_SR, SPR_SR_F, flag);`
300			`}`
301			`INSTRUCTION (l_sfne) {`
302			`IFF (config.cpu.dependstats) cur->func_unit = it_compare;`
303			`flag = eval_operand32(0, &breakpoint) != eval_operand32(1, &breakpoint);`
304			`setsprbits(SPR_SR, SPR_SR_F, flag);`
305			`}`
306			`INSTRUCTION (l_sfgts) {`
307			`IFF (config.cpu.dependstats) cur->func_unit = it_compare;`
308			`flag = (signed)eval_operand32(0, &breakpoint) > (signed)eval_operand32(1, &breakpoint);`
309			`setsprbits(SPR_SR, SPR_SR_F, flag);`
310			`}`
311			`INSTRUCTION (l_sfges) {`
312			`IFF (config.cpu.dependstats) cur->func_unit = it_compare;`
313			`flag = (signed)eval_operand32(0, &breakpoint) >= (signed)eval_operand32(1, &breakpoint);`
314			`setsprbits(SPR_SR, SPR_SR_F, flag);`
315			`}`
316			`INSTRUCTION (l_sflts) {`
317			`IFF (config.cpu.dependstats) cur->func_unit = it_compare;`
318			`flag = (signed)eval_operand32(0, &breakpoint) < (signed)eval_operand32(1, &breakpoint);`
319			`setsprbits(SPR_SR, SPR_SR_F, flag);`
320			`}`
321			`INSTRUCTION (l_sfles) {`
322			`IFF (config.cpu.dependstats) cur->func_unit = it_compare;`
323			`flag = (signed)eval_operand32(0, &breakpoint) <= (signed)eval_operand32(1, &breakpoint);`
324			`setsprbits(SPR_SR, SPR_SR_F, flag);`
325			`}`
326			`INSTRUCTION (l_sfgtu) {`
327			`IFF (config.cpu.dependstats) cur->func_unit = it_compare;`
328			`flag = (unsigned)eval_operand32(0, &breakpoint) > (unsigned)eval_operand32(1, &breakpoint);`
329			`setsprbits(SPR_SR, SPR_SR_F, flag);`
330			`}`
331			`INSTRUCTION (l_sfgeu) {`
332			`IFF (config.cpu.dependstats) cur->func_unit = it_compare;`
333			`flag = (unsigned)eval_operand32(0, &breakpoint) >= (unsigned) eval_operand32(1, &breakpoint);`
334			`setsprbits(SPR_SR, SPR_SR_F, flag);`
335			`}`
336			`INSTRUCTION (l_sfltu) {`
337			`IFF (config.cpu.dependstats) cur->func_unit = it_compare;`
338			`flag = (unsigned)eval_operand32(0, &breakpoint) < (unsigned)eval_operand32(1, &breakpoint);`
339			`setsprbits(SPR_SR, SPR_SR_F, flag);`
340			`}`
341			`INSTRUCTION (l_sfleu) {`
342			`IFF (config.cpu.dependstats) cur->func_unit = it_compare;`
343			`flag = (unsigned)eval_operand32(0, &breakpoint) <= (unsigned)eval_operand32(1, &breakpoint);`
344			`setsprbits(SPR_SR, SPR_SR_F, flag);`
345			`}`
346			`INSTRUCTION (l_extbs) {`
347			`unsigned char x;`
348			`IFF (config.cpu.dependstats) cur->func_unit = it_move;`
349			`x = eval_operand32(1, &breakpoint);`
350			`set_operand32(0, (signed long)x, &breakpoint);`
351			`}`
352			`INSTRUCTION (l_extbz) {`
353			`unsigned char x;`
354			`IFF (config.cpu.dependstats) cur->func_unit = it_move;`
355			`x = eval_operand32(1, &breakpoint);`
356			`set_operand32(0, (unsigned long)x, &breakpoint);`
357			`}`
358			`INSTRUCTION (l_exths) {`
359			`unsigned short x;`
360			`IFF (config.cpu.dependstats) cur->func_unit = it_move;`
361			`x = eval_operand32(1, &breakpoint);`
362			`set_operand32(0, (signed long)x, &breakpoint);`
363			`}`
364			`INSTRUCTION (l_exthz) {`
365			`unsigned short x;`
366			`IFF (config.cpu.dependstats) cur->func_unit = it_move;`
367			`x = eval_operand32(1, &breakpoint);`
368			`set_operand32(0, (unsigned long)x, &breakpoint);`
369			`}`
370			`INSTRUCTION (l_extws) {`
371			`unsigned int x;`
372			`IFF (config.cpu.dependstats) cur->func_unit = it_move;`
373			`x = eval_operand32(1, &breakpoint);`
374			`set_operand32(0, (signed long)x, &breakpoint);`
375			`}`
376			`INSTRUCTION (l_extwz) {`
377			`unsigned int x;`
378			`IFF (config.cpu.dependstats) cur->func_unit = it_move;`
379			`x = eval_operand32(1, &breakpoint);`
380			`set_operand32(0, (unsigned long)x, &breakpoint);`
381			`}`
382			`INSTRUCTION (l_mtspr) {`
383			`unsigned long regno = eval_operand32(0, &breakpoint) + eval_operand32(2, &breakpoint);`
384			`unsigned long value = eval_operand32(1, &breakpoint);`
385
386			`if (runtime.sim.fspr_log) {`
387			`fprintf(runtime.sim.fspr_log, "Write to SPR : [%08lX] <- [%08lX]\n", regno, value);`
388			`}`
389
390			`IFF (config.cpu.dependstats) cur->func_unit = it_move;`
391			`if (mfspr(SPR_SR) & SPR_SR_SM)`
392			`mtspr(regno, value);`
393			`else {`
394			`printf("WARNING: trying to write SPR while SR[SUPV] is cleared.\n");`
395			`cont_run = 0;`
396			`}`
397			`}`
398			`INSTRUCTION (l_mfspr) {`
399			`unsigned long regno = eval_operand32(1, &breakpoint) + eval_operand32(2, &breakpoint);`
400			`unsigned long value = mfspr(regno);`
401
402			`if (runtime.sim.fspr_log) {`
403			`fprintf(runtime.sim.fspr_log, "Read from SPR : [%08lX] -> [%08lX]\n", regno, value);`
404			`}`
405
406			`IFF (config.cpu.dependstats) cur->func_unit = it_move;`
407			`if (mfspr(SPR_SR) & SPR_SR_SM)`
408			`set_operand32(0, value, &breakpoint);`
409			`else {`
410			`set_operand32(0, 0, &breakpoint);`
411			`printf("WARNING: trying to read SPR while SR[SUPV] is cleared.\n");`
412			`cont_run = 0;`
413			`}`
414			`}`
415			`INSTRUCTION (l_sys) {`
416			`except_handle(EXCEPT_SYSCALL, mfspr(SPR_EEAR_BASE));`
417			`}`
418			`INSTRUCTION (l_trap) {`
419			`/* TODO: some SR related code here! */`
420			`except_handle(EXCEPT_TRAP, mfspr(SPR_EEAR_BASE));`
421			`}`
422			`INSTRUCTION (l_mac) {`
423			`sprword lo, hi;`
424			`LONGEST l;`
425			`long x, y;`
426			`IFF (config.cpu.dependstats) cur->func_unit = it_mac;`
427			`lo = mfspr (SPR_MACLO);`
428			`hi = mfspr (SPR_MACHI);`
429			`x = eval_operand32(0, &breakpoint);`
430			`y = eval_operand32(1, &breakpoint);`
431			`printf ("[%08x,%08x]\t", (unsigned long)(x), (unsigned long)(y));`
432			`l = (ULONGEST)lo \| ((LONGEST)hi << 32);`
433			`l += (LONGEST) x * (LONGEST) y;`
434
435			`/* This implementation is very fast - it needs only one cycle for mac. */`
436			`lo = ((ULONGEST)l) & 0xFFFFFFFF;`
437			`hi = ((LONGEST)l) >> 32;`
438			`mtspr (SPR_MACLO, lo);`
439			`mtspr (SPR_MACHI, hi);`
440			`printf ("(%08x,%08x)\n", hi, lo);`
441			`}`
442			`INSTRUCTION (l_msb) {`
443			`sprword lo, hi;`
444			`LONGEST l;`
445			`long x, y;`
446			`IFF (config.cpu.dependstats) cur->func_unit = it_mac;`
447			`lo = mfspr (SPR_MACLO);`
448			`hi = mfspr (SPR_MACHI);`
449			`x = eval_operand32(0, &breakpoint);`
450			`y = eval_operand32(1, &breakpoint);`
451			`printf ("[%08x,%08x]\t", (unsigned long)(x), (unsigned long)(y));`
452			`l = (ULONGEST)lo \| ((LONGEST)hi << 32);`
453			`l -= (LONGEST) eval_operand32(0, &breakpoint) * (LONGEST)eval_operand32(1, &breakpoint);`
454
455			`/* This implementation is very fast - it needs only one cycle for msb. */`
456			`lo = ((ULONGEST)l) & 0xFFFFFFFF;`
457			`hi = ((LONGEST)l) >> 32;`
458			`mtspr (SPR_MACLO, lo);`
459			`mtspr (SPR_MACHI, hi);`
460			`printf ("(%08x,%08x)\n", hi, lo);`
461			`}`
462			`INSTRUCTION (l_macrc) {`
463			`sprword lo, hi;`
464			`LONGEST l;`
465			`IFF (config.cpu.dependstats) cur->func_unit = it_mac;`
466			`/* No need for synchronization here -- all MAC instructions are 1 cycle long. */`
467			`lo = mfspr (SPR_MACLO);`
468			`hi = mfspr (SPR_MACHI);`
469			`l = (ULONGEST) lo \| ((LONGEST)hi << 32);`
470			`l >>= 28;`
471			`//printf ("<%08x>\n", (unsigned long)l);`
472			`set_operand32(0, (long)l, &breakpoint);`
473			`mtspr (SPR_MACLO, 0);`
474			`mtspr (SPR_MACHI, 0);`
475			`}`
476			`INSTRUCTION (l_cmov) {`
477			`IFF (config.cpu.dependstats) cur->func_unit = it_move;`
478			`set_operand32 (0, flag ? eval_operand32(1, &breakpoint) : eval_operand32(2, &breakpoint), &breakpoint);`
479			`}`
480			`INSTRUCTION (l_cust1) {`
481			`/*int destr = cur->insn >> 21;`
482			`int src1r = cur->insn >> 15;`
483			`int src2r = cur->insn >> 9;*/`
484			`}`
485			`INSTRUCTION (l_cust2) {`
486			`}`
487			`INSTRUCTION (l_cust3) {`
488			`}`
489			`INSTRUCTION (l_cust4) {`
490			`}`