Subversion Repositories or1k

/* sprs.c -- Simulation of OR1K special-purpose registers

   Copyright (C) 1999 Damjan Lampret, lampret@opencores.org

This file is part of OpenRISC 1000 Architectural Simulator.

This program is free software; you can redistribute it and/or modify

it under the terms of the GNU General Public License as published by

the Free Software Foundation; either version 2 of the License, or

(at your option) any later version.

This program is distributed in the hope that it will be useful,

but WITHOUT ANY WARRANTY; without even the implied warranty of

MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

GNU General Public License for more details.

You should have received a copy of the GNU General Public License

along with this program; if not, write to the Free Software

Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */

#include <stdlib.h>

#include <stdio.h>

#include <string.h>

#include <errno.h>

#include "arch.h"

#include "sprs.h"

#include "abstract.h"

#include "sim-config.h"

extern int flag;

sprword sprs[MAX_SPRS];

int audio_cnt = 0;

static FILE *fo = 0;

/* Set a specific SPR with a value. */

inline void

mtspr(const int regno, const sprword value)

{

  regno %= MAX_SPRS;

  sprs[regno] = value;

  /* MM: Register hooks.  */

  switch (regno) {

  case SPR_TTCR:

    spr_write_ttcr (value);

    break;

  case SPR_TTMR:

    spr_write_ttmr (value);

    break;

  case SPR_SR:

    /* Set internal flag also */

    if(value & SPR_SR_F) flag = 1;

    else flag = 0;

    break;

  case SPR_NPC:

    {

      extern unsigned long pc;

      extern unsigned long pcnext;

      extern int delay_insn;

      extern unsigned long pcdelay;

      clear_pending_exception ();

      /* The debugger has redirected us to a new address */

      /* This is usually done to reissue an instruction

         which just caused a breakpoint exception. */

      pc = value;

      if(!value && config.sim.verbose)

        printf("WARNING: PC just set to 0!\n");

      /* Clear any pending delay slot jumps also */

      delay_insn = 0;

      pcnext = value + 4;

    }

    break;

  case 0xFFFD:

    fo = fopen ("audiosim.pcm", "wb+");

    if (!fo) printf("Cannot open audiosim.pcm\n");

    printf("Audio opened.\n");

    break;

  case 0xFFFE:

    if (!fo) printf("audiosim.pcm not opened\n");

    fputc (value & 0xFF, fo);

    if ((audio_cnt % 1024) == 0)

      printf("%i\n", audio_cnt);

    audio_cnt++;

    break;

  case 0xFFFF:

    fclose(fo);

    printf("Audio closed.\n");

    runtime.sim.cont_run = 0;

    break;

        case SPR_PMR:

          /* PMR[SDF] and PMR[DCGE] are ignored completely. */

          if (value & SPR_PMR_SUME) {

                  printf ("SUSPEND: PMR[SUME] bit was set.\n");

                  runtime.sim.cont_run = 0;

          }

          break;

  default:

    /* Links to GPRS */

    if(regno >= 0x0400 && regno < 0x0420) {

      extern unsigned long reg[32];

      reg[regno - 0x0400] = value;

    }

    break;

  }

}

/* Show status of important SPRs. */

void sprs_status()

{

  printf("VR   : 0x%.8x  UPR  : 0x%.8x\n", mfspr(SPR_VR), mfspr(SPR_UPR));

  printf("SR   : 0x%.8x\n", mfspr(SPR_SR));

  printf("MACLO: 0x%.8x  MACHI: 0x%.8x\n", mfspr(SPR_MACLO), mfspr(SPR_MACHI));

  printf("EPCR0: 0x%.8x  EPCR1: 0x%.8x\n", mfspr(SPR_EPCR_BASE), mfspr(SPR_EPCR_BASE+1));

  printf("EEAR0: 0x%.8x  EEAR1: 0x%.8x\n", mfspr(SPR_EEAR_BASE), mfspr(SPR_EEAR_BASE+1));

  printf("ESR0 : 0x%.8x  ESR1 : 0x%.8x\n", mfspr(SPR_ESR_BASE), mfspr(SPR_ESR_BASE+1));

  printf("TTMR : 0x%.8x  TTCR : 0x%.8x\n", mfspr(SPR_TTMR), mfspr(SPR_TTCR));

  printf("PICMR: 0x%.8x  PICSR: 0x%.8x\n", mfspr(SPR_PICMR), mfspr(SPR_PICSR));

  printf("PPC:   0x%.8x  NPC   : 0x%.8x\n", mfspr(SPR_PPC), mfspr(SPR_NPC));

}