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[/] [or1k/] [tags/] [nog_patch_47/] [or1ksim/] [cpu/] [or32/] [insnset.c] - Blame information for rev 1344

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1 706 markom 
/* execute.c -- Instruction specific functions.
2 
   Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
3 
                 2000-2002 Marko Mlinar, markom@opencores.org
4 
 
5 
This file is part of OpenRISC 1000 Architectural Simulator.
6 
 
7 
This program is free software; you can redistribute it and/or modify
8 
it under the terms of the GNU General Public License as published by
9 
the Free Software Foundation; either version 2 of the License, or
10 
(at your option) any later version.
11 
 
12 
This program is distributed in the hope that it will be useful,
13 
but WITHOUT ANY WARRANTY; without even the implied warranty of
14 
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15 
GNU General Public License for more details.
16 
 
17 
You should have received a copy of the GNU General Public License
18 
along with this program; if not, write to the Free Software
19 
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
20 
 
21 
INSTRUCTION (l_add) {
22 1170 csanchez 
  signed long temp1, temp2, temp3;
23 706 markom 
  signed char temp4;
24 
 
25 1342 nogj 
  temp2 = (signed long)PARAM2;
26 
  temp3 = (signed long)PARAM1;
27 1170 csanchez 
  temp1 = temp2 + temp3;
28 1342 nogj 
  SET_PARAM0(temp1);
29 706 markom 
  set_ov_flag (temp1);
30 
  if (ARITH_SET_FLAG) {
31 
    flag = temp1 == 0;
32 
    setsprbits(SPR_SR, SPR_SR_F, flag);
33 
  }
34 1170 csanchez 
  if ((unsigned long) temp1 < (unsigned long) temp2)
35 
          setsprbits(SPR_SR, SPR_SR_CY, 1);
36 
  else
37 
          setsprbits(SPR_SR, SPR_SR_CY, 0);
38 706 markom 
 
39 
  temp4 = temp1;
40 
  if (temp4 == temp1)
41 1244 hpanther 
    or1k_mstats.byteadd++;
42 706 markom 
}
43 1170 csanchez 
INSTRUCTION (l_addc) {
44 
  signed long temp1, temp2, temp3;
45 
  signed char temp4;
46 
 
47 1342 nogj 
  temp2 = (signed long)PARAM2;
48 
  temp3 = (signed long)PARAM1;
49 1170 csanchez 
  temp1 = temp2 + temp3 + getsprbits(SPR_SR, SPR_SR_CY);
50 1342 nogj 
  SET_PARAM0(temp1);
51 1170 csanchez 
  set_ov_flag (temp1);
52 
  if (ARITH_SET_FLAG) {
53 
    flag = temp1 == 0;
54 
    setsprbits(SPR_SR, SPR_SR_F, flag);
55 
  }
56 
  if ((unsigned long) temp1 < (unsigned long) temp2)
57 
        setsprbits(SPR_SR, SPR_SR_CY, 1);
58 
  else
59 
        setsprbits(SPR_SR, SPR_SR_CY, 0);
60 
 
61 
  temp4 = temp1;
62 
  if (temp4 == temp1)
63 1244 hpanther 
    or1k_mstats.byteadd++;
64 1170 csanchez 
}
65 706 markom 
INSTRUCTION (l_sw) {
66 
  int old_cyc = 0;
67 884 markom 
  IFF (config.cpu.sbuf_len) old_cyc = runtime.sim.mem_cycles;
68 1342 nogj 
  set_mem32(PARAM0, PARAM1, &breakpoint);
69 706 markom 
  if (config.cpu.sbuf_len) {
70 884 markom 
    int t = runtime.sim.mem_cycles;
71 
    runtime.sim.mem_cycles = old_cyc;
72 706 markom 
    sbuf_store (t - old_cyc);
73 
  }
74 
}
75 
INSTRUCTION (l_sb) {
76 
  int old_cyc = 0;
77 884 markom 
  IFF (config.cpu.sbuf_len) old_cyc = runtime.sim.mem_cycles;
78 1342 nogj 
  set_mem8(PARAM0, PARAM1, &breakpoint);
79 706 markom 
  if (config.cpu.sbuf_len) {
80 884 markom 
    int t = runtime.sim.mem_cycles;
81 
    runtime.sim.mem_cycles = old_cyc;
82 706 markom 
    sbuf_store (t- old_cyc);
83 
  }
84 
}
85 
INSTRUCTION (l_sh) {
86 
  int old_cyc = 0;
87 884 markom 
  IFF (config.cpu.sbuf_len) old_cyc = runtime.sim.mem_cycles;
88 1342 nogj 
  set_mem16(PARAM0, PARAM1, &breakpoint);
89 706 markom 
  if (config.cpu.sbuf_len) {
90 884 markom 
    int t = runtime.sim.mem_cycles;
91 
    runtime.sim.mem_cycles = old_cyc;
92 706 markom 
    sbuf_store (t - old_cyc);
93 
  }
94 
}
95 
INSTRUCTION (l_lwz) {
96 
  unsigned long val;
97 
  if (config.cpu.sbuf_len) sbuf_load ();
98 1342 nogj 
  val = eval_mem32(PARAM1, &breakpoint);
99 706 markom 
  /* If eval operand produced exception don't set anything */
100 
  if (!pending.valid)
101 1342 nogj 
    SET_PARAM0(val);
102 706 markom 
}
103 
INSTRUCTION (l_lbs) {
104 
  signed char val;
105 
  if (config.cpu.sbuf_len) sbuf_load ();
106 1342 nogj 
  val = eval_mem8(PARAM1, &breakpoint);
107 706 markom 
  /* If eval opreand produced exception don't set anything */
108 
  if (!pending.valid)
109 1342 nogj 
    SET_PARAM0(val);
110 706 markom 
}
111 
INSTRUCTION (l_lbz) {
112 
  unsigned char val;
113 
  if (config.cpu.sbuf_len) sbuf_load ();
114 1342 nogj 
  val = eval_mem8(PARAM1, &breakpoint);
115 706 markom 
  /* If eval opreand produced exception don't set anything */
116 
  if (!pending.valid)
117 1342 nogj 
    SET_PARAM0(val);
118 706 markom 
}
119 
INSTRUCTION (l_lhs) {
120 
  signed short val;
121 
  if (config.cpu.sbuf_len) sbuf_load ();
122 1342 nogj 
  val = eval_mem16(PARAM1, &breakpoint);
123 706 markom 
  /* If eval opreand produced exception don't set anything */
124 
  if (!pending.valid)
125 1342 nogj 
    SET_PARAM0(val);
126 706 markom 
}
127 
INSTRUCTION (l_lhz) {
128 
  unsigned short val;
129 
  if (config.cpu.sbuf_len) sbuf_load ();
130 1342 nogj 
  val = eval_mem16(PARAM1, &breakpoint);
131 706 markom 
  /* If eval opreand produced exception don't set anything */
132 
  if (!pending.valid)
133 1342 nogj 
    SET_PARAM0(val);
134 706 markom 
}
135 
INSTRUCTION (l_movhi) {
136 1342 nogj 
  SET_PARAM0(PARAM1 << 16);
137 706 markom 
}
138 
INSTRUCTION (l_and) {
139 
  unsigned long temp1;
140 1342 nogj 
  temp1 = PARAM1 & PARAM2;
141 
  set_ov_flag (temp1);
142 
  SET_PARAM0(temp1);
143 706 markom 
  if (ARITH_SET_FLAG) {
144 
    flag = temp1 == 0;
145 
    setsprbits(SPR_SR, SPR_SR_F, flag);
146 
  }
147 
}
148 
INSTRUCTION (l_or) {
149 1342 nogj 
  unsigned long temp1;
150 
  temp1 = PARAM1 | PARAM2;
151 
  set_ov_flag (temp1);
152 
  SET_PARAM0(temp1);
153 706 markom 
}
154 
INSTRUCTION (l_xor) {
155 1342 nogj 
  unsigned long temp1;
156 
  temp1 = PARAM1 ^ PARAM2;
157 
  set_ov_flag (temp1);
158 
  SET_PARAM0(temp1);
159 706 markom 
}
160 
INSTRUCTION (l_sub) {
161 1342 nogj 
  signed long temp1;
162 
  temp1 = (signed long)PARAM1 - (signed long)PARAM2;
163 
  set_ov_flag (temp1);
164 
  SET_PARAM0(temp1);
165 706 markom 
}
166 
/*int mcount = 0;*/
167 
INSTRUCTION (l_mul) {
168 1342 nogj 
  signed long temp1;
169 706 markom 
 
170 1342 nogj 
  temp1 = PARAM1 * PARAM2;
171 
  set_ov_flag (temp1);
172 
  SET_PARAM0(temp1);
173 706 markom 
  /*if (!(mcount++ & 1023)) {
174 997 markom 
    PRINTF ("[%i]\n",mcount);
175 706 markom 
    }*/
176 
}
177 
INSTRUCTION (l_div) {
178 
  signed long temp3, temp2, temp1;
179 
 
180 1342 nogj 
  temp3 = PARAM2;
181 
  temp2 = PARAM1;
182 706 markom 
  if (temp3)
183 
    temp1 = temp2 / temp3;
184 
  else {
185 
    except_handle(EXCEPT_ILLEGAL, iqueue[0].insn_addr);
186 
    return;
187 
  }
188 1342 nogj 
  set_ov_flag (temp1);
189 
  SET_PARAM0(temp1);
190 706 markom 
}
191 
INSTRUCTION (l_divu) {
192 
  unsigned long temp3, temp2, temp1;
193 
 
194 1342 nogj 
  temp3 = PARAM2;
195 
  temp2 = PARAM1;
196 
  if (temp3)
197 
    temp1 = temp2 / temp3;
198 
  else {
199 
    except_handle(EXCEPT_ILLEGAL, iqueue[0].insn_addr);
200 
    return;
201 
  }
202 
  set_ov_flag (temp1);
203 
  SET_PARAM0(temp1);
204 884 markom 
  /* runtime.sim.cycles += 16; */
205 706 markom 
}
206 
INSTRUCTION (l_sll) {
207 1342 nogj 
  unsigned long temp1;
208 
 
209 
  temp1 = PARAM1 << PARAM2;
210 
  set_ov_flag (temp1);
211 
  SET_PARAM0(temp1);
212 884 markom 
  /* runtime.sim.cycles += 2; */
213 706 markom 
}
214 
INSTRUCTION (l_sra) {
215 1342 nogj 
  signed long temp1;
216 706 markom 
 
217 1342 nogj 
  temp1 = (signed)PARAM1 >> PARAM2;
218 
  set_ov_flag (temp1);
219 
  SET_PARAM0(temp1);
220 884 markom 
  /* runtime.sim.cycles += 2; */
221 706 markom 
}
222 
INSTRUCTION (l_srl) {
223 1342 nogj 
  unsigned long temp1;
224 
  temp1 = PARAM1 >> PARAM2;
225 
  set_ov_flag (temp1);
226 
  SET_PARAM0(temp1);
227 884 markom 
  /* runtime.sim.cycles += 2; */
228 706 markom 
}
229 
INSTRUCTION (l_bf) {
230 
  if (config.bpb.enabled) {
231 1342 nogj 
    int fwd = (PARAM0 >= pc) ? 1 : 0;
232 1244 hpanther 
    or1k_mstats.bf[flag][fwd]++;
233 713 markom 
    bpb_update(current->insn_addr, flag);
234 706 markom 
  }
235 
  if (flag) {
236 1342 nogj 
    pcdelay = pc + (signed)PARAM0 * 4;
237 706 markom 
    btic_update(pcnext);
238 
    next_delay_insn = 1;
239 
  } else {
240 
    btic_update(pc);
241 
  }
242 
}
243 
INSTRUCTION (l_bnf) {
244 
  if (config.bpb.enabled) {
245 1342 nogj 
    int fwd = (PARAM0 >= pc) ? 1 : 0;
246 1244 hpanther 
    or1k_mstats.bnf[!flag][fwd]++;
247 713 markom 
    bpb_update(current->insn_addr, flag == 0);
248 706 markom 
  }
249 
  if (flag == 0) {
250 1342 nogj 
    pcdelay = pc + (signed)PARAM0 * 4;
251 706 markom 
    btic_update(pcnext);
252 
    next_delay_insn = 1;
253 
  } else {
254 
    btic_update(pc);
255 
  }
256 
}
257 
INSTRUCTION (l_j) {
258 1342 nogj 
  pcdelay = pc + (signed)PARAM0 * 4;
259 706 markom 
  next_delay_insn = 1;
260 
}
261 
INSTRUCTION (l_jal) {
262 1342 nogj 
  pcdelay = pc + (signed)PARAM0 * 4;
263 706 markom 
 
264 
  set_reg32(LINK_REGNO, pc + 8);
265 
  next_delay_insn = 1;
266 
  if (config.sim.profile) {
267 
    struct label_entry *tmp;
268 
    if (verify_memoryarea(pcdelay) && (tmp = get_label (pcdelay)))
269 1343 nogj 
      fprintf (runtime.sim.fprof, "+%08llX %08lX %08lX %s\n",
270 
               runtime.sim.cycles, pc + 8, pcdelay, tmp->name);
271 706 markom 
    else
272 1343 nogj 
      fprintf (runtime.sim.fprof, "+%08llX %08lX %08lX @%08lX\n",
273 
               runtime.sim.cycles, pc + 8, pcdelay, pcdelay);
274 706 markom 
  }
275 
}
276 
INSTRUCTION (l_jalr) {
277 1342 nogj 
  pcdelay = PARAM0;
278 706 markom 
  set_reg32(LINK_REGNO, pc + 8);
279 
  next_delay_insn = 1;
280 
}
281 
INSTRUCTION (l_jr) {
282 1342 nogj 
  pcdelay = PARAM0;
283 706 markom 
  next_delay_insn = 1;
284 
  if (config.sim.profile)
285 1343 nogj 
    fprintf (runtime.sim.fprof, "-%08llX %08lX\n", runtime.sim.cycles, pcdelay);
286 706 markom 
}
287 
INSTRUCTION (l_rfe) {
288 
  pcnext = mfspr(SPR_EPCR_BASE);
289 
  mtspr(SPR_SR, mfspr(SPR_ESR_BASE));
290 
}
291 
INSTRUCTION (l_nop) {
292 
  unsigned long stackaddr;
293 1342 nogj 
  int k = PARAM0;
294 706 markom 
  switch (k) {
295 
    case NOP_NOP:
296 
      break;
297 
    case NOP_EXIT:
298 1343 nogj 
      PRINTF("exit(%ld)\n", evalsim_reg32 (3));
299 
      fprintf(stderr, "@reset : cycles %lld, insn #%lld\n",
300 
              runtime.sim.reset_cycles, runtime.cpu.reset_instructions);
301 
      fprintf(stderr, "@exit  : cycles %lld, insn #%lld\n", runtime.sim.cycles,
302 
              runtime.cpu.instructions);
303 
      fprintf(stderr, " diff  : cycles %lld, insn #%lld\n",
304 
              runtime.sim.cycles - runtime.sim.reset_cycles,
305 
              runtime.cpu.instructions - runtime.cpu.reset_instructions);
306 706 markom 
      if (config.debug.gdb_enabled)
307 
        set_stall_state (1);
308 
      else
309 884 markom 
        runtime.sim.cont_run = 0;
310 706 markom 
      break;
311 1319 phoenix 
    case NOP_CNT_RESET:
312 
      PRINTF("****************** counters reset ******************\n");
313 
      PRINTF("cycles %lld, insn #%lld\n", runtime.sim.cycles, runtime.cpu.instructions);
314 
      PRINTF("****************** counters reset ******************\n");
315 
      runtime.sim.reset_cycles = runtime.sim.cycles;
316 
      runtime.cpu.reset_instructions = runtime.cpu.instructions;
317 
      break;
318 706 markom 
    case NOP_PRINTF:
319 
      stackaddr = evalsim_reg32(4);
320 
      simprintf(stackaddr, evalsim_reg32(3));
321 
      debug(5, "simprintf %x\n", stackaddr);
322 
      break;
323 
    case NOP_REPORT:
324 1343 nogj 
      PRINTF("report(0x%lx);\n", evalsim_reg32(3));
325 706 markom 
    default:
326 
      if (k >= NOP_REPORT_FIRST && k <= NOP_REPORT_LAST)
327 1343 nogj 
      PRINTF("report %i (0x%lx);\n", k - NOP_REPORT_FIRST, evalsim_reg32(3));
328 706 markom 
      break;
329 
  }
330 
}
331 
INSTRUCTION (l_sfeq) {
332 1342 nogj 
  flag = PARAM0 == PARAM1;
333 706 markom 
  setsprbits(SPR_SR, SPR_SR_F, flag);
334 
}
335 
INSTRUCTION (l_sfne) {
336 1342 nogj 
  flag = PARAM0 != PARAM1;
337 706 markom 
  setsprbits(SPR_SR, SPR_SR_F, flag);
338 
}
339 
INSTRUCTION (l_sfgts) {
340 1342 nogj 
  flag = (signed)PARAM0 > (signed)PARAM1;
341 706 markom 
  setsprbits(SPR_SR, SPR_SR_F, flag);
342 
}
343 
INSTRUCTION (l_sfges) {
344 1342 nogj 
  flag = (signed)PARAM0 >= (signed)PARAM1;
345 706 markom 
  setsprbits(SPR_SR, SPR_SR_F, flag);
346 
}
347 
INSTRUCTION (l_sflts) {
348 1342 nogj 
  flag = (signed)PARAM0 < (signed)PARAM1;
349 706 markom 
  setsprbits(SPR_SR, SPR_SR_F, flag);
350 
}
351 
INSTRUCTION (l_sfles) {
352 1342 nogj 
  flag = (signed)PARAM0 <= (signed)PARAM1;
353 706 markom 
  setsprbits(SPR_SR, SPR_SR_F, flag);
354 
}
355 
INSTRUCTION (l_sfgtu) {
356 1342 nogj 
  flag = (unsigned)PARAM0 > (unsigned)PARAM1;
357 706 markom 
  setsprbits(SPR_SR, SPR_SR_F, flag);
358 
}
359 
INSTRUCTION (l_sfgeu) {
360 1342 nogj 
  flag = (unsigned)PARAM0 >= (unsigned)PARAM1;
361 706 markom 
  setsprbits(SPR_SR, SPR_SR_F, flag);
362 
}
363 
INSTRUCTION (l_sfltu) {
364 1342 nogj 
  flag = (unsigned)PARAM0 < (unsigned)PARAM1;
365 706 markom 
  setsprbits(SPR_SR, SPR_SR_F, flag);
366 
}
367 
INSTRUCTION (l_sfleu) {
368 1342 nogj 
  flag = (unsigned)PARAM0 <= (unsigned)PARAM1;
369 706 markom 
  setsprbits(SPR_SR, SPR_SR_F, flag);
370 
}
371 
INSTRUCTION (l_extbs) {
372 
  unsigned char x;
373 1342 nogj 
  x = PARAM1;
374 
  SET_PARAM0((signed long)x);
375 706 markom 
}
376 
INSTRUCTION (l_extbz) {
377 
  unsigned char x;
378 1342 nogj 
  x = PARAM1;
379 
  SET_PARAM0((unsigned long)x);
380 706 markom 
}
381 
INSTRUCTION (l_exths) {
382 
  unsigned short x;
383 1342 nogj 
  x = PARAM1;
384 
  SET_PARAM0((signed long)x);
385 706 markom 
}
386 
INSTRUCTION (l_exthz) {
387 
  unsigned short x;
388 1342 nogj 
  x = PARAM1;
389 
  SET_PARAM0((unsigned long)x);
390 706 markom 
}
391 
INSTRUCTION (l_extws) {
392 
  unsigned int x;
393 1342 nogj 
  x = PARAM1;
394 
  SET_PARAM0((signed long)x);
395 706 markom 
}
396 
INSTRUCTION (l_extwz) {
397 
  unsigned int x;
398 1342 nogj 
  x = PARAM1;
399 
  SET_PARAM0((unsigned long)x);
400 706 markom 
}
401 
INSTRUCTION (l_mtspr) {
402 1342 nogj 
  unsigned long regno = PARAM0 + PARAM2;
403 
  unsigned long value = PARAM1;
404 706 markom 
 
405 
  if (runtime.sim.fspr_log) {
406 
    fprintf(runtime.sim.fspr_log, "Write to SPR  : [%08lX] <- [%08lX]\n", regno, value);
407 
  }
408 
 
409 
  if (mfspr(SPR_SR) & SPR_SR_SM)
410 
    mtspr(regno, value);
411 
  else {
412 997 markom 
    PRINTF("WARNING: trying to write SPR while SR[SUPV] is cleared.\n");
413 884 markom 
    runtime.sim.cont_run = 0;
414 706 markom 
  }
415 
}
416 
INSTRUCTION (l_mfspr) {
417 1342 nogj 
  unsigned long regno = PARAM1 + PARAM2;
418 706 markom 
  unsigned long value = mfspr(regno);
419 
 
420 
  if (runtime.sim.fspr_log) {
421 
    fprintf(runtime.sim.fspr_log, "Read from SPR : [%08lX] -> [%08lX]\n", regno, value);
422 
  }
423 
 
424 
  if (mfspr(SPR_SR) & SPR_SR_SM)
425 1342 nogj 
    SET_PARAM0(value);
426 706 markom 
  else {
427 1342 nogj 
    SET_PARAM0(0);
428 997 markom 
    PRINTF("WARNING: trying to read SPR while SR[SUPV] is cleared.\n");
429 884 markom 
    runtime.sim.cont_run = 0;
430 706 markom 
  }
431 
}
432 
INSTRUCTION (l_sys) {
433 
  except_handle(EXCEPT_SYSCALL, mfspr(SPR_EEAR_BASE));
434 
}
435 
INSTRUCTION (l_trap) {
436 
  /* TODO: some SR related code here! */
437 
  except_handle(EXCEPT_TRAP, mfspr(SPR_EEAR_BASE));
438 
}
439 
INSTRUCTION (l_mac) {
440 
  sprword lo, hi;
441 
  LONGEST l;
442 
  long x, y;
443 
  lo = mfspr (SPR_MACLO);
444 
  hi = mfspr (SPR_MACHI);
445 1342 nogj 
  x = PARAM0;
446 
  y = PARAM1;
447 1343 nogj 
  PRINTF ("[%08lx,%08lx]\t", (unsigned long)(x), (unsigned long)(y));
448 706 markom 
  l = (ULONGEST)lo | ((LONGEST)hi << 32);
449 
  l += (LONGEST) x * (LONGEST) y;
450 
 
451 
  /* This implementation is very fast - it needs only one cycle for mac.  */
452 
  lo = ((ULONGEST)l) & 0xFFFFFFFF;
453 
  hi = ((LONGEST)l) >> 32;
454 
  mtspr (SPR_MACLO, lo);
455 
  mtspr (SPR_MACHI, hi);
456 1308 phoenix 
  PRINTF ("(%08lx,%08lx)\n", hi, lo);
457 706 markom 
}
458 
INSTRUCTION (l_msb) {
459 
  sprword lo, hi;
460 
  LONGEST l;
461 
  long x, y;
462 
  lo = mfspr (SPR_MACLO);
463 
  hi = mfspr (SPR_MACHI);
464 1342 nogj 
  x = PARAM0;
465 
  y = PARAM1;
466 1343 nogj 
  PRINTF ("[%08lx,%08lx]\t", (unsigned long)(x), (unsigned long)(y));
467 706 markom 
  l = (ULONGEST)lo | ((LONGEST)hi << 32);
468 1342 nogj 
  l -= x * y;
469 706 markom 
 
470 
  /* This implementation is very fast - it needs only one cycle for msb.  */
471 
  lo = ((ULONGEST)l) & 0xFFFFFFFF;
472 
  hi = ((LONGEST)l) >> 32;
473 
  mtspr (SPR_MACLO, lo);
474 
  mtspr (SPR_MACHI, hi);
475 1308 phoenix 
  PRINTF ("(%08lx,%08lx)\n", hi, lo);
476 706 markom 
}
477 
INSTRUCTION (l_macrc) {
478 
  sprword lo, hi;
479 
  LONGEST l;
480 
  /* No need for synchronization here -- all MAC instructions are 1 cycle long.  */
481 
  lo =  mfspr (SPR_MACLO);
482 
  hi =  mfspr (SPR_MACHI);
483 
  l = (ULONGEST) lo | ((LONGEST)hi << 32);
484 
  l >>= 28;
485 997 markom 
  //PRINTF ("<%08x>\n", (unsigned long)l);
486 1342 nogj 
  SET_PARAM0((long)l);
487 706 markom 
  mtspr (SPR_MACLO, 0);
488 
  mtspr (SPR_MACHI, 0);
489 
}
490 
INSTRUCTION (l_cmov) {
491 1342 nogj 
  SET_PARAM0(flag ? PARAM1 : PARAM2);
492 706 markom 
}
493 1338 andreje 
INSTRUCTION (l_ff1) {
494 1342 nogj 
  SET_PARAM0(ffs(PARAM1));
495 1338 andreje 
}
496 720 markom 
/******* Floating point instructions *******/
497 
/* Single precision */
498 
INSTRUCTION (lf_add_s) {
499 1342 nogj 
  SET_PARAM0((machword)((float)PARAM1 + (float)PARAM2));
500 720 markom 
}
501 
INSTRUCTION (lf_div_s) {
502 1342 nogj 
  SET_PARAM0((machword)((float)PARAM1 / (float)PARAM2));
503 720 markom 
}
504 1303 phoenix 
INSTRUCTION (lf_ftoi_s) {
505 
//  set_operand32(0, freg[get_operand(1)], &breakpoint);
506 720 markom 
}
507 
INSTRUCTION (lf_itof_s) {
508 1303 phoenix 
//  freg[get_operand(0)] = eval_operand32(1, &breakpoint);
509 
}
510 720 markom 
INSTRUCTION (lf_madd_s) {
511 1342 nogj 
  SET_PARAM0((machword)((float)PARAM0 + (float)PARAM1 * (float)PARAM2));
512 720 markom 
}
513 
INSTRUCTION (lf_mul_s) {
514 1342 nogj 
  SET_PARAM0((machword)((float)PARAM1 * (float)PARAM2));
515 720 markom 
}
516 
INSTRUCTION (lf_rem_s) {
517 1342 nogj 
  float temp = (float)PARAM1 / (float)PARAM2;
518 
  SET_PARAM0(temp - (machword)temp);
519 720 markom 
}
520 
INSTRUCTION (lf_sfeq_s) {
521 1342 nogj 
  flag = (float)PARAM0 == (float)PARAM1;
522 720 markom 
  setsprbits(SPR_SR, SPR_SR_F, flag);
523 
}
524 
INSTRUCTION (lf_sfge_s) {
525 1342 nogj 
  flag = (float)PARAM0 >= (float)PARAM1;
526 720 markom 
  setsprbits(SPR_SR, SPR_SR_F, flag);
527 
}
528 
INSTRUCTION (lf_sfgt_s) {
529 1342 nogj 
  flag = (float)PARAM0 > (float)PARAM1;
530 720 markom 
  setsprbits(SPR_SR, SPR_SR_F, flag);
531 
}
532 
INSTRUCTION (lf_sfle_s) {
533 1342 nogj 
  flag = (float)PARAM0 <= (float)PARAM1;
534 720 markom 
  setsprbits(SPR_SR, SPR_SR_F, flag);
535 
}
536 
INSTRUCTION (lf_sflt_s) {
537 1342 nogj 
  flag = (float)PARAM0 < (float)PARAM1;
538 720 markom 
  setsprbits(SPR_SR, SPR_SR_F, flag);
539 
}
540 
INSTRUCTION (lf_sfne_s) {
541 1342 nogj 
  flag = (float)PARAM0 != (float)PARAM1;
542 720 markom 
  setsprbits(SPR_SR, SPR_SR_F, flag);
543 
}
544 
INSTRUCTION (lf_sub_s) {
545 1342 nogj 
  SET_PARAM0((machword)((float)PARAM1 - (float)PARAM2));
546 720 markom 
}
547 
 
548 
/******* Custom instructions *******/
549 706 markom 
INSTRUCTION (l_cust1) {
550 713 markom 
  /*int destr = current->insn >> 21;
551 
    int src1r = current->insn >> 15;
552 
    int src2r = current->insn >> 9;*/
553 706 markom 
}
554 
INSTRUCTION (l_cust2) {
555 
}
556 
INSTRUCTION (l_cust3) {
557 
}
558 
INSTRUCTION (l_cust4) {
559 
}

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