OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_47/] [or1ksim/] [peripheral/] [gpio.c] - Blame information for rev 1782

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 444 erez
/* gpio.h -- GPIO code simulation
2
   Copyright (C) 2001 Erez Volk, erez@mailandnews.comopencores.org
3
 
4
   This file is part of OpenRISC 1000 Architectural Simulator.
5
 
6
   This program is free software; you can redistribute it and/or modify
7
   it under the terms of the GNU General Public License as published by
8
   the Free Software Foundation; either version 2 of the License, or
9
   (at your option) any later version.
10
 
11
   This program is distributed in the hope that it will be useful,
12
   but WITHOUT ANY WARRANTY; without even the implied warranty of
13
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14
   GNU General Public License for more details.
15
 
16
   You should have received a copy of the GNU General Public License
17
   along with this program; if not, write to the Free Software
18
   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19
*/
20 1308 phoenix
#include <string.h>
21 444 erez
 
22 1350 nogj
#include "config.h"
23
 
24
#ifdef HAVE_INTTYPES_H
25
#include <inttypes.h>
26
#endif
27
 
28
#include "port.h"
29
#include "arch.h"
30 1308 phoenix
#include "abstract.h"
31 444 erez
#include "gpio.h"
32
#include "gpio_i.h"
33
#include "sim-config.h"
34
#include "pic.h"
35
#include "vapi.h"
36 1308 phoenix
#include "debug.h"
37 1374 nogj
#include "sched.h"
38 444 erez
 
39 1366 nogj
static void gpio_vapi_read( unsigned long id, unsigned long data, void *dat );
40 1359 nogj
static uint32_t gpio_read32( oraddr_t addr, void *dat );
41
static void gpio_write32( oraddr_t addr, uint32_t value, void *dat );
42 444 erez
 
43 1374 nogj
static void gpio_external_clock( unsigned long value, struct gpio_device *gpio );
44 444 erez
static void gpio_device_clock( struct gpio_device *gpio );
45
 
46
/* Initialize all parameters and state */
47 1374 nogj
void gpio_reset( void *dat )
48 444 erez
{
49 1374 nogj
  struct gpio_device *gpio = dat;
50 444 erez
 
51 1374 nogj
  if ( gpio->baseaddr != 0 ) {
52
    /* Possibly connect to VAPI */
53
    if ( gpio->base_vapi_id ) {
54
      vapi_install_multi_handler( gpio->base_vapi_id, GPIO_NUM_VAPI_IDS, gpio_vapi_read, dat );
55 444 erez
    }
56
  }
57
}
58
 
59
 
60
/* Dump status */
61 1374 nogj
void gpio_status( void *dat )
62 444 erez
{
63 1374 nogj
  struct gpio_device *gpio = dat;
64 444 erez
 
65 1374 nogj
  if ( gpio->baseaddr == 0 )
66
    return;
67 444 erez
 
68 1374 nogj
  PRINTF( "\nGPIO at 0x%"PRIxADDR":\n", gpio->baseaddr );
69
  PRINTF( "RGPIO_IN     : 0x%08lX\n", gpio->curr.in );
70
  PRINTF( "RGPIO_OUT    : 0x%08lX\n", gpio->curr.out );
71
  PRINTF( "RGPIO_OE     : 0x%08lX\n", gpio->curr.oe );
72
  PRINTF( "RGPIO_INTE   : 0x%08lX\n", gpio->curr.inte );
73
  PRINTF( "RGPIO_PTRIG  : 0x%08lX\n", gpio->curr.ptrig );
74
  PRINTF( "RGPIO_AUX    : 0x%08lX\n", gpio->curr.aux );
75
  PRINTF( "RGPIO_CTRL   : 0x%08lX\n", gpio->curr.ctrl );
76
  PRINTF( "RGPIO_INTS   : 0x%08lX\n", gpio->curr.ints );
77 444 erez
}
78
 
79
 
80
/* Wishbone read */
81 1359 nogj
uint32_t gpio_read32( oraddr_t addr, void *dat )
82 444 erez
{
83 1374 nogj
  struct gpio_device *gpio = dat;
84 444 erez
 
85 1374 nogj
  addr -= gpio->baseaddr;
86
 
87 444 erez
  switch( addr ) {
88 502 erez
  case RGPIO_IN: return gpio->curr.in | gpio->curr.out;
89 444 erez
  case RGPIO_OUT: return gpio->curr.out;
90
  case RGPIO_OE: return gpio->curr.oe;
91
  case RGPIO_INTE: return gpio->curr.inte;
92
  case RGPIO_PTRIG: return gpio->curr.ptrig;
93
  case RGPIO_AUX: return gpio->curr.aux;
94
  case RGPIO_CTRL: return gpio->curr.ctrl;
95 502 erez
  case RGPIO_INTS: return gpio->curr.ints;
96 444 erez
  }
97 1374 nogj
 
98
  return 0;
99 444 erez
}
100
 
101
 
102
/* Wishbone write */
103 1359 nogj
void gpio_write32( oraddr_t addr, uint32_t value, void *dat )
104 444 erez
{
105 1374 nogj
  struct gpio_device *gpio = dat;
106 444 erez
 
107 1374 nogj
  addr -= gpio->baseaddr;
108
 
109 444 erez
  switch( addr ) {
110 483 erez
  case RGPIO_IN: debug( 5, "GPIO: Cannot write to RGPIO_IN\n" ); break;
111 444 erez
  case RGPIO_OUT: gpio->next.out = value; break;
112
  case RGPIO_OE: gpio->next.oe = value; break;
113
  case RGPIO_INTE: gpio->next.inte = value; break;
114
  case RGPIO_PTRIG: gpio->next.ptrig = value; break;
115
  case RGPIO_AUX: gpio->next.aux = value; break;
116
  case RGPIO_CTRL: gpio->next.ctrl = value; break;
117 502 erez
  case RGPIO_INTS: gpio->next.ints = value; break;
118 444 erez
  }
119
}
120
 
121
 
122
/* Input from "outside world" */
123 1366 nogj
void gpio_vapi_read( unsigned long id, unsigned long data, void *dat )
124 444 erez
{
125
  unsigned which;
126 1374 nogj
  struct gpio_device *gpio = dat;
127 444 erez
 
128 1350 nogj
  debug( 5, "GPIO: id %08lx, data %08lx\n", id, data );
129 444 erez
 
130 1374 nogj
  which = id - gpio->base_vapi_id;
131 444 erez
 
132
  switch( which ) {
133 477 erez
  case GPIO_VAPI_DATA:
134 1350 nogj
    debug( 4, "GPIO: Next input from VAPI = 0x%08lx (RGPIO_OE = 0x%08lx)\n",
135
           data, gpio->next.oe );
136 477 erez
    gpio->next.in = data;
137
    break;
138
  case GPIO_VAPI_AUX:
139
    gpio->auxiliary_inputs = data;
140
    break;
141
  case GPIO_VAPI_RGPIO_OE:
142
    gpio->next.oe = data;
143
    break;
144
  case GPIO_VAPI_RGPIO_INTE:
145
    gpio->next.inte = data;
146
    break;
147
  case GPIO_VAPI_RGPIO_PTRIG:
148
    gpio->next.ptrig = data;
149
    break;
150
  case GPIO_VAPI_RGPIO_AUX:
151
    gpio->next.aux = data;
152
    break;
153
  case GPIO_VAPI_RGPIO_CTRL:
154
    gpio->next.ctrl = data;
155
    break;
156
  case GPIO_VAPI_CLOCK:
157 1374 nogj
    gpio_external_clock( data, gpio );
158 477 erez
    break;
159 444 erez
  }
160
 
161 1374 nogj
  /* Clock the device */
162
  if ( !(gpio->curr.ctrl & RGPIO_CTRL_ECLK) )
163
    gpio_device_clock( gpio );
164 444 erez
}
165
 
166
/* External Clock. */
167 1374 nogj
static void gpio_external_clock( unsigned long value, struct gpio_device *gpio )
168 444 erez
{
169 1374 nogj
  int use_external_clock = ((gpio->curr.ctrl & RGPIO_CTRL_ECLK) == RGPIO_CTRL_ECLK);
170
  int negative_edge = ((gpio->curr.ctrl & RGPIO_CTRL_NEC) == RGPIO_CTRL_NEC);
171 444 erez
 
172 477 erez
  /* "Normalize" clock value */
173 444 erez
  value = (value != 0);
174
 
175 1374 nogj
  gpio->next.external_clock = value;
176 444 erez
 
177 1374 nogj
  if ( use_external_clock && (gpio->next.external_clock != gpio->curr.external_clock) && (value != negative_edge) )
178
    /* Make sure that in vapi_read, we don't clock the device */
179
    if ( gpio->curr.ctrl & RGPIO_CTRL_ECLK )
180 444 erez
      gpio_device_clock( gpio );
181
}
182
 
183 1374 nogj
/* Report an interrupt to the sim */
184
void gpio_do_int( void *dat )
185
{
186
  struct gpio_device *gpio = dat;
187 477 erez
 
188 1374 nogj
  report_interrupt( gpio->irq );
189
}
190
 
191 444 erez
/* Clock as handld by one device. */
192 1374 nogj
static void gpio_device_clock( struct gpio_device *gpio )
193 444 erez
{
194 445 erez
  /* Calculate new inputs and outputs */
195
  gpio->next.in &= ~gpio->next.oe; /* Only input bits */
196
  /* Replace requested output bits with aux input */
197
  gpio->next.out = (gpio->next.out & ~gpio->next.aux) | (gpio->auxiliary_inputs & gpio->next.aux);
198
  gpio->next.out &= gpio->next.oe; /* Only output-enabled bits */
199
 
200 444 erez
  /* If any outputs changed, notify the world (i.e. vapi) */
201 477 erez
  if ( gpio->next.out != gpio->curr.out ) {
202 1350 nogj
    debug( 4, "GPIO: New output 0x%08lx, RGPIO_OE = 0x%08lx\n", gpio->next.out,
203
           gpio->next.oe );
204 477 erez
    if ( gpio->base_vapi_id )
205
      vapi_send( gpio->base_vapi_id + GPIO_VAPI_DATA, gpio->next.out );
206
  }
207 444 erez
 
208 445 erez
  /* If any inputs changed and interrupt enabled, generate interrupt */
209 477 erez
  if ( gpio->next.in != gpio->curr.in ) {
210 1350 nogj
    debug( 4, "GPIO: New input 0x%08lx\n", gpio->next.in );
211 477 erez
 
212
    if ( gpio->next.ctrl & RGPIO_CTRL_INTE ) {
213
      unsigned changed_bits = gpio->next.in ^ gpio->curr.in; /* inputs that have changed */
214
      unsigned set_bits = changed_bits & gpio->next.in; /* inputs that have been set */
215
      unsigned cleared_bits = changed_bits & gpio->curr.in; /* inputs that have been cleared */
216
      unsigned relevant_bits = (gpio->next.ptrig & set_bits) | (~gpio->next.ptrig & cleared_bits);
217
 
218
      if ( relevant_bits & gpio->next.inte ) {
219 499 erez
        debug( 3, "GPIO: Reporting interrupt %d\n", gpio->irq );
220 502 erez
        gpio->next.ctrl |= RGPIO_CTRL_INTS;
221
        gpio->next.ints |= relevant_bits & gpio->next.inte;
222 1374 nogj
        /* Since we can't report an interrupt during a readmem/writemem
223
         * schedule the scheduler to do it.  Read the comment above
224
         * report_interrupt in pic/pic.c */
225 1390 nogj
        SCHED_ADD( gpio_do_int, gpio, 1 );
226 477 erez
      }
227 444 erez
    }
228
  }
229
 
230
  /* Switch to values for next clock */
231
  memcpy( &(gpio->curr), &(gpio->next), sizeof(gpio->curr) );
232
}
233 1358 nogj
 
234
/*---------------------------------------------------[ GPIO configuration ]---*/
235
void gpio_baseaddr(union param_val val, void *dat)
236
{
237 1374 nogj
  struct gpio_device *gpio = dat;
238
  gpio->baseaddr = val.addr_val;
239 1358 nogj
}
240
 
241
void gpio_irq(union param_val val, void *dat)
242
{
243 1374 nogj
  struct gpio_device *gpio = dat;
244
  gpio->irq = val.int_val;
245 1358 nogj
}
246
 
247
void gpio_base_vapi_id(union param_val val, void *dat)
248
{
249 1374 nogj
  struct gpio_device *gpio = dat;
250
  gpio->base_vapi_id = val.int_val;
251 1358 nogj
}
252
 
253 1374 nogj
void *gpio_sec_start(void)
254
{
255
  struct gpio_device *new = malloc(sizeof(struct gpio_device));
256
 
257
  if(!new) {
258 1383 nogj
    fprintf(stderr, "Peripheral gpio: Run out of memory\n");
259 1374 nogj
    exit(-1);
260
  }
261
 
262
  new->auxiliary_inputs = 0;
263
  memset(&new->curr, 0, sizeof(new->curr));
264
  memset(&new->next, 0, sizeof(new->next));
265
 
266
  return new;
267
}
268
 
269
void gpio_sec_end(void *dat)
270
{
271
  struct gpio_device *gpio = dat;
272
 
273
  /* Register memory range */
274
  register_memoryarea( gpio->baseaddr, GPIO_ADDR_SPACE, 4, 0, gpio_read32, gpio_write32, dat );
275
 
276
  reg_sim_reset(gpio_reset, dat);
277
  reg_sim_stat(gpio_status, dat);
278
}
279
 
280 1358 nogj
void reg_gpio_sec(void)
281
{
282 1383 nogj
  struct config_section *sec = reg_config_sec("gpio", gpio_sec_start, gpio_sec_end);
283 1358 nogj
 
284
  reg_config_param(sec, "baseaddr", paramt_addr, gpio_baseaddr);
285
  reg_config_param(sec, "irq", paramt_int, gpio_irq);
286
  reg_config_param(sec, "base_vapi_id", paramt_int, gpio_base_vapi_id);
287
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.