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MEMORY
        {
        except : ORIGIN = 0x00000000, LENGTH = 0x00002000
        ram    : ORIGIN = 0x00002000, LENGTH = 0x00200000-0x2000
        }
 
SECTIONS
{
      .except :
        {
        *(.except)
        } > except
      .text :
        {
        *(.text)
         _src_beg = .;
        } > ram
      .data :
        {
        *(.data)
        _dst_beg = .;
        _dst_end = .;
        } > ram
      .bss :
        {
        *(.bss)
        } > ram
      .stack  ALIGN(0x10) (NOLOAD):
        {
        *(.stack)
        _ram_end = .;
        } > ram
}

Line No.	Rev	Author	Line
1	622	simons	`MEMORY`
2			`{`
3			`except : ORIGIN = 0x00000000, LENGTH = 0x00002000`
4			`ram : ORIGIN = 0x00002000, LENGTH = 0x00200000-0x2000`
5			`}`
6
7			`SECTIONS`
8			`{`
9			`.except :`
10			`{`
11			`*(.except)`
12			`} > except`
13			`.text :`
14			`{`
15			`*(.text)`
16			`_src_beg = .;`
17			`} > ram`
18			`.data :`
19			`{`
20			`*(.data)`
21			`_dst_beg = .;`
22			`_dst_end = .;`
23			`} > ram`
24			`.bss :`
25			`{`
26			`*(.bss)`
27			`} > ram`
28			`.stack ALIGN(0x10) (NOLOAD):`
29			`{`
30			`*(.stack)`
31			`_ram_end = .;`
32			`} > ram`
33			`}`

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[/] [or1k/] [tags/] [nog_patch_47/] [or1ksim/] [testbench/] [cache.ld] - Blame information for rev 622