OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_47/] [or1ksim/] [testbench/] [cfg.S] - Blame information for rev 224

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 224 markom
/* Configuration tester */
2
#include "spr_defs.h"
3
 
4
.org 0x100
5
_reset:
6
        l.addi  r1,r0,0x7f00
7
        l.jal   _main
8
        l.nop
9
 
10
_main:
11
        l.addi  r2,r0,0
12
 
13
        l.mfspr r3,r0,SPR_VR            /* Version */
14
        l.mtspr r0,r3,0x1234
15
        l.add   r2,r2,r3
16
 
17
        l.mfspr r3,r0,SPR_UPR           /* Unit Present */
18
        l.mtspr r0,r3,0x1234
19
        l.add   r2,r2,r3
20
 
21
        l.mfspr r4,r0,SPR_PMR           /* Power Management */
22
        l.addi  r3,r0,0
23
        l.mtspr r0,r3,SPR_PMR
24
        l.mfspr r3,r0,SPR_PMR
25
        l.andi  r3,r3,0xff
26
        l.mtspr r0,r3,0x1234
27
        l.add   r2,r2,r3
28
 
29
        l.addi  r3,r0,5
30
        l.mtspr r0,r3,SPR_PMR
31
        l.mfspr r3,r0,SPR_PMR
32
        l.andi  r3,r3,0xff
33
        l.mtspr r0,r3,0x1234
34
        l.add   r2,r2,r3
35
 
36
        l.mtspr r0,r4,SPR_PMR
37
 
38
        l.mfspr r3,r0,SPR_CPUCFGR
39
        l.mtspr r0,r3,0x1234
40
        l.add   r2,r2,r3
41
 
42
        l.mfspr r3,r0,SPR_DMMUCFGR
43
        l.mtspr r0,r3,0x1234
44
        l.add   r2,r2,r3
45
 
46
        l.mfspr r3,r0,SPR_IMMUCFGR
47
        l.mtspr r0,r3,0x1234
48
        l.add   r2,r2,r3
49
 
50
        l.mfspr r3,r0,SPR_DCCFGR
51
        l.mtspr r0,r3,0x1234
52
        l.add   r2,r2,r3
53
 
54
        l.mfspr r3,r0,SPR_ICCFGR
55
        l.mtspr r0,r3,0x1234
56
        l.add   r2,r2,r3
57
 
58
        l.mfspr r3,r0,SPR_DCFGR
59
        l.mtspr r0,r3,0x1234
60
        l.add   r2,r2,r3
61
 
62
        l.mfspr r3,r0,SPR_PCCFGR
63
        l.mtspr r0,r3,0x1234
64
        l.add   r2,r2,r3
65
 
66
        l.movhi r3,hi(0xdeacf5cc)
67
        l.ori   r3,r3,lo(0xdeacf5cc)
68
        l.add   r2,r2,r3
69
        l.mtspr r0,r2,0x1234
70
        l.addi  r3,r0,0
71
        l.sys   203

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.