OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_47/] [or1ksim/] [testbench/] [flag.S] - Blame information for rev 616

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 616 markom
/* Basic SR flag test */
2
#include "spr_defs.h"
3
 
4
#define MEM_RAM 0x40000000
5
 
6
        .section .except
7
        .org 0x100
8
_reset:
9
        l.nop
10
 
11
  l.movhi r10,0x8000
12
  l.addi  r11,r0,-1
13
  l.addi  r12,r0,2
14
  l.addi  r13,r0,0x5678
15
  l.movhi r14,0xdead
16
  l.ori   r14,r14,0xdead
17
  l.addi  r15,r0,0xdead
18
 
19
  /* Test start */
20
 
21
  /* Simple zero test */
22
  l.addi r1,r0,1        /* f = 0 */
23
  l.addi  r1, r0, 0
24
  l.bnf     _err
25
  l.addi r1,r0,1        /* f = 0 */
26
  l.add  r1, r0, r0
27
  l.bnf     _err
28
  l.addi r1,r0,1        /* f = 0 */
29
  l.andi  r1, r0, 0
30
  l.bnf     _err
31
  l.addi r1,r0,1        /* f = 0 */
32
  l.and  r1, r0, r0
33
  l.bnf     _err
34
 
35
  l.addi r1,r0,1        /* f = 0 */
36
  l.sub  r1, r0, r0
37
  l.bf     _err
38
  l.or   r1, r0, r0
39
  l.bf     _err
40
  l.ori  r1, r0, 0
41
  l.bf     _err
42
  l.xor  r1, r0, r0
43
  l.bf     _err
44
  l.xori r1, r0, 0
45
  l.bf     _err
46
 
47
  l.addi r1,r0,0        /* f = 1 */
48
  l.sub  r1, r0, r0
49
  l.bnf     _err
50
  l.or   r1, r0, r0
51
  l.bnf     _err
52
  l.ori  r1, r0, 0
53
  l.bnf     _err
54
  l.xor  r1, r0, r0
55
  l.bnf     _err
56
  l.xori r1, r0, 0
57
  l.bnf     _err
58
 
59
  l.addi r1,r0,0        /* f = 1 */
60
  l.addi  r1, r0, 0xdead
61
  l.bf     _err
62
  l.addi r1,r0,0        /* f = 1 */
63
  l.add  r1, r0, r15
64
  l.bf     _err
65
  l.addi r1,r0,0        /* f = 1 */
66
  l.andi  r1, r11, 0xdead
67
  l.bf     _err
68
  l.addi r1,r0,0        /* f = 1 */
69
  l.and  r1, r11, r15
70
  l.bf     _err
71
 
72
  l.addi r1,r0,0        /* f = 1 */
73
  l.addi  r1, r11, 0
74
  l.bf     _err
75
  l.addi r1,r0,0        /* f = 1 */
76
  l.add  r1, r11, r0
77
  l.bf     _err
78
  l.addi r1,r0,0        /* f = 1 */
79
  l.andi  r1, r11, 0x1234
80
  l.bf     _err
81
  l.addi r1,r0,0        /* f = 1 */
82
  l.and  r1, r11, r10
83
  l.bf     _err
84
 
85
  l.movhi r3,0xdead
86
  l.ori   r3,r3,0xdead
87
  l.nop   NOP_REPORT
88
  l.ori   r3,r0,0
89
  l.nop   NOP_EXIT
90
 
91
_err:
92
  l.ori   r3,r1,0
93
  l.nop   NOP_REPORT
94
  l.mfspr r3,r0,SPR_SR
95
  l.nop   NOP_REPORT
96
  l.nop   NOP_EXIT

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.