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[/] [or1k/] [tags/] [nog_patch_47/] [or1ksim/] [testbench/] [mc_dram.c] - Blame information for rev 544

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1 454 ivang
/* mc_dram.c - Memory Controller testbench dram test
2
         Copyright (C) 2001 by Ivan Guzvinec, ivang@opencores.org
3
 
4
         This file is part of OpenRISC 1000 Architectural Simulator.
5
 
6
         This program is free software; you can redistribute it and/or modify
7
         it under the terms of the GNU General Public License as published by
8
         the Free Software Foundation; either version 2 of the License, or
9
         (at your option) any later version.
10
 
11
         This program is distributed in the hope that it will be useful,
12
         but WITHOUT ANY WARRANTY; without even the implied warranty of
13
         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.    See the
14
         GNU General Public License for more details.
15
 
16
         You should have received a copy of the GNU General Public License
17
         along with this program; if not, write to the Free Software
18
         Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19
*/
20
 
21
#include "support.h"
22
 
23
#include "mc_common.h"
24
#include "mc_dram.h"
25
#include "../peripheral/mc.h"
26 544 ivang
#include "../peripheral/gpio.h"
27 454 ivang
#include "../peripheral/fields.h"
28
 
29
typedef volatile unsigned long *REGISTER;
30
 
31
unsigned long nRowSize = 0;
32
unsigned long nColumns = 0;
33
REGISTER mc_poc        = (unsigned long*)(MC_BASE + MC_POC);
34
REGISTER mc_csr        = (unsigned long*)(MC_BASE + MC_CSR);
35
REGISTER mc_ba_mask    = (unsigned long*)(MC_BASE + MC_BA_MASK);
36
 
37 544 ivang
REGISTER rgpio_out     = (unsigned long*)(GPIO_BASE + RGPIO_OUT);
38
REGISTER rgpio_in      = (unsigned long*)(GPIO_BASE + RGPIO_IN);
39
 
40 454 ivang
unsigned long lpoc;
41
 
42
unsigned long set_config()
43
{
44
    REGISTER mc_csc;
45
    unsigned char ch;
46
 
47
    for (ch=0; ch<8; ch++) {
48
        if (MC_SDRAM_CSMASK & (0x01 << ch) ) {
49
            mc_csc = (unsigned long*)(MC_BASE + MC_CSC(ch));
50
            SET_FIELD(*mc_csc, MC_CSC, MS,  mc_sdram_cs[ch].MS);
51
            SET_FIELD(*mc_csc, MC_CSC, BW,  mc_sdram_cs[ch].BW);
52
            SET_FIELD(*mc_csc, MC_CSC, SEL, mc_sdram_cs[ch].M);
53
            SET_FLAG(*mc_csc, MC_CSC, EN);
54
            printf ("Channel Config %d - CSC = 0x%08lX\n", ch, *mc_csc);
55
        }
56
    }
57
 
58
    return 0;
59
}
60
 
61
int main()
62
{
63
    unsigned long ret;
64
    unsigned char ch;
65
 
66
    unsigned long j, i;
67
    unsigned long test;
68 544 ivang
    unsigned long gpio_pat = 0;
69 454 ivang
 
70
    unsigned long nRowSize = 0;
71
    unsigned long nRows    = 0;
72
    unsigned long nRowSh   = 0;
73
    unsigned long nRowGrp  = 0;
74
    unsigned long nGroups  = 0;
75
 
76
    unsigned long nAddress;
77
    unsigned long mc_sel;
78
    REGISTER mc_tms;
79
    REGISTER mc_cs;
80
 
81 544 ivang
    *rgpio_out = 0xFFFFFFFF;
82
 
83 454 ivang
    /* set configuration */
84
    randomin(7435);
85 544 ivang
    lpoc = *mc_poc;
86
    /* MC configuration set in except_mc.S prior to execution of main()
87 454 ivang
    if ( (ret = set_config()) != 0) {
88
        exit(ret);
89
    }
90
    */
91
    for (ch=0; ch<8; ch++) {
92
        if (MC_SDRAM_CSMASK & (0x01 << ch) ) {
93
            printf ("--- Begin Test on CS%d ---\n", ch);
94
 
95
            mc_cs  = (unsigned long*)(MC_BASE + MC_CSC(ch));
96
            mc_tms = (unsigned long*)(MC_BASE + MC_TMS(ch));
97
            mc_sel = GET_FIELD(*mc_cs, MC_CSC, SEL);
98
 
99
            SET_FIELD(*mc_tms, MC_TMS_SDRAM, OM, 0); /*normal op*/
100
            SET_FIELD(*mc_tms, MC_TMS_SDRAM, CL, 3); /*CAS*/
101
 
102
            switch ( mc_sdram_cs[ch].BW + (3 * mc_sdram_cs[ch].MS) ) {
103
            case 0:
104
            case 4:
105
                nRowSize = MC_SDRAM_ROWSIZE_0;
106
                nRows    = MC_SDRAM_ROWS_0;
107
                nRowSh   = MC_SDRAM_ROWSH_0; break;
108
            case 1:
109
            case 5:
110
                nRowSize = MC_SDRAM_ROWSIZE_1;
111
                nRows    = MC_SDRAM_ROWS_1;
112
                nRowSh   = MC_SDRAM_ROWSH_1; break;
113
            case 2:
114
                nRowSize = MC_SDRAM_ROWSIZE_2;
115
                nRows    = MC_SDRAM_ROWS_2;
116
                nRowSh   = MC_SDRAM_ROWSH_2;  break;
117
            case 3:
118
                nRowSize = MC_SDRAM_ROWSIZE_3;
119
                nRows    = MC_SDRAM_ROWS_3;
120
                nRowSh   = MC_SDRAM_ROWSH_3; break;
121
            case 6:
122
                nRowSize = MC_SDRAM_ROWSIZE_6;
123
                nRows    = MC_SDRAM_ROWS_6;
124
                nRowSh   = MC_SDRAM_ROWSH_6; break;
125
            case 7:
126
                nRowSize = MC_SDRAM_ROWSIZE_7;
127
                nRows    = MC_SDRAM_ROWS_7;
128
                nRowSh   = MC_SDRAM_ROWSH_7; break;
129
            case 8:
130
                nRowSize = MC_SDRAM_ROWSIZE_8;
131
                nRows    = MC_SDRAM_ROWS_8;
132
                nRowSh   = MC_SDRAM_ROWSH_8; break;
133
            }
134
 
135
            printf ("CS configuration : CSC - 0x%08lX, TMS - 0x%08lX, rs = %lu, nr = %lu, sh = %lu, sel = %lu\n",
136
                    *mc_cs, *mc_tms, nRowSize, nRows, nRowSh, mc_sel);
137
 
138
            nRows -= MC_SDRAM_ROW_OFF;
139
            for (test=0; test<16; test++) {
140
                /* configure MC*/
141
                CLEAR_FLAG(*mc_cs, MC_CSC, PEN); /* no parity */
142
                CLEAR_FLAG(*mc_cs, MC_CSC, KRO); /* close row */
143
                CLEAR_FLAG(*mc_cs, MC_CSC, BAS); /* bank after column */
144
                CLEAR_FLAG(*mc_cs, MC_CSC, WP);  /* write enable */
145
                SET_FLAG(*mc_tms, MC_TMS_SDRAM, WBL); /* single loc access */
146
                CLEAR_FLAG(*mc_tms, MC_TMS_SDRAM, BT); /* sequential burst */
147
                SET_FIELD(*mc_tms, MC_TMS_SDRAM, BL, 0); /* 1 */
148
                switch (test) {
149
                case 0:
150
                    if ((MC_SDRAM_TESTS & MC_SDRAM_TEST0) != MC_SDRAM_TEST0)
151
                        continue;
152
                    break;
153
                case 1:
154
                    if ((MC_SDRAM_TESTS & MC_SDRAM_TEST1) != MC_SDRAM_TEST1)
155
                        continue;
156
                    SET_FLAG(*mc_cs, MC_CSC, PEN); /* parity */
157
                    break;
158
                case 2:
159
                    if ((MC_SDRAM_TESTS & MC_SDRAM_TEST2) != MC_SDRAM_TEST2)
160
                        continue;
161
                    SET_FLAG(*mc_cs, MC_CSC, KRO); /* keep row */
162
                    break;
163
                case 3:
164
                    if ((MC_SDRAM_TESTS & MC_SDRAM_TEST3) != MC_SDRAM_TEST3)
165
                        continue;
166
                    SET_FLAG(*mc_cs, MC_CSC, BAS); /* bank after row*/
167
                    break;
168
                case 4:
169
                    if ((MC_SDRAM_TESTS & MC_SDRAM_TEST4) != MC_SDRAM_TEST4)
170
                        continue;
171
                    SET_FLAG(*mc_cs, MC_CSC, WP);  /* RO */
172
                    break;
173
                case 5:
174
                    if ((MC_SDRAM_TESTS & MC_SDRAM_TEST5) != MC_SDRAM_TEST5)
175
                        continue;
176
                    CLEAR_FLAG(*mc_tms, MC_TMS_SDRAM, WBL); /* burst */
177
                    break;
178
                case 6:
179
                    if ((MC_SDRAM_TESTS & MC_SDRAM_TEST6) != MC_SDRAM_TEST6)
180
                        continue;
181
                    CLEAR_FLAG(*mc_tms, MC_TMS_SDRAM, WBL); /* burst */
182
                    SET_FIELD(*mc_tms, MC_TMS_SDRAM, BL, 1); /* 2 */
183
                    break;
184
                case 7:
185
                    if ((MC_SDRAM_TESTS & MC_SDRAM_TEST7) != MC_SDRAM_TEST7)
186
                        continue;
187
                    CLEAR_FLAG(*mc_tms, MC_TMS_SDRAM, WBL); /* burst */
188
                    SET_FIELD(*mc_tms, MC_TMS_SDRAM, BL, 2); /* 4 */
189
                    break;
190
                case 8:
191
                    if ((MC_SDRAM_TESTS & MC_SDRAM_TEST8) != MC_SDRAM_TEST8)
192
                        continue;
193
                    CLEAR_FLAG(*mc_tms, MC_TMS_SDRAM, WBL); /* burst */
194
                    SET_FIELD(*mc_tms, MC_TMS_SDRAM, BL, 3); /* 8 */
195
                    break;
196
                case 9:
197
                    if ((MC_SDRAM_TESTS & MC_SDRAM_TEST9) != MC_SDRAM_TEST9)
198
                        continue;
199
                    CLEAR_FLAG(*mc_tms, MC_TMS_SDRAM, WBL); /* burst */
200
                    SET_FIELD(*mc_tms, MC_TMS_SDRAM, BL, 7); /* full page */
201
                    break;
202
                case 10:
203
                    if ((MC_SDRAM_TESTS & MC_SDRAM_TEST10) != MC_SDRAM_TEST10)
204
                        continue;
205
                    CLEAR_FLAG(*mc_tms, MC_TMS_SDRAM, WBL); /* burst */
206
                    SET_FLAG(*mc_tms, MC_TMS_SDRAM, BT); /* interleaved burst */
207
                    break;
208
                case 11:
209
                    if ((MC_SDRAM_TESTS & MC_SDRAM_TEST11) != MC_SDRAM_TEST11)
210
                        continue;
211
                    CLEAR_FLAG(*mc_tms, MC_TMS_SDRAM, WBL); /* burst */
212
                    SET_FLAG(*mc_tms, MC_TMS_SDRAM, BT); /* interleaved burst */
213
                    SET_FIELD(*mc_tms, MC_TMS_SDRAM, BL, 1); /* 2 */
214
                    break;
215
                case 12:
216
                    if ((MC_SDRAM_TESTS & MC_SDRAM_TEST12) != MC_SDRAM_TEST12)
217
                        continue;
218
                    CLEAR_FLAG(*mc_tms, MC_TMS_SDRAM, WBL); /* burst */
219
                    SET_FLAG(*mc_tms, MC_TMS_SDRAM, BT); /* interleaved burst */
220
                    SET_FIELD(*mc_tms, MC_TMS_SDRAM, BL, 2); /* 4 */
221
                    break;
222
                case 13:
223
                    if ((MC_SDRAM_TESTS & MC_SDRAM_TEST13) != MC_SDRAM_TEST13)
224
                        continue;
225
                    CLEAR_FLAG(*mc_tms, MC_TMS_SDRAM, WBL); /* burst */
226
                    SET_FLAG(*mc_tms, MC_TMS_SDRAM, BT); /* interleaved burst */
227
                    SET_FIELD(*mc_tms, MC_TMS_SDRAM, BL, 3); /* 8 */
228
                    break;
229
                case 14:
230
                    if ((MC_SDRAM_TESTS & MC_SDRAM_TEST14) != MC_SDRAM_TEST14)
231
                        continue;
232
                    CLEAR_FLAG(*mc_tms, MC_TMS_SDRAM, WBL); /* burst */
233
                    SET_FLAG(*mc_tms, MC_TMS_SDRAM, BT); /* interleaved burst */
234
                    SET_FIELD(*mc_tms, MC_TMS_SDRAM, BL, 7); /* fullrow */
235
                    break;
236
                case 15:
237
                    if ((MC_SDRAM_TESTS & MC_SDRAM_TEST15) != MC_SDRAM_TEST15)
238
                        continue;
239
                    SET_FLAG(*mc_cs, MC_CSC, KRO);  /* keep row */
240
                    CLEAR_FLAG(*mc_tms, MC_TMS_SDRAM, WBL); /* burst */
241
                    SET_FLAG(*mc_tms, MC_TMS_SDRAM, BT); /* interleaved burst */
242
                    SET_FIELD(*mc_tms, MC_TMS_SDRAM, BL, 1); /* 2 */
243
                    break;
244
                } /*switch test*/
245
 
246
                printf ("Begin TEST %lu : CSC - 0x%08lX, TMS - 0x%08lX\n", test, *mc_cs, *mc_tms);
247
 
248
                if (MC_SDRAM_ACC & MC_SDRAM_SROW) {
249
                    /* perform sequential row access */
250
                    printf("Seuential Row\n");
251
                    for (j=MC_SDRAM_ROW_OFF; j<nRows/2; j++) {
252
                        nAddress  = mc_sel << 21;
253
                        nAddress |= MC_MEM_BASE;
254
                        nAddress += (j << nRowSh);
255 544 ivang
 
256
                        gpio_pat ^= 0x00000008;
257
                        *rgpio_out = gpio_pat;
258 454 ivang
                        ret = mc_test_row(nAddress, nAddress + nRowSize, MC_SDRAM_FLAGS);
259
 
260
                        printf("\trow - %lu: nAddress = 0x%08lX, ret = 0x%08lX\n", j, nAddress, ret);
261 544 ivang
 
262 454 ivang
                        if (ret) {
263 544 ivang
                            gpio_pat ^= 0x00000080;
264
                            *rgpio_out = gpio_pat;
265 454 ivang
                            report(ret);
266
                            return ret;
267
                        }
268
                    }
269
                }
270
 
271
                if (MC_SDRAM_ACC & MC_SDRAM_RROW) {
272
                    /* perform random row access */
273
                    printf("Random Row\n");
274
                    for (j=MC_SDRAM_ROW_OFF; j<nRows/2; j++) {
275
                        nAddress = mc_sel << 21;
276
                        nAddress |= MC_MEM_BASE;
277
                        nAddress += ( (MC_SDRAM_ROW_OFF + random(nRows)) << nRowSh);
278 544 ivang
 
279
                        gpio_pat ^= 0x00000008;
280
                        *rgpio_out = gpio_pat;
281 454 ivang
                        ret = mc_test_row(nAddress, nAddress + nRowSize, MC_SDRAM_FLAGS);
282
 
283
                        printf("\trow - %lu: nAddress = 0x%08lX, ret = 0x%08lX\n", j, nAddress, ret);
284 544 ivang
 
285 454 ivang
                        if (ret) {
286 544 ivang
                            gpio_pat ^= 0x00000080;
287
                            *rgpio_out = gpio_pat;
288 454 ivang
                            return ret;
289
                        }
290
                    }
291
                }
292
 
293
                if (MC_SDRAM_ACC & MC_SDRAM_SGRP) {
294
                    /* perform sequential row in group access */
295
                    printf("Sequential Group ");
296
 
297
                    nGroups = MC_SDRAM_GROUPSIZE;
298
                    printf("Group Size = %lu\n", nGroups);
299
                    for (i=nRows/nGroups-1; i<nRows/nGroups; i++) {
300
                        nRowGrp = random(nRows - nGroups) + MC_SDRAM_ROW_OFF;
301
                        for (j=0; j<nGroups; j++) {
302
                            nAddress = mc_sel << 21;
303
                            nAddress |= MC_MEM_BASE;
304
                            nAddress += ((nRowGrp+j) << nRowSh);
305 544 ivang
 
306
                            gpio_pat ^= 0x00000008;
307
                            *rgpio_out = gpio_pat;
308 454 ivang
                            ret = mc_test_row(nAddress, nAddress + nRowSize, MC_SDRAM_FLAGS);
309
 
310
                            printf("\trow - %lu: nAddress = 0x%08lX, ret = 0x%08lX\n", j, nAddress, ret);
311 544 ivang
 
312 454 ivang
                            if (ret) {
313 544 ivang
                                gpio_pat ^= 0x00000080;
314
                                *rgpio_out = gpio_pat;
315 454 ivang
                                report(ret);
316
                                return ret;
317
                            }
318
                        }
319
                    }
320
                }
321
 
322
                if (MC_SDRAM_ACC & MC_SDRAM_RGRP) {
323
                    /* perform random row in group access */
324
                    printf("Random Group ");
325
 
326
                    nGroups = MC_SDRAM_GROUPSIZE;
327
                    printf("Group Size = %lu\n", nGroups);
328
                    for (i=(nRows/nGroups)-1; i<nRows/nGroups; i++) {
329
                        nRowGrp = random(nRows - nGroups) + MC_SDRAM_ROW_OFF;
330
                        for (j=0; j<nGroups; j++) {
331
                            nAddress = mc_sel << 21;
332
                            nAddress |= MC_MEM_BASE;
333
                            nAddress += ((nRowGrp + random(nGroups)) << nRowSh);
334 544 ivang
 
335
                            gpio_pat ^= 0x00000008;
336
                            *rgpio_out = gpio_pat;
337 454 ivang
                            ret = mc_test_row(nAddress, nAddress + nRowSize, MC_SDRAM_FLAGS);
338
 
339
                            printf("\trow - %lu: nAddress = 0x%08lX, ret = 0x%08lX\n", j, nAddress, ret);
340 544 ivang
 
341 454 ivang
                            if (ret) {
342 544 ivang
                                gpio_pat ^= 0x00000080;
343
                                *rgpio_out = gpio_pat;
344 454 ivang
                                report(ret);
345
                                return ret;
346
                            }
347
                        }
348
                    }
349
                } /*for groups*/
350
 
351
            } /*for test*/
352
        } /*if*/
353
    } /*for CS*/
354
    printf("--- End SDRAM tests ---\n");
355
    report(0xDEADDEAD);
356 544 ivang
 
357
    gpio_pat ^= 0x00000020;
358
    *rgpio_out = gpio_pat;
359
 
360 454 ivang
    return 0;
361
} /* main */

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