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/* This file is part of test microkernel for OpenRISC 1000. */
/* (C) 2000 Damjan Lampret, lampret@opencores.org */
 
#include "spr_defs.h"
 
/*
 * Context is saved to area pointed by pointer in R3. Original
 * R3 is at memory location 0 and task's PC is at memory location 4.
 */
#define SAVEREGS                                        \
        l.lwz   r3,0(r3);                               \
        l.sw    4(r3),r1;                               \
        l.sw    8(r3),r2;                               \
        l.lwz   r2,0(r0);       /* saving original r3*/ \
        l.sw    12(r3),r2;                              \
        l.sw    16(r3),r4;                              \
        l.sw    20(r3),r5;                              \
        l.sw    24(r3),r6;                              \
        l.sw    28(r3),r7;                              \
        l.sw    32(r3),r8;                              \
        l.sw    36(r3),r9;                              \
        l.sw    40(r3),r10;                             \
        l.sw    44(r3),r11;                             \
        l.sw    48(r3),r12;                             \
        l.sw    52(r3),r13;                             \
        l.sw    56(r3),r14;                             \
        l.sw    60(r3),r15;                             \
        l.sw    64(r3),r16;                             \
        l.sw    68(r3),r17;                             \
        l.sw    72(r3),r18;                             \
        l.sw    76(r3),r19;                             \
        l.sw    80(r3),r20;                             \
        l.sw    84(r3),r21;                             \
        l.sw    88(r3),r22;                             \
        l.sw    92(r3),r23;                             \
        l.sw    96(r3),r24;                             \
        l.sw    100(r3),r25;                            \
        l.sw    104(r3),r26;                            \
        l.sw    108(r3),r27;                            \
        l.sw    112(r3),r28;                            \
        l.sw    116(r3),r29;                            \
        l.sw    120(r3),r30;                            \
        l.sw    124(r3),r31;                            \
        l.lwz   r2,4(r0);       /* saving original PC*/ \
        l.sw    0(r3),r2;                               \
                                                        \
        l.mfspr r2,r0,SPR_ESR_BASE;                             \
        l.sw    128(r3),r2      /* saving SR */
 
/*
 * Pointer to context is in R3. All registers are loaded and execution is
 * transfered to the loaded context's task
 */
#define LOADREGS_N_GO                           \
        l.lwz   r3,0(r3);                       \
        l.lwz   r2,0(r3);       /* prepare PC*/ \
        l.mtspr r0,r2,SPR_EPCR_BASE;            \
                                                \
        l.lwz   r2,128(r3);     /* prepare SR*/ \
        l.mtspr r0,r2,SPR_ESR_BASE;                     \
                                                \
        l.lwz   r1,4(r3);                       \
        l.lwz   r2,8(r3);                       \
        l.lwz   r4,16(r3);                      \
        l.lwz   r5,20(r3);                      \
        l.lwz   r6,24(r3);                      \
        l.lwz   r7,28(r3);                      \
        l.lwz   r8,32(r3);                      \
        l.lwz   r9,36(r3);                      \
        l.lwz   r10,40(r3);                     \
        l.lwz   r11,44(r3);                     \
        l.lwz   r12,48(r3);                     \
        l.lwz   r13,52(r3);                     \
        l.lwz   r14,56(r3);                     \
        l.lwz   r15,60(r3);                     \
        l.lwz   r16,64(r3);                     \
        l.lwz   r17,68(r3);                     \
        l.lwz   r18,72(r3);                     \
        l.lwz   r19,76(r3);                     \
        l.lwz   r20,80(r3);                     \
        l.lwz   r21,84(r3);                     \
        l.lwz   r22,88(r3);                     \
        l.lwz   r23,92(r3);                     \
        l.lwz   r24,96(r3);                     \
        l.lwz   r25,100(r3);                    \
        l.lwz   r26,104(r3);                    \
        l.lwz   r27,108(r3);                    \
        l.lwz   r28,112(r3);                    \
        l.lwz   r29,116(r3);                    \
        l.lwz   r30,120(r3);                    \
        l.lwz   r31,124(r3);                    \
                                                \
        l.lwz   r3,12(r3);      /* prepare r3*/ \
                                                \
        l.rfe;                  /* Call task */ \
        l.nop
 
/*
 * All registers are loaded from save area.
 */
#define LOADREGS                                \
        l.lwz   r3,0(r3);                       \
        l.lwz   r2,0(r3);       /* prepare PC*/ \
        l.mtspr r0,r2,SPR_EPCR_BASE;            \
                                                \
        l.lwz   r2,128(r3);     /* prepare SR*/ \
        l.mtspr r0,r2,SPR_ESR_BASE;                     \
                                                \
        l.lwz   r1,4(r3);                       \
        l.lwz   r2,8(r3);                       \
        l.lwz   r4,16(r3);                      \
        l.lwz   r5,20(r3);                      \
        l.lwz   r6,24(r3);                      \
        l.lwz   r7,28(r3);                      \
        l.lwz   r8,32(r3);                      \
        l.lwz   r9,36(r3);                      \
        l.lwz   r10,40(r3);                     \
        l.lwz   r11,44(r3);                     \
        l.lwz   r12,48(r3);                     \
        l.lwz   r13,52(r3);                     \
        l.lwz   r14,56(r3);                     \
        l.lwz   r15,60(r3);                     \
        l.lwz   r16,64(r3);                     \
        l.lwz   r17,68(r3);                     \
        l.lwz   r18,72(r3);                     \
        l.lwz   r19,76(r3);                     \
        l.lwz   r20,80(r3);                     \
        l.lwz   r21,84(r3);                     \
        l.lwz   r22,88(r3);                     \
        l.lwz   r23,92(r3);                     \
        l.lwz   r24,96(r3);                     \
        l.lwz   r25,100(r3);                    \
        l.lwz   r26,104(r3);                    \
        l.lwz   r27,108(r3);                    \
        l.lwz   r28,112(r3);                    \
        l.lwz   r29,116(r3);                    \
        l.lwz   r30,120(r3);                    \
        l.lwz   r31,124(r3);                    \
                                                \
        l.lwz   r3,12(r3);      /* prepare r3*/
 
/*
 * Set new PC in saved context
 */
#define SET_CONTEXTPC(AREA,SUBROUTINE,TMPREG)   \
        l.lwz   AREA,0(AREA);                   \
        l.movhi TMPREG,hi(SUBROUTINE);          \
        l.addi  TMPREG,r0,lo(SUBROUTINE);       \
        l.sw    0(AREA),TMPREG;
 
/*
 * Printf via or1ksim hook
 */
#if KERNEL_OUTPUT
#define PRINTF(REG,STR)                         \
        l.movhi REG,hi(STR);                    \
        l.addi  REG,r0,lo(STR);                 \
        l.sys   202
#else
#define PRINTF(REG,STR)
#endif
 
/*
 * Reset Exception handler
 */
.org 0x100
_reset_vector:
        l.nop
        l.j     _reset
        l.nop
 
/*
 * Bus Error Exception handler
 */
.org 0x0200
_buserr:
        l.nop
        l.sw    0(r0),r3        /* Save r3 */
        PRINTF(r3, _buserr_str)
_hang:
        l.j     _hang
        l.nop
 
_buserr_str:
        .ascii  "Bus error exception.\n\000"
 
/*
 * External Interrupt Exception handler
 */
.org 0x800
_extint:
        l.nop
        l.sw    0(r0),r3        /* Save r3 */
        PRINTF(r3,_extint_str)
        l.mfspr r3,r0,SPR_EPCR_BASE     /* Get EPCR */
/*      l.addi  r3,r3,4         /* increment because EPCR instruction was already executed */
        l.sw    4(r0),r3        /* and save it */
 
        /* now save user task context */
        l.movhi r3,hi(_task_context)
        l.addi  r3,r0,lo(_task_context)
        SAVEREGS
 
        /* set kernel context's PC to kernel's scheduler */
        l.movhi r3,hi(_kernel_context)
        l.addi  r3,r0,lo(_kernel_context)
        SET_CONTEXTPC(r3,_int_main,r4)
 
        /* load kernel context */
        l.movhi r3,hi(_kernel_context)
        l.addi  r3,r0,lo(_kernel_context)
        LOADREGS
        l.j     _int_main
        l.nop
 
_extint_str:
        .ascii  "External interrupt exception.\n\000"
 
/*
 * System Call Exception handler
 */
.org 0x0c00
_syscall:
        l.nop
        l.sw    0(r0),r3        /* Save r3 */
        PRINTF(r3,_syscall_str)
        l.mfspr r3,r0,SPR_EPCR_BASE     /* Get EPCR */
        l.addi  r3,r3,4         /* increment because EPCR instruction was already executed */
        l.sw    4(r0),r3        /* and save it */
 
        /* now save user task context */
        l.movhi r3,hi(_task_context)
        l.addi  r3,r0,lo(_task_context)
        SAVEREGS
 
        /* set kernel context's PC to kernel's syscall entry */
        l.movhi r3,hi(_kernel_context)
        l.addi  r3,r0,lo(_kernel_context)
        SET_CONTEXTPC(r3,_kernel_syscall,r4)
 
        /* load kernel context */
        l.movhi r3,hi(_kernel_context)
        l.addi  r3,r0,lo(_kernel_context)
        LOADREGS_N_GO
 
_syscall_str:
        .ascii  "System call exception.\n\000"
 
/*
 * Switch to a new context pointed by _task_context
 */
.global _dispatch
.align 4
_dispatch:
        /* load user task GPRs and PC */
        l.movhi r3,hi(_task_context)
        l.addi  r3,r0,lo(_task_context)
        LOADREGS_N_GO
 

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[/] [or1k/] [tags/] [nog_patch_47/] [or1ksim/] [testbench/] [uos/] [except_or32.S] - Blame information for rev 222

Line No.	Rev	Author	Line
1	222	markom	`/* This file is part of test microkernel for OpenRISC 1000. */`
2			`/* (C) 2000 Damjan Lampret, lampret@opencores.org */`
3
4			`#include "spr_defs.h"`
5
6			`/*`
7			`* Context is saved to area pointed by pointer in R3. Original`
8			`* R3 is at memory location 0 and task's PC is at memory location 4.`
9			`*/`
10			`#define SAVEREGS \`
11			`l.lwz r3,0(r3); \`
12			`l.sw 4(r3),r1; \`
13			`l.sw 8(r3),r2; \`
14			`l.lwz r2,0(r0); /* saving original r3*/ \`
15			`l.sw 12(r3),r2; \`
16			`l.sw 16(r3),r4; \`
17			`l.sw 20(r3),r5; \`
18			`l.sw 24(r3),r6; \`
19			`l.sw 28(r3),r7; \`
20			`l.sw 32(r3),r8; \`
21			`l.sw 36(r3),r9; \`
22			`l.sw 40(r3),r10; \`
23			`l.sw 44(r3),r11; \`
24			`l.sw 48(r3),r12; \`
25			`l.sw 52(r3),r13; \`
26			`l.sw 56(r3),r14; \`
27			`l.sw 60(r3),r15; \`
28			`l.sw 64(r3),r16; \`
29			`l.sw 68(r3),r17; \`
30			`l.sw 72(r3),r18; \`
31			`l.sw 76(r3),r19; \`
32			`l.sw 80(r3),r20; \`
33			`l.sw 84(r3),r21; \`
34			`l.sw 88(r3),r22; \`
35			`l.sw 92(r3),r23; \`
36			`l.sw 96(r3),r24; \`
37			`l.sw 100(r3),r25; \`
38			`l.sw 104(r3),r26; \`
39			`l.sw 108(r3),r27; \`
40			`l.sw 112(r3),r28; \`
41			`l.sw 116(r3),r29; \`
42			`l.sw 120(r3),r30; \`
43			`l.sw 124(r3),r31; \`
44			`l.lwz r2,4(r0); /* saving original PC*/ \`
45			`l.sw 0(r3),r2; \`
46			`\`
47			`l.mfspr r2,r0,SPR_ESR_BASE; \`
48			`l.sw 128(r3),r2 /* saving SR */`
49
50			`/*`
51			`* Pointer to context is in R3. All registers are loaded and execution is`
52			`* transfered to the loaded context's task`
53			`*/`
54			`#define LOADREGS_N_GO \`
55			`l.lwz r3,0(r3); \`
56			`l.lwz r2,0(r3); /* prepare PC*/ \`
57			`l.mtspr r0,r2,SPR_EPCR_BASE; \`
58			`\`
59			`l.lwz r2,128(r3); /* prepare SR*/ \`
60			`l.mtspr r0,r2,SPR_ESR_BASE; \`
61			`\`
62			`l.lwz r1,4(r3); \`
63			`l.lwz r2,8(r3); \`
64			`l.lwz r4,16(r3); \`
65			`l.lwz r5,20(r3); \`
66			`l.lwz r6,24(r3); \`
67			`l.lwz r7,28(r3); \`
68			`l.lwz r8,32(r3); \`
69			`l.lwz r9,36(r3); \`
70			`l.lwz r10,40(r3); \`
71			`l.lwz r11,44(r3); \`
72			`l.lwz r12,48(r3); \`
73			`l.lwz r13,52(r3); \`
74			`l.lwz r14,56(r3); \`
75			`l.lwz r15,60(r3); \`
76			`l.lwz r16,64(r3); \`
77			`l.lwz r17,68(r3); \`
78			`l.lwz r18,72(r3); \`
79			`l.lwz r19,76(r3); \`
80			`l.lwz r20,80(r3); \`
81			`l.lwz r21,84(r3); \`
82			`l.lwz r22,88(r3); \`
83			`l.lwz r23,92(r3); \`
84			`l.lwz r24,96(r3); \`
85			`l.lwz r25,100(r3); \`
86			`l.lwz r26,104(r3); \`
87			`l.lwz r27,108(r3); \`
88			`l.lwz r28,112(r3); \`
89			`l.lwz r29,116(r3); \`
90			`l.lwz r30,120(r3); \`
91			`l.lwz r31,124(r3); \`
92			`\`
93			`l.lwz r3,12(r3); /* prepare r3*/ \`
94			`\`
95			`l.rfe; /* Call task */ \`
96			`l.nop`
97
98			`/*`
99			`* All registers are loaded from save area.`
100			`*/`
101			`#define LOADREGS \`
102			`l.lwz r3,0(r3); \`
103			`l.lwz r2,0(r3); /* prepare PC*/ \`
104			`l.mtspr r0,r2,SPR_EPCR_BASE; \`
105			`\`
106			`l.lwz r2,128(r3); /* prepare SR*/ \`
107			`l.mtspr r0,r2,SPR_ESR_BASE; \`
108			`\`
109			`l.lwz r1,4(r3); \`
110			`l.lwz r2,8(r3); \`
111			`l.lwz r4,16(r3); \`
112			`l.lwz r5,20(r3); \`
113			`l.lwz r6,24(r3); \`
114			`l.lwz r7,28(r3); \`
115			`l.lwz r8,32(r3); \`
116			`l.lwz r9,36(r3); \`
117			`l.lwz r10,40(r3); \`
118			`l.lwz r11,44(r3); \`
119			`l.lwz r12,48(r3); \`
120			`l.lwz r13,52(r3); \`
121			`l.lwz r14,56(r3); \`
122			`l.lwz r15,60(r3); \`
123			`l.lwz r16,64(r3); \`
124			`l.lwz r17,68(r3); \`
125			`l.lwz r18,72(r3); \`
126			`l.lwz r19,76(r3); \`
127			`l.lwz r20,80(r3); \`
128			`l.lwz r21,84(r3); \`
129			`l.lwz r22,88(r3); \`
130			`l.lwz r23,92(r3); \`
131			`l.lwz r24,96(r3); \`
132			`l.lwz r25,100(r3); \`
133			`l.lwz r26,104(r3); \`
134			`l.lwz r27,108(r3); \`
135			`l.lwz r28,112(r3); \`
136			`l.lwz r29,116(r3); \`
137			`l.lwz r30,120(r3); \`
138			`l.lwz r31,124(r3); \`
139			`\`
140			`l.lwz r3,12(r3); /* prepare r3*/`
141
142			`/*`
143			`* Set new PC in saved context`
144			`*/`
145			`#define SET_CONTEXTPC(AREA,SUBROUTINE,TMPREG) \`
146			`l.lwz AREA,0(AREA); \`
147			`l.movhi TMPREG,hi(SUBROUTINE); \`
148			`l.addi TMPREG,r0,lo(SUBROUTINE); \`
149			`l.sw 0(AREA),TMPREG;`
150
151			`/*`
152			`* Printf via or1ksim hook`
153			`*/`
154			`#if KERNEL_OUTPUT`
155			`#define PRINTF(REG,STR) \`
156			`l.movhi REG,hi(STR); \`
157			`l.addi REG,r0,lo(STR); \`
158			`l.sys 202`
159			`#else`
160			`#define PRINTF(REG,STR)`
161			`#endif`
162
163			`/*`
164			`* Reset Exception handler`
165			`*/`
166			`.org 0x100`
167			`_reset_vector:`
168			`l.nop`
169			`l.j _reset`
170			`l.nop`
171
172			`/*`
173			`* Bus Error Exception handler`
174			`*/`
175			`.org 0x0200`
176			`_buserr:`
177			`l.nop`
178			`l.sw 0(r0),r3 /* Save r3 */`
179			`PRINTF(r3, _buserr_str)`
180			`_hang:`
181			`l.j _hang`
182			`l.nop`
183
184			`_buserr_str:`
185			`.ascii "Bus error exception.\n\000"`
186
187			`/*`
188			`* External Interrupt Exception handler`
189			`*/`
190			`.org 0x800`
191			`_extint:`
192			`l.nop`
193			`l.sw 0(r0),r3 /* Save r3 */`
194			`PRINTF(r3,_extint_str)`
195			`l.mfspr r3,r0,SPR_EPCR_BASE /* Get EPCR */`
196			`/* l.addi r3,r3,4 /* increment because EPCR instruction was already executed */`
197			`l.sw 4(r0),r3 /* and save it */`
198
199			`/* now save user task context */`
200			`l.movhi r3,hi(_task_context)`
201			`l.addi r3,r0,lo(_task_context)`
202			`SAVEREGS`
203
204			`/* set kernel context's PC to kernel's scheduler */`
205			`l.movhi r3,hi(_kernel_context)`
206			`l.addi r3,r0,lo(_kernel_context)`
207			`SET_CONTEXTPC(r3,_int_main,r4)`
208
209			`/* load kernel context */`
210			`l.movhi r3,hi(_kernel_context)`
211			`l.addi r3,r0,lo(_kernel_context)`
212			`LOADREGS`
213			`l.j _int_main`
214			`l.nop`
215
216			`_extint_str:`
217			`.ascii "External interrupt exception.\n\000"`
218
219			`/*`
220			`* System Call Exception handler`
221			`*/`
222			`.org 0x0c00`
223			`_syscall:`
224			`l.nop`
225			`l.sw 0(r0),r3 /* Save r3 */`
226			`PRINTF(r3,_syscall_str)`
227			`l.mfspr r3,r0,SPR_EPCR_BASE /* Get EPCR */`
228			`l.addi r3,r3,4 /* increment because EPCR instruction was already executed */`
229			`l.sw 4(r0),r3 /* and save it */`
230
231			`/* now save user task context */`
232			`l.movhi r3,hi(_task_context)`
233			`l.addi r3,r0,lo(_task_context)`
234			`SAVEREGS`
235
236			`/* set kernel context's PC to kernel's syscall entry */`
237			`l.movhi r3,hi(_kernel_context)`
238			`l.addi r3,r0,lo(_kernel_context)`
239			`SET_CONTEXTPC(r3,_kernel_syscall,r4)`
240
241			`/* load kernel context */`
242			`l.movhi r3,hi(_kernel_context)`
243			`l.addi r3,r0,lo(_kernel_context)`
244			`LOADREGS_N_GO`
245
246			`_syscall_str:`
247			`.ascii "System call exception.\n\000"`
248
249			`/*`
250			`* Switch to a new context pointed by _task_context`
251			`*/`
252			`.global _dispatch`
253			`.align 4`
254			`_dispatch:`
255			`/* load user task GPRs and PC */`
256			`l.movhi r3,hi(_task_context)`
257			`l.addi r3,r0,lo(_task_context)`
258			`LOADREGS_N_GO`
259