OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_47/] [or1ksim/] [testbench/] [uos/] [tick.c] - Blame information for rev 222

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 222 markom
/* This file is part of test microkernel for OpenRISC 1000. */
2
/* (C) 2001 Simon Srot, srot@opencores.org */
3
 
4
#include "spr_defs.h"
5
#include "int.h"
6
 
7
/* Tick timer period */
8
unsigned long tick_period;
9
 
10
/* Inform of tick interrupt */
11
void (*tick_inf)();
12
 
13
/* Tick interrupt routine */
14
void tick_int()
15
{
16
  /* Call inf routine */
17
  (*tick_inf)();
18
 
19
  /* Set new counter period iand clear inet pending bit */
20
/*      mtspr(SPR_TTMR, SPR_TTMR_IE | SPR_TTMR_SR | (period & SPR_TTMR_PERIOD));*/
21
}
22
 
23
/* Initialize routine */
24
int tick_init(unsigned long period, void (* inf)())
25
{
26
  /* Save tick timer period and inform routine */
27
  tick_period = period;
28
  tick_inf = inf;
29
 
30
  /* Add interrupt handler */
31
  int_add(V_TICK, tick_int, 0/*, INT_HIGH_PRI*/);
32
 
33
  /* Set counter period, enable timer and interrupt */
34
  mtspr(SPR_TTMR, SPR_TTMR_IE | SPR_TTMR_CR | (period & SPR_TTMR_PERIOD));
35
 
36
  return 0;
37
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.