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/* config.h -- Simulator configuration header file
   Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
 
   This file is part of OpenRISC 1000 Architectural Simulator.
 
   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 2 of the License, or
   (at your option) any later version.
 
   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.
 
   You should have received a copy of the GNU General Public License
   along with this program; if not, write to the Free Software
   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 
#ifndef _CONFIG_H_
#define _CONFIG_H_
 
#include <stdio.h>
 
/* Simulator configuration macros. Eventually this one will be a lot bigger. */
 
#define MAX_UARTS        4       /* Max. number of UARTs simulated */   
#define MAX_DMAS         4       /* Max. number of DMA controllers */
#define MAX_ETHERNETS    4       /* Max. number of Ethernet MACs   */
#define MAX_GPIOS        4       /* Max. number of GPIO modules    */
#define MAX_MEMORIES     16      /* Max. number of memory devices attached */
 
#define STR_SIZE        (256)
 
struct config {
  struct {
    int enabled;                      /* Is tick timer enabled?  */
    int irq;                          /* IRQ of this device */
  } tick;
 
  int nuarts;
  int uarts_enabled;
  struct {
    char rxfile[STR_SIZE];            /* Filename for RX */
    char txfile[STR_SIZE];            /* Filename for TX (required) */
    int jitter;                       /* CZ 250801 - in msecs...time to block */
    unsigned long baseaddr;           /* Naturally aligned base address */
    int irq;                          /* IRQ of this device */
    unsigned long vapi_id;            /* VAPI id for this instance */
    int uart16550;                    /* Whether this device is uart 16450 or 16550 */
  } uarts[MAX_UARTS];
 
  int ndmas;
  int dmas_enabled;
  struct {
    unsigned long baseaddr;
    int irq;                          /* IRQ of this device */
    unsigned long vapi_id;            /* VAPI id for this instance */
  } dmas[MAX_DMAS];
 
  int nethernets;
  int ethernets_enabled;
  struct {
    unsigned long baseaddr;
    unsigned dma;                     /* Which controller is this ethernet "connected" to */
    unsigned tx_channel;              /* DMA channel used for TX */
    unsigned rx_channel;              /* DMA channel used for RX */
    char rxfile[STR_SIZE];            /* Filename for RX */
    char txfile[STR_SIZE];            /* File for TX */
    unsigned long vapi_id;            /* VAPI id for this instance */
  } ethernets[MAX_ETHERNETS];
 
  int ngpios;
  int gpios_enabled;
  struct {
    unsigned long baseaddr;           /* Base address */
    int irq;                          /* IRQ of this device */
    unsigned long base_vapi_id;       /* First VAPI ID.  GPIO uses 8 consecutive IDs */
  } gpios[MAX_GPIOS];
 
  struct {
    int enabled;                      /* is MC enabled? */
    unsigned long baseaddr;           /* Naturally aligned base address */
    unsigned POC;                     /* power on reset configuration register */
  } mc;
 
  struct {
    int pattern;                      /* A user specified memory initialization pattern */
    int random_seed;                  /* Initialize the memory with random values, starting with seed */
    enum {
      MT_UNKNOWN,
      MT_PATTERN,
      MT_RANDOM
    } type;
    int nmemories;                    /* Number of attached memories */
    struct {
      int ce;                         /* Which ce this memory is associated with */
      unsigned long baseaddr;         /* Start address of the memory */
      unsigned long size;             /* Memory size */
      char name[STR_SIZE];            /* Memory type string */
      char log[STR_SIZE];             /* Memory log filename */
      int delayr;                     /* Read cycles */
      int delayw;                     /* Write cycles */
    } table[MAX_MEMORIES];
  } memory;
 
  struct {
    int enabled;                      /* Whether IMMU is enabled */
    int nways;                        /* Number of ITLB ways */
    int nsets;                        /* Number of ITLB sets */
    int pagesize;                     /* ITLB page size */
    int entrysize;                    /* ITLB entry size */
    int ustates;                      /* number of ITLB usage states */
  } immu;
 
  struct {
    int enabled;                      /* Whether DMMU is enabled */
    int nways;                        /* Number of DTLB ways */
    int nsets;                        /* Number of DTLB sets */
    int pagesize;                     /* DTLB page size */
    int entrysize;                    /* DTLB entry size */
    int ustates;                      /* number of DTLB usage states */
  } dmmu;
 
  struct {
    int tagtype;
    int enabled;                      /* Whether instruction cache is enabled */
    int nways;                        /* Number of IC ways */
    int nsets;                        /* Number of IC sets */
    int blocksize;                    /* IC entry size */
    int ustates;                      /* number of IC usage states */
  } ic;
 
  struct {
    int tagtype;
    int enabled;                      /* Whether data cache is enabled */
    int nways;                        /* Number of DC ways */
    int nsets;                        /* Number of DC sets */
    int blocksize;                    /* DC entry size */
    int ustates;                      /* number of DC usage states */
  } dc;
 
  struct {
    unsigned long upr;      /* Unit present register */
    unsigned long ver, rev; /* Version register */
    int superscalar;        /* superscalara analysis */
    int hazards;            /* dependency hazards analysis */
    int dependstats;        /* dependency statistics */
    int slp;                /* subroutine level parallelism */
    int btic;               /* branch prediction target insn cache analysis */
    int bpb;                /* branch prediction buffer analysis */
  } cpu;
 
  struct {
    int debug;              /* Simulator debugging */
    int verbose;            /* Force verbose output */
    int iprompt;            /* Interactive prompt */
 
    int profile;            /* Is profiler running */
    char prof_fn[STR_SIZE]; /* Profiler filename */
 
    int history;            /* instruction stream history analysis */
    int exe_log;            /* Print out RTL states? */
    char exe_log_fn[STR_SIZE]; /* RTL state comparison filename */
    long clkcycle_ps;       /* Clock duration in ps */
  } sim;
 
  struct {
    int enabled;            /* Whether is debug module enabled */
    int gdb_enabled;        /* Whether is debugging with gdb possible */
    int server_port;        /* A user specified port number for services */
    unsigned long vapi_id;  /* "Fake" vapi device id for JTAG proxy */
  } debug;
 
  struct {                  /* Verification API, part of Advanced Core Verification */
    int enabled;            /* Whether is VAPI module enabled */
    int server_port;        /* A user specified port number for services */
    int log_enabled;        /* Whether to log the vapi requests */
    int hide_device_id;     /* Whether to log device ID for each request */
    char vapi_fn[STR_SIZE]; /* vapi log filename */
  } vapi;
};
 
struct runtime {
  struct {
    FILE *fprof;            /* Profiler file */
    FILE *fexe_log;         /* RTL state comparison file */
    int init;               /* Whether we are still initilizing sim */
    int script_file_specified;/* Whether script file was already loaded */
    char *filename;  /* Original Command Simulator file (CZ) */
  } sim;
 
  struct {
    unsigned long ifea;     /* Instruction fetch effective address */
    unsigned long lea;      /* Load effective address */
    unsigned long sea;      /* Store effective address */
    unsigned long ld;       /* Load data */
    unsigned long sd;       /* Store data */
    unsigned long lsea;     /* Load/Store effective address */
  } cpu;
 
  struct {                  /* Verification API, part of Advanced Core Verification */
    FILE *vapi_file;        /* vapi file */
  } vapi;
};
 
#define DEBUG_ENABLED config.debug.enabled
#define GDB_ENABLED   config.debug.gdb_enabled
 
extern struct config config;
extern struct runtime runtime;
 
/* Read environment from a script file. Does not fail - assumes defaukt configuration instead. */
void read_script_file (char *filename);
 
/* Executes set sim command.  Returns nonzero if error.  */
void set_config_command (char *s);
 
#endif

Line No.	Rev	Author	Line
1	7	jrydberg	`/* config.h -- Simulator configuration header file`
2			`Copyright (C) 1999 Damjan Lampret, lampret@opencores.org`
3
4			`This file is part of OpenRISC 1000 Architectural Simulator.`
5
6			`This program is free software; you can redistribute it and/or modify`
7			`it under the terms of the GNU General Public License as published by`
8			`the Free Software Foundation; either version 2 of the License, or`
9			`(at your option) any later version.`
10
11			`This program is distributed in the hope that it will be useful,`
12			`but WITHOUT ANY WARRANTY; without even the implied warranty of`
13			`MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the`
14			`GNU General Public License for more details.`
15
16			`You should have received a copy of the GNU General Public License`
17			`along with this program; if not, write to the Free Software`
18			`Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */`
19	428	markom
20			`#ifndef _CONFIG_H_`
21			`#define _CONFIG_H_`
22
23	173	markom	`#include <stdio.h>`
24
25	7	jrydberg	`/* Simulator configuration macros. Eventually this one will be a lot bigger. */`
26	30	lampret
27	424	markom	`#define MAX_UARTS 4 /* Max. number of UARTs simulated */`
28			`#define MAX_DMAS 4 /* Max. number of DMA controllers */`
29			`#define MAX_ETHERNETS 4 /* Max. number of Ethernet MACs */`
30	444	erez	`#define MAX_GPIOS 4 /* Max. number of GPIO modules */`
31	424	markom	`#define MAX_MEMORIES 16 /* Max. number of memory devices attached */`
32
33	239	markom	`#define STR_SIZE (256)`
34
35	7	jrydberg	`struct config {`
36	239	markom	`struct {`
37	332	markom	`int enabled; /* Is tick timer enabled? */`
38			`int irq; /* IRQ of this device */`
39			`} tick;`
40
41	261	markom	`int nuarts;`
42			`int uarts_enabled;`
43	239	markom	`struct {`
44	310	markom	`char rxfile[STR_SIZE]; /* Filename for RX */`
45			`char txfile[STR_SIZE]; /* Filename for TX (required) */`
46			`int jitter; /* CZ 250801 - in msecs...time to block */`
47			`unsigned long baseaddr; /* Naturally aligned base address */`
48	332	markom	`int irq; /* IRQ of this device */`
49	313	markom	`unsigned long vapi_id; /* VAPI id for this instance */`
50	341	markom	`int uart16550; /* Whether this device is uart 16450 or 16550 */`
51	424	markom	`} uarts[MAX_UARTS];`
52	239	markom
53	261	markom	`int ndmas;`
54			`int dmas_enabled;`
55	239	markom	`struct {`
56			`unsigned long baseaddr;`
57	332	markom	`int irq; /* IRQ of this device */`
58	313	markom	`unsigned long vapi_id; /* VAPI id for this instance */`
59	424	markom	`} dmas[MAX_DMAS];`
60	239	markom
61	304	markom	`int nethernets;`
62			`int ethernets_enabled;`
63	361	markom	`struct {`
64			`unsigned long baseaddr;`
65			`unsigned dma; /* Which controller is this ethernet "connected" to */`
66			`unsigned tx_channel; /* DMA channel used for TX */`
67			`unsigned rx_channel; /* DMA channel used for RX */`
68			`char rxfile[STR_SIZE]; /* Filename for RX */`
69			`char txfile[STR_SIZE]; /* File for TX */`
70			`unsigned long vapi_id; /* VAPI id for this instance */`
71	424	markom	`} ethernets[MAX_ETHERNETS];`
72	444	erez
73			`int ngpios;`
74			`int gpios_enabled;`
75	261	markom	`struct {`
76	444	erez	`unsigned long baseaddr; /* Base address */`
77			`int irq; /* IRQ of this device */`
78	477	erez	`unsigned long base_vapi_id; /* First VAPI ID. GPIO uses 8 consecutive IDs */`
79	444	erez	`} gpios[MAX_GPIOS];`
80
81			`struct {`
82	261	markom	`int enabled; /* is MC enabled? */`
83			`unsigned long baseaddr; /* Naturally aligned base address */`
84	239	markom	`unsigned POC; /* power on reset configuration register */`
85			`} mc;`
86	262	markom
87			`struct {`
88	394	markom	`int pattern; /* A user specified memory initialization pattern */`
89			`int random_seed; /* Initialize the memory with random values, starting with seed */`
90	262	markom	`enum {`
91	269	markom	`MT_UNKNOWN,`
92	262	markom	`MT_PATTERN,`
93			`MT_RANDOM`
94			`} type;`
95	424	markom	`int nmemories; /* Number of attached memories */`
96			`struct {`
97			`int ce; /* Which ce this memory is associated with */`
98			`unsigned long baseaddr; /* Start address of the memory */`
99			`unsigned long size; /* Memory size */`
100			`char name[STR_SIZE]; /* Memory type string */`
101			`char log[STR_SIZE]; /* Memory log filename */`
102			`int delayr; /* Read cycles */`
103			`int delayw; /* Write cycles */`
104			`} table[MAX_MEMORIES];`
105	262	markom	`} memory;`
106	425	markom
107			`struct {`
108			`int enabled; /* Whether IMMU is enabled */`
109			`int nways; /* Number of ITLB ways */`
110			`int nsets; /* Number of ITLB sets */`
111			`int pagesize; /* ITLB page size */`
112			`int entrysize; /* ITLB entry size */`
113			`int ustates; /* number of ITLB usage states */`
114			`} immu;`
115
116			`struct {`
117			`int enabled; /* Whether DMMU is enabled */`
118			`int nways; /* Number of DTLB ways */`
119			`int nsets; /* Number of DTLB sets */`
120			`int pagesize; /* DTLB page size */`
121			`int entrysize; /* DTLB entry size */`
122			`int ustates; /* number of DTLB usage states */`
123			`} dmmu;`
124	428	markom
125			`struct {`
126			`int tagtype;`
127			`int enabled; /* Whether instruction cache is enabled */`
128			`int nways; /* Number of IC ways */`
129			`int nsets; /* Number of IC sets */`
130			`int blocksize; /* IC entry size */`
131			`int ustates; /* number of IC usage states */`
132			`} ic;`
133	424	markom
134	263	markom	`struct {`
135	428	markom	`int tagtype;`
136			`int enabled; /* Whether data cache is enabled */`
137			`int nways; /* Number of DC ways */`
138			`int nsets; /* Number of DC sets */`
139			`int blocksize; /* DC entry size */`
140			`int ustates; /* number of DC usage states */`
141			`} dc;`
142
143			`struct {`
144	263	markom	`unsigned long upr; /* Unit present register */`
145			`unsigned long ver, rev; /* Version register */`
146			`int superscalar; /* superscalara analysis */`
147			`int hazards; /* dependency hazards analysis */`
148	361	markom	`int dependstats; /* dependency statistics */`
149	394	markom	`int slp; /* subroutine level parallelism */`
150			`int btic; /* branch prediction target insn cache analysis */`
151	264	markom	`int bpb; /* branch prediction buffer analysis */`
152	263	markom	`} cpu;`
153	264	markom
154			`struct {`
155			`int debug; /* Simulator debugging */`
156	293	markom	`int verbose; /* Force verbose output */`
157	294	markom	`int iprompt; /* Interactive prompt */`
158	361	markom
159	264	markom	`int profile; /* Is profiler running */`
160			`char prof_fn[STR_SIZE]; /* Profiler filename */`
161	394	markom
162			`int history; /* instruction stream history analysis */`
163	361	markom	`int exe_log; /* Print out RTL states? */`
164	294	markom	`char exe_log_fn[STR_SIZE]; /* RTL state comparison filename */`
165	433	markom	`long clkcycle_ps; /* Clock duration in ps */`
166	264	markom	`} sim;`
167	294	markom
168	269	markom	`struct {`
169			`int enabled; /* Whether is debug module enabled */`
170			`int gdb_enabled; /* Whether is debugging with gdb possible */`
171			`int server_port; /* A user specified port number for services */`
172	439	erez	`unsigned long vapi_id; /* "Fake" vapi device id for JTAG proxy */`
173	269	markom	`} debug;`
174
175	293	markom	`struct { /* Verification API, part of Advanced Core Verification */`
176	306	markom	`int enabled; /* Whether is VAPI module enabled */`
177			`int server_port; /* A user specified port number for services */`
178	355	markom	`int log_enabled; /* Whether to log the vapi requests */`
179	477	erez	`int hide_device_id; /* Whether to log device ID for each request */`
180	355	markom	`char vapi_fn[STR_SIZE]; /* vapi log filename */`
181	361	markom	`} vapi;`
182			`};`
183
184			`struct runtime {`
185			`struct {`
186			`FILE fprof; / Profiler file */`
187			`FILE fexe_log; / RTL state comparison file */`
188			`int init; /* Whether we are still initilizing sim */`
189			`int script_file_specified;/* Whether script file was already loaded */`
190			`char filename; / Original Command Simulator file (CZ) */`
191			`} sim;`
192	424	markom
193	479	markom	`struct {`
194			`unsigned long ifea; /* Instruction fetch effective address */`
195			`unsigned long lea; /* Load effective address */`
196			`unsigned long sea; /* Store effective address */`
197			`unsigned long ld; /* Load data */`
198			`unsigned long sd; /* Store data */`
199			`unsigned long lsea; /* Load/Store effective address */`
200			`} cpu;`
201
202	361	markom	`struct { /* Verification API, part of Advanced Core Verification */`
203	355	markom	`FILE vapi_file; / vapi file */`
204	293	markom	`} vapi;`
205	7	jrydberg	`};`
206	239	markom
207	269	markom	`#define DEBUG_ENABLED config.debug.enabled`
208			`#define GDB_ENABLED config.debug.gdb_enabled`
209
210	7	jrydberg	`extern struct config config;`
211	361	markom	`extern struct runtime runtime;`
212	239	markom
213			`/* Read environment from a script file. Does not fail - assumes defaukt configuration instead. */`
214			`void read_script_file (char *filename);`
215	361	markom
216			`/* Executes set sim command. Returns nonzero if error. */`
217			`void set_config_command (char *s);`
218	428	markom
219			`#endif`

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[/] [or1k/] [tags/] [nog_patch_52/] [or1ksim/] [sim-config.h] - Blame information for rev 479