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/* config.h -- Simulator configuration header file
   Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
 
   This file is part of OpenRISC 1000 Architectural Simulator.
 
   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 2 of the License, or
   (at your option) any later version.
 
   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.
 
   You should have received a copy of the GNU General Public License
   along with this program; if not, write to the Free Software
   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 
#ifndef _CONFIG_H_
#define _CONFIG_H_
 
#include <stdio.h>
 
/* Simulator configuration macros. Eventually this one will be a lot bigger. */
 
#define MAX_UARTS        4       /* Max. number of UARTs simulated */   
#define MAX_DMAS         4       /* Max. number of DMA controllers */
#define MAX_ETHERNETS    4       /* Max. number of Ethernet MACs   */
#define MAX_GPIOS        4       /* Max. number of GPIO modules    */
#define MAX_MEMORIES     16      /* Max. number of memory devices attached */
 
#define STR_SIZE        (256)
 
struct config {
  struct {
    int enabled;                      /* Is tick timer enabled?  */
    int irq;                          /* IRQ of this device */
  } tick;
 
  int nuarts;
  struct {
    char rxfile[STR_SIZE];            /* Filename for RX */
    char txfile[STR_SIZE];            /* Filename for TX (required) */
    int jitter;                       /* CZ 250801 - in msecs...time to block */
    unsigned long baseaddr;           /* Naturally aligned base address */
    int irq;                          /* IRQ of this device */
    unsigned long vapi_id;            /* VAPI id for this instance */
    int uart16550;                    /* Whether this device is uart 16450 or 16550 */
  } uarts[MAX_UARTS];
 
  int ndmas;
  struct {
    unsigned long baseaddr;
    int irq;                          /* IRQ of this device */
    unsigned long vapi_id;            /* VAPI id for this instance */
  } dmas[MAX_DMAS];
 
  int nethernets;
  struct {
    unsigned long baseaddr;
    unsigned dma;                     /* Which controller is this ethernet "connected" to */
    unsigned tx_channel;              /* DMA channel used for TX */
    unsigned rx_channel;              /* DMA channel used for RX */
    char rxfile[STR_SIZE];            /* Filename for RX */
    char txfile[STR_SIZE];            /* File for TX */
    unsigned long vapi_id;            /* VAPI id for this instance */
  } ethernets[MAX_ETHERNETS];
 
  int ngpios;
  struct {
    unsigned long baseaddr;           /* Base address */
    int irq;                          /* IRQ of this device */
    unsigned long base_vapi_id;       /* First VAPI ID.  GPIO uses 8 consecutive IDs */
  } gpios[MAX_GPIOS];
 
  struct {
    int enabled;                      /* is MC enabled? */
    unsigned long baseaddr;           /* Naturally aligned base address */
    unsigned POC;                     /* power on reset configuration register */
  } mc;
 
  struct {
    int pattern;                      /* A user specified memory initialization pattern */
    int random_seed;                  /* Initialize the memory with random values, starting with seed */
    enum {
      MT_UNKNOWN,
      MT_PATTERN,
      MT_RANDOM
    } type;
    int nmemories;                    /* Number of attached memories */
    struct {
      int ce;                         /* Which ce this memory is associated with */
      unsigned long baseaddr;         /* Start address of the memory */
      unsigned long size;             /* Memory size */
      char name[STR_SIZE];            /* Memory type string */
      char log[STR_SIZE];             /* Memory log filename */
      int delayr;                     /* Read cycles */
      int delayw;                     /* Write cycles */
    } table[MAX_MEMORIES];
  } memory;
 
  struct {
    int enabled;                      /* Whether IMMU is enabled */
    int nways;                        /* Number of ITLB ways */
    int nsets;                        /* Number of ITLB sets */
    int pagesize;                     /* ITLB page size */
    int entrysize;                    /* ITLB entry size */
    int ustates;                      /* number of ITLB usage states */
    int missdelay;                    /* How much cycles does the miss cost */
    int hitdelay;                     /* How much cycles does the hit cost */
  } immu;
 
  struct {
    int enabled;                      /* Whether DMMU is enabled */
    int nways;                        /* Number of DTLB ways */
    int nsets;                        /* Number of DTLB sets */
    int pagesize;                     /* DTLB page size */
    int entrysize;                    /* DTLB entry size */
    int ustates;                      /* number of DTLB usage states */
    int missdelay;                    /* How much cycles does the miss cost */
    int hitdelay;                     /* How much cycles does the hit cost */
  } dmmu;
 
  struct {
    int tagtype;
    int enabled;                      /* Whether instruction cache is enabled */
    int nways;                        /* Number of IC ways */
    int nsets;                        /* Number of IC sets */
    int blocksize;                    /* IC entry size */
    int ustates;                      /* number of IC usage states */
    int missdelay;                    /* How much cycles does the miss cost */
    int hitdelay;                     /* How much cycles does the hit cost */
  } ic;
 
  struct {
    int enabled;                      /* Whether data cache is enabled */
    int tagtype;
    int nways;                        /* Number of DC ways */
    int nsets;                        /* Number of DC sets */
    int blocksize;                    /* DC entry size */
    int ustates;                      /* number of DC usage states */
    int store_missdelay;              /* How much cycles does the store miss cost */
    int store_hitdelay;               /* How much cycles does the store hit cost */
    int load_missdelay;               /* How much cycles does the load miss cost */
    int load_hitdelay;                /* How much cycles does the load hit cost */
  } dc;
 
  struct {
    int enabled;            /* branch prediction buffer analysis */
    int sbp_bnf_fwd;        /* Static branch prediction for l.bnf uses forward prediction */
    int sbp_bf_fwd;         /* Static branch prediction for l.bf uses forward prediction */
    int btic;               /* branch prediction target insn cache analysis */
    int missdelay;          /* How much cycles does the miss cost */
    int hitdelay;           /* How much cycles does the hit cost */
  } bpb;
 
  struct {
    unsigned long upr;      /* Unit present register */
    unsigned long ver, rev; /* Version register */
    int sr;                 /* Supervision register */
    int superscalar;        /* superscalara analysis */
    int hazards;            /* dependency hazards analysis */
    int dependstats;        /* dependency statistics */
    int raw_range;          /* raw register usage over time stats; range in cycles, 0 = disabled */
  } cpu;
 
  struct {
    int debug;              /* Simulator debugging */
    int verbose;            /* Force verbose output */
 
    int profile;            /* Is profiler running */
    char prof_fn[STR_SIZE]; /* Profiler filename */
 
    int mprofile;           /* Is memory profiler running */
    char mprof_fn[STR_SIZE];/* Memory profiler filename */
 
    int history;            /* instruction stream history analysis */
    int exe_log;            /* Print out RTL states? */
    char exe_log_fn[STR_SIZE]; /* RTL state comparison filename */
    long clkcycle_ps;       /* Clock duration in ps */
  } sim;
 
  struct {
    int enabled;            /* Whether is debug module enabled */
    int gdb_enabled;        /* Whether is debugging with gdb possible */
    int server_port;        /* A user specified port number for services */
    unsigned long vapi_id;  /* "Fake" vapi device id for JTAG proxy */
  } debug;
 
  struct {                  /* Verification API, part of Advanced Core Verification */
    int enabled;            /* Whether is VAPI module enabled */
    int server_port;        /* A user specified port number for services */
    int log_enabled;        /* Whether to log the vapi requests */
    int hide_device_id;     /* Whether to log device ID for each request */
    char vapi_fn[STR_SIZE]; /* vapi log filename */
  } vapi;
};
 
struct runtime {
  struct {
    FILE *fprof;            /* Profiler file */
    FILE *fmprof;           /* Memory profiler file */
    FILE *fexe_log;         /* RTL state comparison file */
    int init;               /* Whether we are still initilizing sim */
    int script_file_specified;/* Whether script file was already loaded */
    char *filename;         /* Original Command Simulator file (CZ) */
    int output_cfg;         /* Whether sim is to output cfg files */
    char script_fn[STR_SIZE];/* Script file read */
    int iprompt;            /* Interactive prompt */
  } sim;
 
  struct {
    unsigned long ifea;     /* Instruction fetch effective address */
    unsigned long lea;      /* Load effective address */
    unsigned long sea;      /* Store effective address */
    unsigned long ld;       /* Load data */
    unsigned long sd;       /* Store data */
    unsigned long lsea;     /* Load/Store effective address */
  } cpu;
 
  struct {
    int random_seed;                  /* Initialize the memory with random values, starting with seed */
  } memory;
 
  struct {                  /* Verification API, part of Advanced Core Verification */
    int enabled;            /* Whether is VAPI module enabled */
    FILE *vapi_file;        /* vapi file */
    int server_port;        /* A user specified port number for services */
  } vapi;
};
 
#if FAST_SIM
#include "fast_config.c"
#else
extern struct config config;
#endif
 
extern struct runtime runtime;
 
/* Read environment from a script file. Does not fail - assumes defaukt configuration instead. */
void read_script_file (char *filename);
 
/* Executes set sim command.  Returns nonzero if error.  */
void set_config_command (char *s);
 
/* Outputs C structure of current config to file */
void output_cfg (FILE *f);
 
#endif

Line No.	Rev	Author	Line
1	7	jrydberg	`/* config.h -- Simulator configuration header file`
2			`Copyright (C) 1999 Damjan Lampret, lampret@opencores.org`
3
4			`This file is part of OpenRISC 1000 Architectural Simulator.`
5
6			`This program is free software; you can redistribute it and/or modify`
7			`it under the terms of the GNU General Public License as published by`
8			`the Free Software Foundation; either version 2 of the License, or`
9			`(at your option) any later version.`
10
11			`This program is distributed in the hope that it will be useful,`
12			`but WITHOUT ANY WARRANTY; without even the implied warranty of`
13			`MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the`
14			`GNU General Public License for more details.`
15
16			`You should have received a copy of the GNU General Public License`
17			`along with this program; if not, write to the Free Software`
18			`Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */`
19	428	markom
20			`#ifndef _CONFIG_H_`
21			`#define _CONFIG_H_`
22
23	173	markom	`#include <stdio.h>`
24
25	7	jrydberg	`/* Simulator configuration macros. Eventually this one will be a lot bigger. */`
26	30	lampret
27	424	markom	`#define MAX_UARTS 4 /* Max. number of UARTs simulated */`
28			`#define MAX_DMAS 4 /* Max. number of DMA controllers */`
29			`#define MAX_ETHERNETS 4 /* Max. number of Ethernet MACs */`
30	444	erez	`#define MAX_GPIOS 4 /* Max. number of GPIO modules */`
31	424	markom	`#define MAX_MEMORIES 16 /* Max. number of memory devices attached */`
32
33	239	markom	`#define STR_SIZE (256)`
34
35	7	jrydberg	`struct config {`
36	239	markom	`struct {`
37	332	markom	`int enabled; /* Is tick timer enabled? */`
38			`int irq; /* IRQ of this device */`
39			`} tick;`
40
41	261	markom	`int nuarts;`
42	239	markom	`struct {`
43	310	markom	`char rxfile[STR_SIZE]; /* Filename for RX */`
44			`char txfile[STR_SIZE]; /* Filename for TX (required) */`
45			`int jitter; /* CZ 250801 - in msecs...time to block */`
46			`unsigned long baseaddr; /* Naturally aligned base address */`
47	332	markom	`int irq; /* IRQ of this device */`
48	313	markom	`unsigned long vapi_id; /* VAPI id for this instance */`
49	341	markom	`int uart16550; /* Whether this device is uart 16450 or 16550 */`
50	424	markom	`} uarts[MAX_UARTS];`
51	239	markom
52	261	markom	`int ndmas;`
53	239	markom	`struct {`
54			`unsigned long baseaddr;`
55	332	markom	`int irq; /* IRQ of this device */`
56	313	markom	`unsigned long vapi_id; /* VAPI id for this instance */`
57	424	markom	`} dmas[MAX_DMAS];`
58	239	markom
59	304	markom	`int nethernets;`
60	361	markom	`struct {`
61			`unsigned long baseaddr;`
62			`unsigned dma; /* Which controller is this ethernet "connected" to */`
63			`unsigned tx_channel; /* DMA channel used for TX */`
64			`unsigned rx_channel; /* DMA channel used for RX */`
65			`char rxfile[STR_SIZE]; /* Filename for RX */`
66			`char txfile[STR_SIZE]; /* File for TX */`
67			`unsigned long vapi_id; /* VAPI id for this instance */`
68	424	markom	`} ethernets[MAX_ETHERNETS];`
69	444	erez
70			`int ngpios;`
71	261	markom	`struct {`
72	444	erez	`unsigned long baseaddr; /* Base address */`
73			`int irq; /* IRQ of this device */`
74	477	erez	`unsigned long base_vapi_id; /* First VAPI ID. GPIO uses 8 consecutive IDs */`
75	444	erez	`} gpios[MAX_GPIOS];`
76
77			`struct {`
78	261	markom	`int enabled; /* is MC enabled? */`
79			`unsigned long baseaddr; /* Naturally aligned base address */`
80	239	markom	`unsigned POC; /* power on reset configuration register */`
81			`} mc;`
82	262	markom
83			`struct {`
84	394	markom	`int pattern; /* A user specified memory initialization pattern */`
85			`int random_seed; /* Initialize the memory with random values, starting with seed */`
86	262	markom	`enum {`
87	269	markom	`MT_UNKNOWN,`
88	262	markom	`MT_PATTERN,`
89			`MT_RANDOM`
90			`} type;`
91	424	markom	`int nmemories; /* Number of attached memories */`
92			`struct {`
93			`int ce; /* Which ce this memory is associated with */`
94			`unsigned long baseaddr; /* Start address of the memory */`
95			`unsigned long size; /* Memory size */`
96			`char name[STR_SIZE]; /* Memory type string */`
97			`char log[STR_SIZE]; /* Memory log filename */`
98			`int delayr; /* Read cycles */`
99			`int delayw; /* Write cycles */`
100			`} table[MAX_MEMORIES];`
101	262	markom	`} memory;`
102	425	markom
103			`struct {`
104			`int enabled; /* Whether IMMU is enabled */`
105			`int nways; /* Number of ITLB ways */`
106			`int nsets; /* Number of ITLB sets */`
107			`int pagesize; /* ITLB page size */`
108			`int entrysize; /* ITLB entry size */`
109			`int ustates; /* number of ITLB usage states */`
110	541	markom	`int missdelay; /* How much cycles does the miss cost */`
111			`int hitdelay; /* How much cycles does the hit cost */`
112	425	markom	`} immu;`
113
114			`struct {`
115			`int enabled; /* Whether DMMU is enabled */`
116			`int nways; /* Number of DTLB ways */`
117			`int nsets; /* Number of DTLB sets */`
118			`int pagesize; /* DTLB page size */`
119			`int entrysize; /* DTLB entry size */`
120			`int ustates; /* number of DTLB usage states */`
121	541	markom	`int missdelay; /* How much cycles does the miss cost */`
122			`int hitdelay; /* How much cycles does the hit cost */`
123	425	markom	`} dmmu;`
124	428	markom
125			`struct {`
126			`int tagtype;`
127			`int enabled; /* Whether instruction cache is enabled */`
128			`int nways; /* Number of IC ways */`
129			`int nsets; /* Number of IC sets */`
130			`int blocksize; /* IC entry size */`
131			`int ustates; /* number of IC usage states */`
132	541	markom	`int missdelay; /* How much cycles does the miss cost */`
133			`int hitdelay; /* How much cycles does the hit cost */`
134	428	markom	`} ic;`
135	424	markom
136	263	markom	`struct {`
137	541	markom	`int enabled; /* Whether data cache is enabled */`
138	428	markom	`int tagtype;`
139			`int nways; /* Number of DC ways */`
140			`int nsets; /* Number of DC sets */`
141			`int blocksize; /* DC entry size */`
142			`int ustates; /* number of DC usage states */`
143	541	markom	`int store_missdelay; /* How much cycles does the store miss cost */`
144			`int store_hitdelay; /* How much cycles does the store hit cost */`
145			`int load_missdelay; /* How much cycles does the load miss cost */`
146			`int load_hitdelay; /* How much cycles does the load hit cost */`
147	428	markom	`} dc;`
148
149			`struct {`
150	541	markom	`int enabled; /* branch prediction buffer analysis */`
151			`int sbp_bnf_fwd; /* Static branch prediction for l.bnf uses forward prediction */`
152			`int sbp_bf_fwd; /* Static branch prediction for l.bf uses forward prediction */`
153			`int btic; /* branch prediction target insn cache analysis */`
154			`int missdelay; /* How much cycles does the miss cost */`
155			`int hitdelay; /* How much cycles does the hit cost */`
156			`} bpb;`
157
158			`struct {`
159	263	markom	`unsigned long upr; /* Unit present register */`
160			`unsigned long ver, rev; /* Version register */`
161	556	markom	`int sr; /* Supervision register */`
162	263	markom	`int superscalar; /* superscalara analysis */`
163			`int hazards; /* dependency hazards analysis */`
164	361	markom	`int dependstats; /* dependency statistics */`
165	535	markom	`int raw_range; /* raw register usage over time stats; range in cycles, 0 = disabled */`
166	263	markom	`} cpu;`
167	264	markom
168			`struct {`
169			`int debug; /* Simulator debugging */`
170	293	markom	`int verbose; /* Force verbose output */`
171	361	markom
172	264	markom	`int profile; /* Is profiler running */`
173			`char prof_fn[STR_SIZE]; /* Profiler filename */`
174	547	markom
175			`int mprofile; /* Is memory profiler running */`
176			`char mprof_fn[STR_SIZE];/* Memory profiler filename */`
177	394	markom
178			`int history; /* instruction stream history analysis */`
179	361	markom	`int exe_log; /* Print out RTL states? */`
180	294	markom	`char exe_log_fn[STR_SIZE]; /* RTL state comparison filename */`
181	433	markom	`long clkcycle_ps; /* Clock duration in ps */`
182	264	markom	`} sim;`
183	294	markom
184	269	markom	`struct {`
185			`int enabled; /* Whether is debug module enabled */`
186			`int gdb_enabled; /* Whether is debugging with gdb possible */`
187			`int server_port; /* A user specified port number for services */`
188	439	erez	`unsigned long vapi_id; /* "Fake" vapi device id for JTAG proxy */`
189	269	markom	`} debug;`
190
191	293	markom	`struct { /* Verification API, part of Advanced Core Verification */`
192	306	markom	`int enabled; /* Whether is VAPI module enabled */`
193			`int server_port; /* A user specified port number for services */`
194	355	markom	`int log_enabled; /* Whether to log the vapi requests */`
195	477	erez	`int hide_device_id; /* Whether to log device ID for each request */`
196	355	markom	`char vapi_fn[STR_SIZE]; /* vapi log filename */`
197	361	markom	`} vapi;`
198			`};`
199
200			`struct runtime {`
201			`struct {`
202			`FILE fprof; / Profiler file */`
203	547	markom	`FILE fmprof; / Memory profiler file */`
204	361	markom	`FILE fexe_log; / RTL state comparison file */`
205			`int init; /* Whether we are still initilizing sim */`
206			`int script_file_specified;/* Whether script file was already loaded */`
207	549	markom	`char filename; / Original Command Simulator file (CZ) */`
208			`int output_cfg; /* Whether sim is to output cfg files */`
209			`char script_fn[STR_SIZE];/* Script file read */`
210	551	markom	`int iprompt; /* Interactive prompt */`
211	361	markom	`} sim;`
212	424	markom
213	479	markom	`struct {`
214			`unsigned long ifea; /* Instruction fetch effective address */`
215			`unsigned long lea; /* Load effective address */`
216			`unsigned long sea; /* Store effective address */`
217			`unsigned long ld; /* Load data */`
218			`unsigned long sd; /* Store data */`
219			`unsigned long lsea; /* Load/Store effective address */`
220			`} cpu;`
221
222	551	markom	`struct {`
223			`int random_seed; /* Initialize the memory with random values, starting with seed */`
224			`} memory;`
225
226	361	markom	`struct { /* Verification API, part of Advanced Core Verification */`
227	551	markom	`int enabled; /* Whether is VAPI module enabled */`
228	355	markom	`FILE vapi_file; / vapi file */`
229	551	markom	`int server_port; /* A user specified port number for services */`
230	293	markom	`} vapi;`
231	7	jrydberg	`};`
232	239	markom
233	551	markom	`#if FAST_SIM`
234			`#include "fast_config.c"`
235			`#else`
236	7	jrydberg	`extern struct config config;`
237	551	markom	`#endif`
238
239	361	markom	`extern struct runtime runtime;`
240	239	markom
241			`/* Read environment from a script file. Does not fail - assumes defaukt configuration instead. */`
242			`void read_script_file (char *filename);`
243	361	markom
244			`/* Executes set sim command. Returns nonzero if error. */`
245			`void set_config_command (char *s);`
246	428	markom
247	549	markom	`/* Outputs C structure of current config to file */`
248			`void output_cfg (FILE *f);`
249
250	428	markom	`#endif`

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[/] [or1k/] [tags/] [nog_patch_52/] [or1ksim/] [sim-config.h] - Blame information for rev 556