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/* config.h -- Simulator configuration header file
   Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
 
   This file is part of OpenRISC 1000 Architectural Simulator.
 
   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 2 of the License, or
   (at your option) any later version.
 
   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.
 
   You should have received a copy of the GNU General Public License
   along with this program; if not, write to the Free Software
   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 
#ifndef _CONFIG_H_
#define _CONFIG_H_
 
#include <stdio.h>
 
/* Simulator configuration macros. Eventually this one will be a lot bigger. */
 
#define MAX_UARTS        4       /* Max. number of UARTs simulated */   
#define MAX_DMAS         4       /* Max. number of DMA controllers */
#define MAX_ETHERNETS    4       /* Max. number of Ethernet MACs   */
#define MAX_GPIOS        4       /* Max. number of GPIO modules    */
#define MAX_MEMORIES     16      /* Max. number of memory devices attached */
 
#define STR_SIZE        (256)
 
struct config {
  struct {
    int enabled;                      /* Is tick timer enabled?  */
  } tick;
 
  int nuarts;
  struct {
    char rxfile[STR_SIZE];            /* Filename for RX */
    char txfile[STR_SIZE];            /* Filename for TX (required) */
    int jitter;                       /* CZ 250801 - in msecs...time to block */
    unsigned long baseaddr;           /* Naturally aligned base address */
    int irq;                          /* IRQ of this device */
    unsigned long vapi_id;            /* VAPI id for this instance */
    int uart16550;                    /* Whether this device is uart 16450 or 16550 */
  } uarts[MAX_UARTS];
 
  int ndmas;
  struct {
    unsigned long baseaddr;
    int irq;                          /* IRQ of this device */
    unsigned long vapi_id;            /* VAPI id for this instance */
  } dmas[MAX_DMAS];
 
  int nethernets;
  struct {
    unsigned long baseaddr;
    unsigned dma;                     /* Which controller is this ethernet "connected" to */
    unsigned tx_channel;              /* DMA channel used for TX */
    unsigned rx_channel;              /* DMA channel used for RX */
    char rxfile[STR_SIZE];            /* Filename for RX */
    char txfile[STR_SIZE];            /* File for TX */
    unsigned long vapi_id;            /* VAPI id for this instance */
  } ethernets[MAX_ETHERNETS];
 
  int ngpios;
  struct {
    unsigned long baseaddr;           /* Base address */
    int irq;                          /* IRQ of this device */
    unsigned long base_vapi_id;       /* First VAPI ID.  GPIO uses 8 consecutive IDs */
  } gpios[MAX_GPIOS];
 
  struct {
    int enabled;                      /* is MC enabled? */
    unsigned long baseaddr;           /* Naturally aligned base address */
    unsigned POC;                     /* power on reset configuration register */
  } mc;
 
  struct {
    int pattern;                      /* A user specified memory initialization pattern */
    int random_seed;                  /* Initialize the memory with random values, starting with seed */
    enum {
      MT_UNKNOWN,
      MT_PATTERN,
      MT_RANDOM
    } type;
    int nmemories;                    /* Number of attached memories */
    struct {
      int ce;                         /* Which ce this memory is associated with */
      unsigned long baseaddr;         /* Start address of the memory */
      unsigned long size;             /* Memory size */
      char name[STR_SIZE];            /* Memory type string */
      char log[STR_SIZE];             /* Memory log filename */
      int delayr;                     /* Read cycles */
      int delayw;                     /* Write cycles */
    } table[MAX_MEMORIES];
  } memory;
 
  struct {
    int enabled;                      /* Whether IMMU is enabled */
    int nways;                        /* Number of ITLB ways */
    int nsets;                        /* Number of ITLB sets */
    int pagesize;                     /* ITLB page size */
    int entrysize;                    /* ITLB entry size */
    int ustates;                      /* number of ITLB usage states */
    int missdelay;                    /* How much cycles does the miss cost */
    int hitdelay;                     /* How much cycles does the hit cost */
  } immu;
 
  struct {
    int enabled;                      /* Whether DMMU is enabled */
    int nways;                        /* Number of DTLB ways */
    int nsets;                        /* Number of DTLB sets */
    int pagesize;                     /* DTLB page size */
    int entrysize;                    /* DTLB entry size */
    int ustates;                      /* number of DTLB usage states */
    int missdelay;                    /* How much cycles does the miss cost */
    int hitdelay;                     /* How much cycles does the hit cost */
  } dmmu;
 
  struct {
    int tagtype;
    int enabled;                      /* Whether instruction cache is enabled */
    int nways;                        /* Number of IC ways */
    int nsets;                        /* Number of IC sets */
    int blocksize;                    /* IC entry size */
    int ustates;                      /* number of IC usage states */
    int missdelay;                    /* How much cycles does the miss cost */
    int hitdelay;                     /* How much cycles does the hit cost */
  } ic;
 
  struct {
    int enabled;                      /* Whether data cache is enabled */
    int tagtype;
    int nways;                        /* Number of DC ways */
    int nsets;                        /* Number of DC sets */
    int blocksize;                    /* DC entry size */
    int ustates;                      /* number of DC usage states */
    int store_missdelay;              /* How much cycles does the store miss cost */
    int store_hitdelay;               /* How much cycles does the store hit cost */
    int load_missdelay;               /* How much cycles does the load miss cost */
    int load_hitdelay;                /* How much cycles does the load hit cost */
  } dc;
 
  struct {
    int enabled;            /* branch prediction buffer analysis */
    int sbp_bnf_fwd;        /* Static branch prediction for l.bnf uses forward prediction */
    int sbp_bf_fwd;         /* Static branch prediction for l.bf uses forward prediction */
    int btic;               /* branch prediction target insn cache analysis */
    int missdelay;          /* How much cycles does the miss cost */
    int hitdelay;           /* How much cycles does the hit cost */
  } bpb;
 
  struct {
    unsigned long upr;      /* Unit present register */
    unsigned long ver, rev; /* Version register */
    int sr;                 /* Supervision register */
    int superscalar;        /* superscalara analysis */
    int hazards;            /* dependency hazards analysis */
    int dependstats;        /* dependency statistics */
    int raw_range;          /* raw register usage over time stats; range in cycles, 0 = disabled */
  } cpu;
 
  struct {
    int debug;              /* Simulator debugging */
    int verbose;            /* Force verbose output */
 
    int profile;            /* Is profiler running */
    char prof_fn[STR_SIZE]; /* Profiler filename */
 
    int mprofile;           /* Is memory profiler running */
    char mprof_fn[STR_SIZE];/* Memory profiler filename */
 
    int history;            /* instruction stream history analysis */
    int exe_log;            /* Print out RTL states? */
    char exe_log_fn[STR_SIZE]; /* RTL state comparison filename */
    int spr_log;            /* Print out SPR states */
    char spr_log_fn[STR_SIZE]; /* SPR state log filename */
    long clkcycle_ps;       /* Clock duration in ps */
  } sim;
 
  struct {
    int enabled;            /* Whether is debug module enabled */
    int gdb_enabled;        /* Whether is debugging with gdb possible */
    int server_port;        /* A user specified port number for services */
    unsigned long vapi_id;  /* "Fake" vapi device id for JTAG proxy */
  } debug;
 
  struct {                  /* Verification API, part of Advanced Core Verification */
    int enabled;            /* Whether is VAPI module enabled */
    int server_port;        /* A user specified port number for services */
    int log_enabled;        /* Whether to log the vapi requests */
    int hide_device_id;     /* Whether to log device ID for each request */
    char vapi_fn[STR_SIZE]; /* vapi log filename */
  } vapi;
 
  struct {
    int enabled;            /* Whether power menagement is operational */
  } pm;
};
 
struct runtime {
  struct {
    FILE *fprof;            /* Profiler file */
    FILE *fmprof;           /* Memory profiler file */
    FILE *fexe_log;         /* RTL state comparison file */
    FILE *fspr_log;         /* SPR state log file */
    int init;               /* Whether we are still initilizing sim */
    int script_file_specified;/* Whether script file was already loaded */
    char *filename;         /* Original Command Simulator file (CZ) */
    int output_cfg;         /* Whether sim is to output cfg files */
    char script_fn[STR_SIZE];/* Script file read */
    int iprompt;            /* Interactive prompt */
  } sim;
 
  struct {
    unsigned long ifea;     /* Instruction fetch effective address */
    unsigned long lea;      /* Load effective address */
    unsigned long sea;      /* Store effective address */
    unsigned long ld;       /* Load data */
    unsigned long sd;       /* Store data */
    unsigned long lsea;     /* Load/Store effective address */
  } cpu;
 
  struct {
    int random_seed;                  /* Initialize the memory with random values, starting with seed */
  } memory;
 
  struct {                  /* Verification API, part of Advanced Core Verification */
    int enabled;            /* Whether is VAPI module enabled */
    FILE *vapi_file;        /* vapi file */
    int server_port;        /* A user specified port number for services */
  } vapi;
};
 
#if FAST_SIM
#include "fast_config.c"
#define IFF(x) if (x)
#else
extern struct config config;
#define IFF(x) if (1)
#endif
 
extern struct runtime runtime;
 
/* Read environment from a script file. Does not fail - assumes defaukt configuration instead. */
void read_script_file (char *filename);
 
/* Executes set sim command.  Returns nonzero if error.  */
void set_config_command (char *s);
 
/* Outputs C structure of current config to file */
void output_cfg (FILE *f);
 
#endif

Line No.	Rev	Author	Line
1	7	jrydberg	`/* config.h -- Simulator configuration header file`
2			`Copyright (C) 1999 Damjan Lampret, lampret@opencores.org`
3
4			`This file is part of OpenRISC 1000 Architectural Simulator.`
5
6			`This program is free software; you can redistribute it and/or modify`
7			`it under the terms of the GNU General Public License as published by`
8			`the Free Software Foundation; either version 2 of the License, or`
9			`(at your option) any later version.`
10
11			`This program is distributed in the hope that it will be useful,`
12			`but WITHOUT ANY WARRANTY; without even the implied warranty of`
13			`MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the`
14			`GNU General Public License for more details.`
15
16			`You should have received a copy of the GNU General Public License`
17			`along with this program; if not, write to the Free Software`
18			`Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */`
19	428	markom
20			`#ifndef _CONFIG_H_`
21			`#define _CONFIG_H_`
22
23	173	markom	`#include <stdio.h>`
24
25	7	jrydberg	`/* Simulator configuration macros. Eventually this one will be a lot bigger. */`
26	30	lampret
27	424	markom	`#define MAX_UARTS 4 /* Max. number of UARTs simulated */`
28			`#define MAX_DMAS 4 /* Max. number of DMA controllers */`
29			`#define MAX_ETHERNETS 4 /* Max. number of Ethernet MACs */`
30	444	erez	`#define MAX_GPIOS 4 /* Max. number of GPIO modules */`
31	424	markom	`#define MAX_MEMORIES 16 /* Max. number of memory devices attached */`
32
33	239	markom	`#define STR_SIZE (256)`
34
35	7	jrydberg	`struct config {`
36	239	markom	`struct {`
37	332	markom	`int enabled; /* Is tick timer enabled? */`
38			`} tick;`
39
40	261	markom	`int nuarts;`
41	239	markom	`struct {`
42	310	markom	`char rxfile[STR_SIZE]; /* Filename for RX */`
43			`char txfile[STR_SIZE]; /* Filename for TX (required) */`
44			`int jitter; /* CZ 250801 - in msecs...time to block */`
45			`unsigned long baseaddr; /* Naturally aligned base address */`
46	332	markom	`int irq; /* IRQ of this device */`
47	313	markom	`unsigned long vapi_id; /* VAPI id for this instance */`
48	341	markom	`int uart16550; /* Whether this device is uart 16450 or 16550 */`
49	424	markom	`} uarts[MAX_UARTS];`
50	239	markom
51	261	markom	`int ndmas;`
52	239	markom	`struct {`
53			`unsigned long baseaddr;`
54	332	markom	`int irq; /* IRQ of this device */`
55	313	markom	`unsigned long vapi_id; /* VAPI id for this instance */`
56	424	markom	`} dmas[MAX_DMAS];`
57	239	markom
58	304	markom	`int nethernets;`
59	361	markom	`struct {`
60			`unsigned long baseaddr;`
61			`unsigned dma; /* Which controller is this ethernet "connected" to */`
62			`unsigned tx_channel; /* DMA channel used for TX */`
63			`unsigned rx_channel; /* DMA channel used for RX */`
64			`char rxfile[STR_SIZE]; /* Filename for RX */`
65			`char txfile[STR_SIZE]; /* File for TX */`
66			`unsigned long vapi_id; /* VAPI id for this instance */`
67	424	markom	`} ethernets[MAX_ETHERNETS];`
68	444	erez
69			`int ngpios;`
70	261	markom	`struct {`
71	444	erez	`unsigned long baseaddr; /* Base address */`
72			`int irq; /* IRQ of this device */`
73	477	erez	`unsigned long base_vapi_id; /* First VAPI ID. GPIO uses 8 consecutive IDs */`
74	444	erez	`} gpios[MAX_GPIOS];`
75
76			`struct {`
77	261	markom	`int enabled; /* is MC enabled? */`
78			`unsigned long baseaddr; /* Naturally aligned base address */`
79	239	markom	`unsigned POC; /* power on reset configuration register */`
80			`} mc;`
81	262	markom
82			`struct {`
83	394	markom	`int pattern; /* A user specified memory initialization pattern */`
84			`int random_seed; /* Initialize the memory with random values, starting with seed */`
85	262	markom	`enum {`
86	269	markom	`MT_UNKNOWN,`
87	262	markom	`MT_PATTERN,`
88			`MT_RANDOM`
89			`} type;`
90	424	markom	`int nmemories; /* Number of attached memories */`
91			`struct {`
92			`int ce; /* Which ce this memory is associated with */`
93			`unsigned long baseaddr; /* Start address of the memory */`
94			`unsigned long size; /* Memory size */`
95			`char name[STR_SIZE]; /* Memory type string */`
96			`char log[STR_SIZE]; /* Memory log filename */`
97			`int delayr; /* Read cycles */`
98			`int delayw; /* Write cycles */`
99			`} table[MAX_MEMORIES];`
100	262	markom	`} memory;`
101	425	markom
102			`struct {`
103			`int enabled; /* Whether IMMU is enabled */`
104			`int nways; /* Number of ITLB ways */`
105			`int nsets; /* Number of ITLB sets */`
106			`int pagesize; /* ITLB page size */`
107			`int entrysize; /* ITLB entry size */`
108			`int ustates; /* number of ITLB usage states */`
109	541	markom	`int missdelay; /* How much cycles does the miss cost */`
110			`int hitdelay; /* How much cycles does the hit cost */`
111	425	markom	`} immu;`
112
113			`struct {`
114			`int enabled; /* Whether DMMU is enabled */`
115			`int nways; /* Number of DTLB ways */`
116			`int nsets; /* Number of DTLB sets */`
117			`int pagesize; /* DTLB page size */`
118			`int entrysize; /* DTLB entry size */`
119			`int ustates; /* number of DTLB usage states */`
120	541	markom	`int missdelay; /* How much cycles does the miss cost */`
121			`int hitdelay; /* How much cycles does the hit cost */`
122	425	markom	`} dmmu;`
123	428	markom
124			`struct {`
125			`int tagtype;`
126			`int enabled; /* Whether instruction cache is enabled */`
127			`int nways; /* Number of IC ways */`
128			`int nsets; /* Number of IC sets */`
129			`int blocksize; /* IC entry size */`
130			`int ustates; /* number of IC usage states */`
131	541	markom	`int missdelay; /* How much cycles does the miss cost */`
132			`int hitdelay; /* How much cycles does the hit cost */`
133	428	markom	`} ic;`
134	424	markom
135	263	markom	`struct {`
136	541	markom	`int enabled; /* Whether data cache is enabled */`
137	428	markom	`int tagtype;`
138			`int nways; /* Number of DC ways */`
139			`int nsets; /* Number of DC sets */`
140			`int blocksize; /* DC entry size */`
141			`int ustates; /* number of DC usage states */`
142	541	markom	`int store_missdelay; /* How much cycles does the store miss cost */`
143			`int store_hitdelay; /* How much cycles does the store hit cost */`
144			`int load_missdelay; /* How much cycles does the load miss cost */`
145			`int load_hitdelay; /* How much cycles does the load hit cost */`
146	428	markom	`} dc;`
147
148			`struct {`
149	541	markom	`int enabled; /* branch prediction buffer analysis */`
150			`int sbp_bnf_fwd; /* Static branch prediction for l.bnf uses forward prediction */`
151			`int sbp_bf_fwd; /* Static branch prediction for l.bf uses forward prediction */`
152			`int btic; /* branch prediction target insn cache analysis */`
153			`int missdelay; /* How much cycles does the miss cost */`
154			`int hitdelay; /* How much cycles does the hit cost */`
155			`} bpb;`
156
157			`struct {`
158	263	markom	`unsigned long upr; /* Unit present register */`
159			`unsigned long ver, rev; /* Version register */`
160	556	markom	`int sr; /* Supervision register */`
161	263	markom	`int superscalar; /* superscalara analysis */`
162			`int hazards; /* dependency hazards analysis */`
163	361	markom	`int dependstats; /* dependency statistics */`
164	535	markom	`int raw_range; /* raw register usage over time stats; range in cycles, 0 = disabled */`
165	263	markom	`} cpu;`
166	264	markom
167			`struct {`
168			`int debug; /* Simulator debugging */`
169	293	markom	`int verbose; /* Force verbose output */`
170	361	markom
171	264	markom	`int profile; /* Is profiler running */`
172			`char prof_fn[STR_SIZE]; /* Profiler filename */`
173	547	markom
174			`int mprofile; /* Is memory profiler running */`
175			`char mprof_fn[STR_SIZE];/* Memory profiler filename */`
176	394	markom
177			`int history; /* instruction stream history analysis */`
178	361	markom	`int exe_log; /* Print out RTL states? */`
179	294	markom	`char exe_log_fn[STR_SIZE]; /* RTL state comparison filename */`
180	624	ivang	`int spr_log; /* Print out SPR states */`
181			`char spr_log_fn[STR_SIZE]; /* SPR state log filename */`
182	433	markom	`long clkcycle_ps; /* Clock duration in ps */`
183	264	markom	`} sim;`
184	294	markom
185	269	markom	`struct {`
186			`int enabled; /* Whether is debug module enabled */`
187			`int gdb_enabled; /* Whether is debugging with gdb possible */`
188			`int server_port; /* A user specified port number for services */`
189	439	erez	`unsigned long vapi_id; /* "Fake" vapi device id for JTAG proxy */`
190	269	markom	`} debug;`
191
192	293	markom	`struct { /* Verification API, part of Advanced Core Verification */`
193	306	markom	`int enabled; /* Whether is VAPI module enabled */`
194			`int server_port; /* A user specified port number for services */`
195	355	markom	`int log_enabled; /* Whether to log the vapi requests */`
196	477	erez	`int hide_device_id; /* Whether to log device ID for each request */`
197	355	markom	`char vapi_fn[STR_SIZE]; /* vapi log filename */`
198	361	markom	`} vapi;`
199	557	markom
200			`struct {`
201			`int enabled; /* Whether power menagement is operational */`
202			`} pm;`
203	361	markom	`};`
204
205			`struct runtime {`
206			`struct {`
207			`FILE fprof; / Profiler file */`
208	547	markom	`FILE fmprof; / Memory profiler file */`
209	361	markom	`FILE fexe_log; / RTL state comparison file */`
210	624	ivang	`FILE fspr_log; / SPR state log file */`
211	361	markom	`int init; /* Whether we are still initilizing sim */`
212			`int script_file_specified;/* Whether script file was already loaded */`
213	549	markom	`char filename; / Original Command Simulator file (CZ) */`
214			`int output_cfg; /* Whether sim is to output cfg files */`
215			`char script_fn[STR_SIZE];/* Script file read */`
216	551	markom	`int iprompt; /* Interactive prompt */`
217	361	markom	`} sim;`
218	424	markom
219	479	markom	`struct {`
220			`unsigned long ifea; /* Instruction fetch effective address */`
221			`unsigned long lea; /* Load effective address */`
222			`unsigned long sea; /* Store effective address */`
223			`unsigned long ld; /* Load data */`
224			`unsigned long sd; /* Store data */`
225			`unsigned long lsea; /* Load/Store effective address */`
226			`} cpu;`
227
228	551	markom	`struct {`
229			`int random_seed; /* Initialize the memory with random values, starting with seed */`
230			`} memory;`
231
232	361	markom	`struct { /* Verification API, part of Advanced Core Verification */`
233	551	markom	`int enabled; /* Whether is VAPI module enabled */`
234	355	markom	`FILE vapi_file; / vapi file */`
235	551	markom	`int server_port; /* A user specified port number for services */`
236	293	markom	`} vapi;`
237	7	jrydberg	`};`
238	239	markom
239	551	markom	`#if FAST_SIM`
240			`#include "fast_config.c"`
241	557	markom	`#define IFF(x) if (x)`
242	551	markom	`#else`
243	7	jrydberg	`extern struct config config;`
244	557	markom	`#define IFF(x) if (1)`
245	551	markom	`#endif`
246
247	361	markom	`extern struct runtime runtime;`
248	239	markom
249			`/* Read environment from a script file. Does not fail - assumes defaukt configuration instead. */`
250			`void read_script_file (char *filename);`
251	361	markom
252			`/* Executes set sim command. Returns nonzero if error. */`
253			`void set_config_command (char *s);`
254	428	markom
255	549	markom	`/* Outputs C structure of current config to file */`
256			`void output_cfg (FILE *f);`
257
258	428	markom	`#endif`

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