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[/] [or1k/] [tags/] [nog_patch_52/] [or1ksim/] [tick/] [tick.c] - Blame information for rev 1765

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1 91 lampret
/* tick.c -- Simulation of OpenRISC 1000 tick timer
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   Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
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This file is part of OpenRISC 1000 Architectural Simulator.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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/* This is functional simulation of OpenRISC 1000 architectural
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   tick timer.
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*/
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#include <stdlib.h>
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#include <stdio.h>
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#include <string.h>
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28 1350 nogj
#include "config.h"
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#ifdef HAVE_INTTYPES_H
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#include <inttypes.h>
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#endif
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#include "port.h"
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#include "arch.h"
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#include "abstract.h"
37 561 simons
#include "except.h"
38 91 lampret
#include "tick.h"
39 728 markom
#include "spr_defs.h"
40 102 lampret
#include "pic.h"
41 189 chris
#include "sprs.h"
42 333 markom
#include "sim-config.h"
43 728 markom
#include "sched.h"
44 1408 nogj
#include "debug.h"
45 91 lampret
 
46 1408 nogj
DEFAULT_DEBUG_CHANNEL(tick);
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48 728 markom
/* When did the timer start to count */
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int cycles_start = 0;
50 133 markom
 
51 728 markom
/* TT Count Register */
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unsigned long ttcr;
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/* TT Mode Register */
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unsigned long ttmr;
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57 91 lampret
/* Reset. It initializes TTCR register. */
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void tick_reset()
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{
60 728 markom
  if (config.sim.verbose)
61 997 markom
    PRINTF("Resetting Tick Timer.\n");
62 728 markom
  mtspr(SPR_TTCR, 0);
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  mtspr(SPR_TTMR, 0);
64 91 lampret
}
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66 728 markom
/* Job handler for tick timer */
67 1365 nogj
void tick_job (void *param)
68 91 lampret
{
69 728 markom
  int mode = (ttmr & SPR_TTMR_M) >> 30;
70 1408 nogj
  TRACE("tick_job param: %i, mode: %i at %lli (%lli)\n", (int)param, mode,
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        runtime.sim.cycles, runtime.cpu.instructions);
72 728 markom
  switch (mode) {
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  case 1:
74 802 simons
    if (!param) {
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      sprs[SPR_TTCR] = ttcr = 0;
76 884 markom
      cycles_start = runtime.sim.cycles - ttcr;
77 1408 nogj
      TRACE("Scheduleing timer job for %li\n", (ttmr & SPR_TTMR_PERIOD) - ttcr);
78 1390 nogj
      SCHED_ADD(tick_job, (void *)0, (ttmr & SPR_TTMR_PERIOD) - ttcr);
79 802 simons
    }
80 728 markom
  case 2:
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    if (ttmr & SPR_TTMR_IE) {
82 133 markom
      setsprbits(SPR_TTMR, SPR_TTMR_IP, 1);
83 1319 phoenix
      /* be sure not to issue timer exception if an exception occured before it */
84 1386 nogj
      if ((mfspr(SPR_SR) & SPR_SR_TEE) == SPR_SR_TEE)
85 728 markom
        except_handle(EXCEPT_TICK, mfspr(SPR_EEAR_BASE));
86 802 simons
      else
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        /* If TEE is currently not set we have to pend tick exception
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           by rescheduling. */
89 1390 nogj
        SCHED_ADD(tick_job, (void *)1, 1);
90 728 markom
    }
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    break;
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  }
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}
94 189 chris
 
95 728 markom
/* Starts the tick timer.  This function is called by a write to ttcr spr register */
96 1410 nogj
void spr_write_ttcr (uorreg_t value)
97 728 markom
{
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  unsigned mode = (ttmr & SPR_TTMR_M) >> 30;
99 1408 nogj
  TRACE("set ttcr = %"PRIxREG"\n", value);
100 728 markom
  ttcr = value;
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  /* Remove previous if it exists */
102 1408 nogj
  TRACE("Removeing scheduled jobs\n");
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  SCHED_FIND_REMOVE(tick_job, (void *)0);
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  SCHED_FIND_REMOVE(tick_job, (void *)1);
105 728 markom
  if (mode == 1 || mode == 2) {
106 1408 nogj
    TRACE("Scheduleing timer job for %li\n", (ttmr & SPR_TTMR_PERIOD) - ttcr);
107 1390 nogj
    SCHED_ADD(tick_job, (void *)0, (ttmr & SPR_TTMR_PERIOD) - ttcr);
108 884 markom
    cycles_start = runtime.sim.cycles - ttcr;
109 133 markom
  }
110 728 markom
}
111 611 simons
 
112 1410 nogj
void spr_write_ttmr (uorreg_t value)
113 728 markom
{
114 1408 nogj
  TRACE("set ttmr = %"PRIxREG"\n", value);
115 728 markom
  ttmr = value;
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  /* Handle the modes properly. */
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  switch((ttmr & SPR_TTMR_M) >> 30) {
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    case 0:    /* Timer is disabled */
119 1408 nogj
      TRACE("Removeing scheduled jobs\n");
120 1365 nogj
      SCHED_FIND_REMOVE(tick_job, (void *)0);
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      SCHED_FIND_REMOVE(tick_job, (void *)1);
122 728 markom
      break;
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    case 1:    /* Timer should auto restart */
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      sprs[SPR_TTCR] = ttcr = 0;
125 884 markom
      cycles_start = runtime.sim.cycles;
126 1408 nogj
      TRACE("Removeing scheduled jobs\n");
127 1365 nogj
      SCHED_FIND_REMOVE(tick_job, (void *)0);
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      SCHED_FIND_REMOVE(tick_job, (void *)1);
129 1408 nogj
      TRACE("Scheduleing timer job for %li\n", (ttmr & SPR_TTMR_PERIOD) - ttcr);
130 1390 nogj
      SCHED_ADD(tick_job, (void *)0, (ttmr & SPR_TTMR_PERIOD) - ttcr);
131 728 markom
      break;
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    case 2:    /* Stop the timer when match */
133 1408 nogj
      TRACE("Removeing scheduled jobs\n");
134 1365 nogj
      SCHED_FIND_REMOVE(tick_job, (void *)0);
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      SCHED_FIND_REMOVE(tick_job, (void *)1);
136 728 markom
      break;
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    case 3:    /* Timer keeps running -- do nothing*/
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      break;
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  }
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}
141 611 simons
 
142 1410 nogj
uorreg_t spr_read_ttcr (void)
143 728 markom
{
144 1408 nogj
  TRACE("read ttcr %lli\n", runtime.sim.cycles - cycles_start);
145 884 markom
  return runtime.sim.cycles - cycles_start;
146 91 lampret
}

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