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/* config.c -- Simulator configuration

   Copyright (C) 1999 Damjan Lampret, lampret@opencores.org

This file is part of OpenRISC 1000 Architectural Simulator.

This program is free software; you can redistribute it and/or modify

it under the terms of the GNU General Public License as published by

the Free Software Foundation; either version 2 of the License, or

(at your option) any later version.

This program is distributed in the hope that it will be useful,

but WITHOUT ANY WARRANTY; without even the implied warranty of

MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

GNU General Public License for more details.

You should have received a copy of the GNU General Public License

along with this program; if not, write to the Free Software

Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */

/* Simulator configuration. Eventually this one will be a lot bigger. */

#include "sim-config.h"

#include "abstract.h"

struct config config;

void init_defconfig()

{

        printf("Machine initialization...\n");

        memset(&config, 0, sizeof(config));

        config.dc.tagtype = VIRTUAL;

        printf("Data cache tag: %s\n", config.dc.tagtype == VIRTUAL ? "virtual" : "physical");

        config.clkcycle_ns = 4; /* 4 for 4ns (250MHz) */

        printf("Clock cycle: %d ns\n", config.clkcycle_ns);

        config.uarts[0].rxfile = "/tmp/uart0.rx";

        config.uarts[0].txfile = "/tmp/uart0.tx";

        config.uarts[0].baseaddr = 0x80000000;

        config.ram.startaddr = MEMORY_START;

        config.ram.endaddr = MEMORY_START + MEMORY_LEN;

        printf("RAM: 0x%x to ", config.ram.startaddr);

        printf("0x%x (", config.ram.endaddr);

        printf("%d KB)\n\n", (config.ram.endaddr - config.ram.startaddr) / 1024);

        config.simdebug = 0;

        printf("simdebug off\n");

}