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[/] [or1k/] [tags/] [nog_patch_61/] [or1ksim/] [sim-config.h] - Blame information for rev 212

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1 7 jrydberg
/* config.h -- Simulator configuration header file
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   Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
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   This file is part of OpenRISC 1000 Architectural Simulator.
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   This program is free software; you can redistribute it and/or modify
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   it under the terms of the GNU General Public License as published by
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   the Free Software Foundation; either version 2 of the License, or
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   (at your option) any later version.
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   This program is distributed in the hope that it will be useful,
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   but WITHOUT ANY WARRANTY; without even the implied warranty of
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   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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   GNU General Public License for more details.
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   You should have received a copy of the GNU General Public License
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   along with this program; if not, write to the Free Software
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   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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20 173 markom
#include <stdio.h>
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22 7 jrydberg
/* Simulator configuration macros. Eventually this one will be a lot bigger. */
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24 212 erez
#define NR_UARTS        4       /* Number of UARTs simulated */
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#define NR_DMAS         1       /* Number of DMA controllers */
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#define NONE            0
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#define VIRTUAL         1
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#define PHYSICAL        2
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30 123 markom
typedef struct MemoryBlock {
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  int address;
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  char* file;
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  struct MemoryBlock* next;
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} MemoryBlock;
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struct config {
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        struct {
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                int tagtype;
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        } dc;
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        struct {
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                int tagtype;
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        } ic;
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        struct {
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                int bpb_sim;
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                int btic_sim;
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        } bp;                   /* Branch prediction */
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        int clkcycle_ns;        /* Clock cycle in nanoseconds */
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        struct {
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                char *rxfile;   /* File for RX */
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                char *txfile;   /* File for TX (required) */
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                int jitter;     /* CZ 250801 - in msecs...time to block */
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                unsigned long baseaddr; /* Naturally aligned base address */
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        } uarts[NR_UARTS];
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        struct {
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                unsigned long baseaddr;
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        } dmas[NR_DMAS];
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        struct {
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                unsigned long startaddr;
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                unsigned long endaddr;
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        } ram;
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        int simdebug;   /* Simulator debugging */
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        int profile;    /* Is profiler running */
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        FILE *fprof;    /* profiler file */
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        int iprompt;    /* Interactive prompt */
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        int dependstats;/* Calculation of dependency statistics */
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        int dependency; /* Calculation of dependency (implied by dependstats) */
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        int history;    /* Instruction stream history remembered by the simulator */
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        int superscalar;/* "Superscalar" simulation */
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        int slp;
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        int inhibit_server; /* Don't start up the JTAG proxy server */
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        int server_port; /* A user specified port number for services */
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        int pattern_mem; /* A user specified memory initialization pattern */
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        int random_mem;  /* Initialize the memory with random values */
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        MemoryBlock* memory; /* New style memory initializer file (CZ) */
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        char* filename;  /* Original Command Simulator file (CZ) */
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};
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extern struct config config;

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