Subversion Repositories or1k

/* config.h -- Simulator configuration header file

   Copyright (C) 1999 Damjan Lampret, lampret@opencores.org

   This file is part of OpenRISC 1000 Architectural Simulator.

   This program is free software; you can redistribute it and/or modify

   it under the terms of the GNU General Public License as published by

   the Free Software Foundation; either version 2 of the License, or

   (at your option) any later version.

   This program is distributed in the hope that it will be useful,

   but WITHOUT ANY WARRANTY; without even the implied warranty of

   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License

   along with this program; if not, write to the Free Software

   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */

#include <stdio.h>

/* Simulator configuration macros. Eventually this one will be a lot bigger. */

#define NR_UARTS        4       /* Number of UARTs simulated */   

#define NR_DMAS         1       /* Number of DMA controllers */

#define NR_ETHERNETS    2       /* Number of Ethernet MACs   */

#define NONE            0

#define VIRTUAL         1

#define PHYSICAL        2

#define STR_SIZE        (256)

struct config {

  struct {

    int tagtype;

  } dc;

  struct {

    int tagtype;

  } ic;

  struct {

    int bpb_sim;

    int btic_sim;

  } bp;     /* Branch prediction */

  int clkcycle_ns;  /* Clock cycle in nanoseconds */

  int nuarts;

  int uarts_enabled;

  struct {

    char rxfile[STR_SIZE]; /* File for RX */

    char txfile[STR_SIZE]; /* File for TX (required) */

    int jitter;     /* CZ 250801 - in msecs...time to block */

    unsigned long baseaddr; /* Naturally aligned base address */

  } uarts[NR_UARTS];

  int ndmas;

  int dmas_enabled;

  struct {

    unsigned long baseaddr;

    unsigned irq;

  } dmas[NR_DMAS];

        struct {

                unsigned long baseaddr;

                unsigned dma; /* Which controller is this ethernet "connected" to */

                unsigned tx_channel; /* DMA channel used for TX */

                unsigned rx_channel; /* DMA channel used for RX */

                char *rxfile;

                char *txfile;

        } ethernets[NR_ETHERNETS];

  struct {

    int enabled;                      /* is MC enabled? */

    unsigned long baseaddr;           /* Naturally aligned base address */

    unsigned POC;                     /* power on reset configuration register */

  } mc;

  struct {

    char memory_table_file[STR_SIZE]; /* Memory table filename */

    int pattern;            /* A user specified memory initialization pattern */

    int random_seed;        /* Initialize the memory with random values, starting with seed */

    enum {

      MT_PATTERN,

      MT_RANDOM

    } type;

  } memory;

  int simdebug; /* Simulator debugging */

  int profile;    /* Is profiler running */

  FILE *fprof;    /* profiler file */

  int iprompt;  /* Interactive prompt */

  int dependstats;/* Calculation of dependency statistics */

  int dependency; /* Calculation of dependency (implied by dependstats) */

  int history;  /* Instruction stream history remembered by the simulator */

  int superscalar;/* "Superscalar" simulation */

  int slp;

  int inhibit_server; /* Don't start up the JTAG proxy server */

  int server_port; /* A user specified port number for services */

  char* filename;  /* Original Command Simulator file (CZ) */

};

extern struct config config;

/* Read environment from a script file. Does not fail - assumes defaukt configuration instead. */

void read_script_file (char *filename);