OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_62/] [insight/] [opcodes/] [or32.c] - Blame information for rev 1765

Details | Compare with Previous | View Log

Line No. Rev Author Line
1 133 markom 
/* Table of opcodes for the OpenRISC 1000 ISA.
2 
   Copyright 1990, 1991, 1992, 1993 Free Software Foundation, Inc.
3 
   Contributed by Damjan Lampret (lampret@opencores.org).
4 
 
5 717 markom 
This file is part of gen_or1k_isa, or1ksim, GDB and GAS.
6 133 markom 
 
7 
This program is free software; you can redistribute it and/or modify
8 
it under the terms of the GNU General Public License as published by
9 
the Free Software Foundation; either version 2 of the License, or
10 
(at your option) any later version.
11 
 
12 
This program is distributed in the hope that it will be useful,
13 
but WITHOUT ANY WARRANTY; without even the implied warranty of
14 
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15 
GNU General Public License for more details.
16 
 
17 
You should have received a copy of the GNU General Public License
18 
along with this program; if not, write to the Free Software
19 
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
20 
 
21 1114 lampret 
/*
22 
 * $Log: not supported by cvs2svn $
23 1440 nogj 
 * Revision 1.42  2005/03/16 12:25:56  nogj
24 
 * Fix the parameters to the l.ff1/l.maci instructions
25 
 *
26 1384 nogj 
 * Revision 1.41  2005/02/09 17:41:03  nogj
27 
 * Mark a simulated cpu address as such, by introducing the new oraddr_t type
28 
 *
29 1350 nogj 
 * Revision 1.40  2005/01/27 14:14:13  nogj
30 
 * Remove the global op structure
31 
 *
32 1346 nogj 
 * Revision 1.39  2005/01/27 13:35:40  nogj
33 
 *  * Fix generate.c to produce a execgen.c with less warnings.
34 
 *  * Fix the --enable-simple configure option.
35 
 *
36 1342 nogj 
 * Revision 1.38  2005/01/27 13:15:50  nogj
37 
 * Mark wich operand is the destination operand in the architechture definition
38 
 *
39 1341 nogj 
 * Revision 1.37  2005/01/11 15:41:58  andreje
40 
 * l.ff1 instruction added
41 
 *
42 1338 andreje 
 * Revision 1.36  2004/07/22 20:17:23  phoenix
43 
 * removed includes
44 
 *
45 1309 phoenix 
 * Revision 1.35  2004/07/19 23:07:37  phoenix
46 
 * Gyorgy Jeney: extensive cleanup
47 
 *
48 1308 phoenix 
 * Revision 1.34  2004/06/27 22:56:48  lampret
49 
 * Updated instruction set descriptions. Changed FP instructions encoding.
50 
 *
51 1295 lampret 
 * Revision 1.33  2004/05/09 19:52:31  lampret
52 
 * Changed desciption of the l.cust5 insns
53 
 *
54 1285 lampret 
 * Revision 1.31  2003/07/01 19:34:49  csanchez
55 
 * Added support for l.addc instruction.
56 
 *
57 1169 csanchez 
 * Revision 1.30  2003/01/28 03:49:24  lampret
58 
 * Added cvs log keywords
59 
 *
60 1114 lampret 
 */
61 
 
62 133 markom 
#include <string.h>
63 
#include <stdio.h>
64 
#include <stdlib.h>
65 371 markom 
#include <ctype.h>
66 133 markom 
 
67 371 markom 
 
68 138 markom 
#ifdef HAVE_CONFIG_H
69 
# include "config.h"
70 
#endif
71 1342 nogj 
#ifdef HAS_EXECUTION
72 1350 nogj 
# ifdef HAVE_INTTYPES_H
73 
#  include <inttypes.h> /* ...but to get arch.h we need uint{8,16,32}_t... */
74 
# endif
75 
# include "port.h"
76 
# include "arch.h" /* ...but to get abstract.h, we need oraddr_t... */
77 
# include "abstract.h" /* To get struct iqueue_entry... */
78 1342 nogj 
#endif
79 133 markom 
#include "opcode/or32.h"
80 
 
81 
/* **INDENT-OFF** */
82 
 
83 1342 nogj 
/* We treat all letters the same in encode/decode routines so
84 
   we need to assign some characteristics to them like signess etc.*/
85 133 markom 
CONST struct or32_letter or32_letters[] =
86 
{
87 
{ 'A', NUM_UNSIGNED },
88 
{ 'B', NUM_UNSIGNED },
89 
{ 'D', NUM_UNSIGNED },
90 
{ 'I', NUM_SIGNED },
91 
{ 'K', NUM_UNSIGNED },
92 
{ 'L', NUM_UNSIGNED },
93 
{ 'N', NUM_SIGNED },
94 
{ '0', NUM_UNSIGNED },
95 
{ '\0', 0 }     /* dummy entry */
96 
};
97 
 
98 
/* Opcode encoding:
99 
   machine[31:30]: first two bits of opcode
100 
                   00 - neither of source operands is GPR
101 
                   01 - second source operand is GPR (rB)
102 
                   10 - first source operand is GPR (rA)
103 
                   11 - both source operands are GPRs (rA and rB)
104 
   machine[29:26]: next four bits of opcode
105 
   machine[25:00]: instruction operands (specific to individual instruction)
106 
 
107 
  Recommendation: irrelevant instruction bits should be set with a value of
108 
  bits in same positions of instruction preceding current instruction in the
109 
  code (when assembling).
110 
*/
111 
 
112 1341 nogj 
#ifdef HAS_EXECUTION
113 
# if SIMPLE_EXECUTION
114 
#  define EFN &l_none
115 
#  define EF(func) &(func)
116 
#  define EFI &l_invalid
117 
# else /* SIMPLE_EXECUTION */
118 
#  define EFN "l_none"
119 
#  define EFI "l_invalid"
120 
#  ifdef __GNUC__
121 
#   define EF(func) #func
122 
#  else
123 
#   define EF(func) "func"
124 
#  endif
125 
# endif /* SIMPLE_EXECUTION */
126 
#else /* HAS_EXECUTION */
127 
# define EFN &l_none
128 
# define EF(func) EFN
129 
# define EFI EFN
130 133 markom 
#endif /* HAS_EXECUTION */
131 
 
132 
CONST struct or32_opcode or32_opcodes[] =
133 
{
134 
 
135 1346 nogj 
{ "l.j",       "N",            "00 0x0  NNNNN NNNNN NNNN NNNN NNNN NNNN",
136 
  EF(l_j), OR32_IF_DELAY, it_jump },
137 
{ "l.jal",     "N",            "00 0x1  NNNNN NNNNN NNNN NNNN NNNN NNNN",
138 
  EF(l_jal), OR32_IF_DELAY, it_jump },
139 
{ "l.bnf",     "N",            "00 0x3  NNNNN NNNNN NNNN NNNN NNNN NNNN",
140 
  EF(l_bnf), OR32_IF_DELAY | OR32_R_FLAG, it_branch },
141 
{ "l.bf",      "N",            "00 0x4  NNNNN NNNNN NNNN NNNN NNNN NNNN",
142 
  EF(l_bf), OR32_IF_DELAY | OR32_R_FLAG, it_branch },
143 
{ "l.nop",     "K",            "00 0x5  01--- ----- KKKK KKKK KKKK KKKK",
144 
  EF(l_nop), 0, it_nop },
145 
{ "l.movhi",   "rD,K",         "00 0x6  DDDDD ----0 KKKK KKKK KKKK KKKK",
146 
  EF(l_movhi), 0, it_movimm },
147 
{ "l.macrc",   "rD",           "00 0x6  DDDDD ----1 0000 0000 0000 0000",
148 
  EF(l_macrc), 0, it_mac },
149 
{ "l.sys",     "K",            "00 0x8  00000 00000 KKKK KKKK KKKK KKKK",
150 1440 nogj 
  EF(l_sys), 0, it_exception },
151 1346 nogj 
{ "l.trap",    "K",            "00 0x8  01000 00000 KKKK KKKK KKKK KKKK",
152 1440 nogj 
  EF(l_trap), 0, it_exception },
153 1346 nogj 
{ "l.msync",   "",             "00 0x8  10000 00000 0000 0000 0000 0000", EFN,
154 
  0, it_unknown },
155 
{ "l.psync",   "",             "00 0x8  10100 00000 0000 0000 0000 0000", EFN,
156 
  0, it_unknown },
157 
{ "l.csync",   "",             "00 0x8  11000 00000 0000 0000 0000 0000", EFN,
158 
  0, it_unknown },
159 
{ "l.rfe",     "",             "00 0x9  ----- ----- ---- ---- ---- ----",
160 
  EF(l_rfe), OR32_IF_DELAY, it_exception },
161 
{ "lv.all_eq.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x0", EFI, 0,
162 
  it_unknown },
163 
{ "lv.all_eq.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x1", EFI, 0,
164 
  it_unknown },
165 
{ "lv.all_ge.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x2", EFI, 0,
166 
  it_unknown },
167 
{ "lv.all_ge.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x3", EFI, 0,
168 
  it_unknown },
169 
{ "lv.all_gt.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x4", EFI, 0,
170 
  it_unknown },
171 
{ "lv.all_gt.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x5", EFI, 0,
172 
  it_unknown },
173 
{ "lv.all_le.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x6", EFI, 0,
174 
  it_unknown },
175 
{ "lv.all_le.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x7", EFI, 0,
176 
  it_unknown },
177 
{ "lv.all_lt.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x8", EFI, 0,
178 
  it_unknown },
179 
{ "lv.all_lt.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x9", EFI, 0,
180 
  it_unknown },
181 
{ "lv.all_ne.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0xA", EFI, 0,
182 
  it_unknown },
183 
{ "lv.all_ne.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0xB", EFI, 0,
184 
  it_unknown },
185 
{ "lv.any_eq.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x0", EFI, 0,
186 
  it_unknown },
187 
{ "lv.any_eq.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x1", EFI, 0,
188 
  it_unknown },
189 
{ "lv.any_ge.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x2", EFI, 0,
190 
  it_unknown },
191 
{ "lv.any_ge.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x3", EFI, 0,
192 
  it_unknown },
193 
{ "lv.any_gt.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x4", EFI, 0,
194 
  it_unknown },
195 
{ "lv.any_gt.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x5", EFI, 0,
196 
  it_unknown },
197 
{ "lv.any_le.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x6", EFI, 0,
198 
  it_unknown },
199 
{ "lv.any_le.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x7", EFI, 0,
200 
  it_unknown },
201 
{ "lv.any_lt.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x8", EFI, 0,
202 
  it_unknown },
203 
{ "lv.any_lt.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x9", EFI, 0,
204 
  it_unknown },
205 
{ "lv.any_ne.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0xA", EFI, 0,
206 
  it_unknown },
207 
{ "lv.any_ne.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0xB", EFI, 0,
208 
  it_unknown },
209 
{ "lv.add.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x0", EFI, 0,
210 
  it_unknown },
211 
{ "lv.add.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x1", EFI, 0,
212 
  it_unknown },
213 
{ "lv.adds.b", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x2", EFI, 0,
214 
  it_unknown },
215 
{ "lv.adds.h", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x3", EFI, 0,
216 
  it_unknown },
217 
{ "lv.addu.b", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x4", EFI, 0,
218 
  it_unknown },
219 
{ "lv.addu.h", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x5", EFI, 0,
220 
  it_unknown },
221 
{ "lv.addus.b","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x6", EFI, 0,
222 
  it_unknown },
223 
{ "lv.addus.h","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x7", EFI, 0,
224 
  it_unknown },
225 
{ "lv.and",    "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x8", EFI, 0,
226 
  it_unknown },
227 
{ "lv.avg.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x9", EFI, 0,
228 
  it_unknown },
229 
{ "lv.avg.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0xA", EFI, 0,
230 
  it_unknown },
231 
{ "lv.cmp_eq.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x0", EFI, 0,
232 
  it_unknown },
233 
{ "lv.cmp_eq.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x1", EFI, 0,
234 
  it_unknown },
235 
{ "lv.cmp_ge.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x2", EFI, 0,
236 
  it_unknown },
237 
{ "lv.cmp_ge.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x3", EFI, 0,
238 
  it_unknown },
239 
{ "lv.cmp_gt.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x4", EFI, 0,
240 
  it_unknown },
241 
{ "lv.cmp_gt.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x5", EFI, 0,
242 
  it_unknown },
243 
{ "lv.cmp_le.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x6", EFI, 0,
244 
  it_unknown },
245 
{ "lv.cmp_le.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x7", EFI, 0,
246 
  it_unknown },
247 
{ "lv.cmp_lt.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x8", EFI, 0,
248 
  it_unknown },
249 
{ "lv.cmp_lt.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x9", EFI, 0,
250 
  it_unknown },
251 
{ "lv.cmp_ne.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0xA", EFI, 0,
252 
  it_unknown },
253 
{ "lv.cmp_ne.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0xB", EFI, 0,
254 
  it_unknown },
255 
{ "lv.madds.h","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0x4", EFI, 0,
256 
  it_unknown },
257 
{ "lv.max.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0x5", EFI, 0,
258 
  it_unknown },
259 
{ "lv.max.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0x6", EFI, 0,
260 
  it_unknown },
261 
{ "lv.merge.b","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0x7", EFI, 0,
262 
  it_unknown },
263 
{ "lv.merge.h","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0x8", EFI, 0,
264 
  it_unknown },
265 
{ "lv.min.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0x9", EFI, 0,
266 
  it_unknown },
267 
{ "lv.min.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0xA", EFI, 0,
268 
  it_unknown },
269 
{ "lv.msubs.h","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0xB", EFI, 0,
270 
  it_unknown },
271 
{ "lv.muls.h", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0xC", EFI, 0,
272 
  it_unknown },
273 
{ "lv.nand",   "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0xD", EFI, 0,
274 
  it_unknown },
275 
{ "lv.nor",    "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0xE", EFI, 0,
276 
  it_unknown },
277 
{ "lv.or",     "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0xF", EFI, 0,
278 
  it_unknown },
279 
{ "lv.pack.b", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x0", EFI, 0,
280 
  it_unknown },
281 
{ "lv.pack.h", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x1", EFI, 0,
282 
  it_unknown },
283 
{ "lv.packs.b","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x2", EFI, 0,
284 
  it_unknown },
285 
{ "lv.packs.h","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x3", EFI, 0,
286 
  it_unknown },
287 
{ "lv.packus.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x4", EFI, 0,
288 
  it_unknown },
289 
{ "lv.packus.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x5", EFI, 0,
290 
  it_unknown },
291 
{ "lv.perm.n", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x6", EFI, 0,
292 
  it_unknown },
293 
{ "lv.rl.b",   "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x7", EFI, 0,
294 
  it_unknown },
295 
{ "lv.rl.h",   "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x8", EFI, 0,
296 
  it_unknown },
297 
{ "lv.sll.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x9", EFI, 0,
298 
  it_unknown },
299 
{ "lv.sll.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0xA", EFI, 0,
300 
  it_unknown },
301 
{ "lv.sll",    "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0xB", EFI, 0,
302 
  it_unknown },
303 
{ "lv.srl.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0xC", EFI, 0,
304 
  it_unknown },
305 
{ "lv.srl.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0xD", EFI, 0,
306 
  it_unknown },
307 
{ "lv.sra.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0xE", EFI, 0,
308 
  it_unknown },
309 
{ "lv.sra.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0xF", EFI, 0,
310 
  it_unknown },
311 
{ "lv.srl",    "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x0", EFI, 0,
312 
  it_unknown },
313 
{ "lv.sub.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x1", EFI, 0,
314 
  it_unknown },
315 
{ "lv.sub.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x2", EFI, 0,
316 
  it_unknown },
317 
{ "lv.subs.b", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x3", EFI, 0,
318 
  it_unknown },
319 
{ "lv.subs.h", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x4", EFI, 0,
320 
  it_unknown },
321 
{ "lv.subu.b", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x5", EFI, 0,
322 
  it_unknown },
323 
{ "lv.subu.h", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x6", EFI, 0,
324 
  it_unknown },
325 
{ "lv.subus.b","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x7", EFI, 0,
326 
  it_unknown },
327 
{ "lv.subus.h","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x8", EFI, 0,
328 
  it_unknown },
329 
{ "lv.unpack.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x9", EFI, 0,
330 
  it_unknown },
331 
{ "lv.unpack.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0xA", EFI, 0,
332 
  it_unknown },
333 
{ "lv.xor",    "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0xB", EFI, 0,
334 
  it_unknown },
335 
{ "lv.cust1",  "",             "00 0xA  ----- ----- ---- ---- 0xC ----", EFI, 0,
336 
  it_unknown },
337 
{ "lv.cust2",  "",             "00 0xA  ----- ----- ---- ---- 0xD ----", EFI, 0,
338 
  it_unknown },
339 
{ "lv.cust3",  "",             "00 0xA  ----- ----- ---- ---- 0xE ----", EFI, 0,
340 
  it_unknown },
341 
{ "lv.cust4",  "",             "00 0xA  ----- ----- ---- ---- 0xF ----", EFI, 0,
342 
  it_unknown },
343 676 markom 
 
344 1346 nogj 
{ "l.jr",      "rB",           "01 0x1  ----- ----- BBBB B--- ---- ----",
345 
  EF(l_jr), OR32_IF_DELAY, it_jump },
346 
{ "l.jalr",    "rB",           "01 0x2  ----- ----- BBBB B--- ---- ----",
347 
  EF(l_jalr), OR32_IF_DELAY, it_jump },
348 1384 nogj 
{ "l.maci",    "rA,I",         "01 0x3  IIIII ----- AAAA AIII IIII IIII",
349 1346 nogj 
  EF(l_mac), 0, it_mac },
350 
{ "l.cust1",   "",             "01 0xC  ----- ----- ---- ---- ---- ----",
351 
  EF(l_cust1), 0, it_unknown },
352 
{ "l.cust2",   "",             "01 0xD  ----- ----- ---- ---- ---- ----",
353 
  EF(l_cust2), 0, it_unknown },
354 
{ "l.cust3",   "",             "01 0xE  ----- ----- ---- ---- ---- ----",
355 
  EF(l_cust3), 0, it_unknown },
356 
{ "l.cust4",   "",             "01 0xF  ----- ----- ---- ---- ---- ----",
357 
  EF(l_cust4), 0, it_unknown },
358 133 markom 
 
359 1346 nogj 
{ "l.ld",      "rD,I(rA)",     "10 0x0  DDDDD AAAAA IIII IIII IIII IIII", EFI,
360 
  0, it_load },
361 
{ "l.lwz",     "rD,I(rA)",     "10 0x1  DDDDD AAAAA IIII IIII IIII IIII",
362 
  EF(l_lwz), 0, it_load },
363 
{ "l.lws",     "rD,I(rA)",     "10 0x2  DDDDD AAAAA IIII IIII IIII IIII", EFI,
364 
  0, it_load },
365 
{ "l.lbz",     "rD,I(rA)",     "10 0x3  DDDDD AAAAA IIII IIII IIII IIII",
366 
  EF(l_lbz), 0, it_load },
367 
{ "l.lbs",     "rD,I(rA)",     "10 0x4  DDDDD AAAAA IIII IIII IIII IIII",
368 
  EF(l_lbs), 0, it_load },
369 
{ "l.lhz",     "rD,I(rA)",     "10 0x5  DDDDD AAAAA IIII IIII IIII IIII",
370 
  EF(l_lhz), 0, it_load },
371 
{ "l.lhs",     "rD,I(rA)",     "10 0x6  DDDDD AAAAA IIII IIII IIII IIII",
372 
  EF(l_lhs), 0, it_load },
373 133 markom 
 
374 1346 nogj 
{ "l.addi",    "rD,rA,I",      "10 0x7  DDDDD AAAAA IIII IIII IIII IIII",
375 
  EF(l_add), OR32_W_FLAG, it_arith },
376 
{ "l.addic",   "rD,rA,I",      "10 0x8  DDDDD AAAAA IIII IIII IIII IIII", EFI,
377 
  0, it_arith },
378 
{ "l.andi",    "rD,rA,K",      "10 0x9  DDDDD AAAAA KKKK KKKK KKKK KKKK",
379 
  EF(l_and), OR32_W_FLAG, it_arith },
380 
{ "l.ori",     "rD,rA,K",      "10 0xA  DDDDD AAAAA KKKK KKKK KKKK KKKK",
381 
  EF(l_or), 0, it_arith },
382 
{ "l.xori",    "rD,rA,I",      "10 0xB  DDDDD AAAAA IIII IIII IIII IIII",
383 
  EF(l_xor), 0, it_arith },
384 
{ "l.muli",    "rD,rA,I",      "10 0xC  DDDDD AAAAA IIII IIII IIII IIII",
385 
  EF(l_mul), 0, it_arith },
386 
{ "l.mfspr",   "rD,rA,K",      "10 0xD  DDDDD AAAAA KKKK KKKK KKKK KKKK",
387 
  EF(l_mfspr), 0, it_move },
388 
{ "l.slli",    "rD,rA,L",      "10 0xE  DDDDD AAAAA ---- ---- 00LL LLLL",
389 
  EF(l_sll), 0, it_shift },
390 
{ "l.srli",    "rD,rA,L",      "10 0xE  DDDDD AAAAA ---- ---- 01LL LLLL",
391 
  EF(l_srl), 0, it_shift },
392 
{ "l.srai",    "rD,rA,L",      "10 0xE  DDDDD AAAAA ---- ---- 10LL LLLL",
393 
  EF(l_sra), 0, it_shift },
394 
{ "l.rori",    "rD,rA,L",      "10 0xE  DDDDD AAAAA ---- ---- 11LL LLLL", EFI,
395 
  0, it_shift },
396 133 markom 
 
397 1346 nogj 
{ "l.sfeqi",   "rA,I",         "10 0xF  00000 AAAAA IIII IIII IIII IIII",
398 
  EF(l_sfeq), OR32_W_FLAG, it_compare },
399 
{ "l.sfnei",   "rA,I",         "10 0xF  00001 AAAAA IIII IIII IIII IIII",
400 
  EF(l_sfne), OR32_W_FLAG, it_compare },
401 
{ "l.sfgtui",  "rA,I",         "10 0xF  00010 AAAAA IIII IIII IIII IIII",
402 
  EF(l_sfgtu), OR32_W_FLAG, it_compare },
403 
{ "l.sfgeui",  "rA,I",         "10 0xF  00011 AAAAA IIII IIII IIII IIII",
404 
  EF(l_sfgeu), OR32_W_FLAG, it_compare },
405 
{ "l.sfltui",  "rA,I",         "10 0xF  00100 AAAAA IIII IIII IIII IIII",
406 
  EF(l_sfltu), OR32_W_FLAG, it_compare },
407 
{ "l.sfleui",  "rA,I",         "10 0xF  00101 AAAAA IIII IIII IIII IIII",
408 
  EF(l_sfleu), OR32_W_FLAG, it_compare },
409 
{ "l.sfgtsi",  "rA,I",         "10 0xF  01010 AAAAA IIII IIII IIII IIII",
410 
  EF(l_sfgts), OR32_W_FLAG, it_compare },
411 
{ "l.sfgesi",  "rA,I",         "10 0xF  01011 AAAAA IIII IIII IIII IIII",
412 
  EF(l_sfges), OR32_W_FLAG, it_compare },
413 
{ "l.sfltsi",  "rA,I",         "10 0xF  01100 AAAAA IIII IIII IIII IIII",
414 
  EF(l_sflts), OR32_W_FLAG, it_compare },
415 
{ "l.sflesi",  "rA,I",         "10 0xF  01101 AAAAA IIII IIII IIII IIII",
416 
  EF(l_sfles), OR32_W_FLAG, it_compare },
417 133 markom 
 
418 1346 nogj 
{ "l.mtspr",   "rA,rB,K",      "11 0x0  KKKKK AAAAA BBBB BKKK KKKK KKKK",
419 
  EF(l_mtspr), 0, it_move },
420 
{ "l.mac",     "rA,rB",        "11 0x1  ----- AAAAA BBBB B--- ---- 0x1",
421 
  EF(l_mac), 0, it_mac },
422 
{ "l.msb",     "rA,rB",        "11 0x1  ----- AAAAA BBBB B--- ---- 0x2",
423 
  EF(l_msb), 0, it_mac },
424 133 markom 
 
425 1346 nogj 
{ "lf.add.s",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x0 0x0",
426 
  EF(lf_add_s), 0, it_float },
427 
{ "lf.sub.s",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x0 0x1",
428 
  EF(lf_sub_s), 0, it_float },
429 
{ "lf.mul.s",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x0 0x2",
430 
  EF(lf_mul_s), 0, it_float },
431 
{ "lf.div.s",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x0 0x3",
432 
  EF(lf_div_s), 0, it_float },
433 
{ "lf.itof.s",  "rD,rA",       "11 0x2  DDDDD AAAAA 0000 0--- 0x0 0x4",
434 
  EF(lf_itof_s), 0, it_float },
435 
{ "lf.ftoi.s",  "rD,rA",       "11 0x2  DDDDD AAAAA 0000 0--- 0x0 0x5",
436 
  EF(lf_ftoi_s), 0, it_float },
437 
{ "lf.rem.s",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x0 0x6",
438 
  EF(lf_rem_s), 0, it_float },
439 
{ "lf.madd.s",  "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x0 0x7",
440 
  EF(lf_madd_s), 0, it_float },
441 
{ "lf.sfeq.s",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x0 0x8",
442 
  EF(lf_sfeq_s), 0, it_float },
443 
{ "lf.sfne.s",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x0 0x9",
444 
  EF(lf_sfne_s), 0, it_float },
445 
{ "lf.sfgt.s",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x0 0xA",
446 
  EF(lf_sfgt_s), 0, it_float },
447 
{ "lf.sfge.s",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x0 0xB",
448 
  EF(lf_sfge_s), 0, it_float },
449 
{ "lf.sflt.s",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x0 0xC",
450 
  EF(lf_sflt_s), 0, it_float },
451 
{ "lf.sfle.s",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x0 0xD",
452 
  EF(lf_sfle_s), 0, it_float },
453 
{ "lf.cust1.s", "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0xD ----", EFI,
454 
  0, it_float },
455 133 markom 
 
456 1346 nogj 
{ "lf.add.d",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x1 0x0", EFI, 0,
457 
  it_float },
458 
{ "lf.sub.d",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x1 0x1", EFI, 0,
459 
  it_float },
460 
{ "lf.mul.d",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x1 0x2", EFI, 0,
461 
  it_float },
462 
{ "lf.div.d",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x1 0x3", EFI, 0,
463 
  it_float },
464 
{ "lf.itof.d",  "rD,rA",       "11 0x2  DDDDD AAAAA 0000 0--- 0x1 0x4", EFI, 0,
465 
  it_float },
466 
{ "lf.ftoi.d",  "rD,rA",       "11 0x2  DDDDD AAAAA 0000 0--- 0x1 0x5", EFI, 0,
467 
  it_float },
468 
{ "lf.rem.d",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x1 0x6", EFI, 0,
469 
  it_float },
470 
{ "lf.madd.d",  "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x1 0x7", EFI, 0,
471 
  it_float },
472 
{ "lf.sfeq.d",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x1 0x8", EFI, 0,
473 
  it_float },
474 
{ "lf.sfne.d",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x1 0x9", EFI, 0,
475 
  it_float },
476 
{ "lf.sfgt.d",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x1 0xA", EFI, 0,
477 
  it_float },
478 
{ "lf.sfge.d",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x1 0xB", EFI, 0,
479 
  it_float },
480 
{ "lf.sflt.d",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x1 0xC", EFI, 0,
481 
  it_float },
482 
{ "lf.sfle.d",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x1 0xD", EFI, 0,
483 
  it_float },
484 
{ "lf.cust1.d", "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0xE ----", EFI, 0,
485 
  it_float },
486 676 markom 
 
487 1346 nogj 
{ "l.sd",      "I(rD),rB",     "11 0x4  IIIII DDDDD BBBB BIII IIII IIII", EFI,
488 
  0, it_store },
489 
{ "l.sw",      "I(rD),rB",     "11 0x5  IIIII DDDDD BBBB BIII IIII IIII",
490 
  EF(l_sw), 0, it_store },
491 
{ "l.sb",      "I(rD),rB",     "11 0x6  IIIII DDDDD BBBB BIII IIII IIII",
492 
  EF(l_sb), 0, it_store },
493 
{ "l.sh",      "I(rD),rB",     "11 0x7  IIIII DDDDD BBBB BIII IIII IIII",
494 
  EF(l_sh), 0, it_store },
495 1295 lampret 
 
496 1346 nogj 
{ "l.add",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0x0",
497 
  EF(l_add), OR32_W_FLAG, it_arith },
498 
{ "l.addc",    "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0x1",
499 
  EF(l_addc), OR32_W_FLAG, it_arith },
500 
{ "l.sub",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0x2",
501 
  EF(l_sub), 0, it_arith },
502 
{ "l.and",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0x3",
503 
  EF(l_and), OR32_W_FLAG, it_arith },
504 
{ "l.or",      "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0x4",
505 
  EF(l_or), 0, it_arith },
506 
{ "l.xor",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0x5",
507 
  EF(l_xor), 0, it_arith },
508 
{ "l.mul",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-11 ---- 0x6",
509 
  EF(l_mul), 0, it_arith },
510 1295 lampret 
 
511 1346 nogj 
{ "l.sll",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 00-- 0x8",
512 
  EF(l_sll), 0, it_shift },
513 
{ "l.srl",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 01-- 0x8",
514 
  EF(l_srl), 0, it_shift },
515 
{ "l.sra",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 10-- 0x8",
516 
  EF(l_sra), 0, it_shift },
517 
{ "l.ror",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 11-- 0x8", EFI,
518 
  0, it_shift },
519 
{ "l.div",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-11 ---- 0x9",
520 
  EF(l_div), 0, it_arith },
521 
{ "l.divu",    "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-11 ---- 0xA",
522 
  EF(l_divu), 0, it_arith },
523 
{ "l.mulu",    "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-11 ---- 0xB", EFI,
524 
  0, it_arith },
525 
{ "l.extbs",   "rD,rA",     "11 0x8  DDDDD AAAAA ---- --00 01-- 0xC",
526 
  EF(l_extbs), 0, it_move },
527 
{ "l.exths",   "rD,rA",     "11 0x8  DDDDD AAAAA ---- --00 00-- 0xC",
528 
  EF(l_exths), 0, it_move },
529 
{ "l.extws",   "rD,rA",     "11 0x8  DDDDD AAAAA ---- --00 00-- 0xD",
530 
  EF(l_extws), 0, it_move },
531 
{ "l.extbz",   "rD,rA",     "11 0x8  DDDDD AAAAA ---- --00 11-- 0xC",
532 
  EF(l_extbz), 0, it_move },
533 
{ "l.exthz",   "rD,rA",     "11 0x8  DDDDD AAAAA ---- --00 10-- 0xC",
534 
  EF(l_exthz), 0, it_move },
535 
{ "l.extwz",   "rD,rA",     "11 0x8  DDDDD AAAAA ---- --00 01-- 0xD",
536 
  EF(l_extwz), 0, it_move },
537 
{ "l.cmov",    "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0xE",
538 
  EF(l_cmov), OR32_R_FLAG, it_move },
539 1384 nogj 
{ "l.ff1",     "rD,rA",     "11 0x8  DDDDD AAAAA ---- --00 ---- 0xF", EFI, 0,
540 
  it_arith },
541 133 markom 
 
542 1346 nogj 
{ "l.sfeq",    "rA,rB",        "11 0x9  00000 AAAAA BBBB B--- ---- ----",
543 
  EF(l_sfeq), OR32_W_FLAG, it_compare },
544 
{ "l.sfne",    "rA,rB",        "11 0x9  00001 AAAAA BBBB B--- ---- ----",
545 
  EF(l_sfne), OR32_W_FLAG, it_compare },
546 
{ "l.sfgtu",   "rA,rB",        "11 0x9  00010 AAAAA BBBB B--- ---- ----",
547 
  EF(l_sfgtu), OR32_W_FLAG, it_compare },
548 
{ "l.sfgeu",   "rA,rB",        "11 0x9  00011 AAAAA BBBB B--- ---- ----",
549 
  EF(l_sfgeu), OR32_W_FLAG, it_compare },
550 
{ "l.sfltu",   "rA,rB",        "11 0x9  00100 AAAAA BBBB B--- ---- ----",
551 
  EF(l_sfltu), OR32_W_FLAG, it_compare },
552 
{ "l.sfleu",   "rA,rB",        "11 0x9  00101 AAAAA BBBB B--- ---- ----",
553 
  EF(l_sfleu), OR32_W_FLAG, it_compare },
554 
{ "l.sfgts",   "rA,rB",        "11 0x9  01010 AAAAA BBBB B--- ---- ----",
555 
  EF(l_sfgts), OR32_W_FLAG, it_compare },
556 
{ "l.sfges",   "rA,rB",        "11 0x9  01011 AAAAA BBBB B--- ---- ----",
557 
  EF(l_sfges), OR32_W_FLAG, it_compare },
558 
{ "l.sflts",   "rA,rB",        "11 0x9  01100 AAAAA BBBB B--- ---- ----",
559 
  EF(l_sflts), OR32_W_FLAG, it_compare },
560 
{ "l.sfles",   "rA,rB",        "11 0x9  01101 AAAAA BBBB B--- ---- ----",
561 
  EF(l_sfles), OR32_W_FLAG, it_compare },
562 676 markom 
 
563 1346 nogj 
{ "l.cust5",   "rD,rA,rB,L,K", "11 0xC  DDDDD AAAAA BBBB BLLL LLLK KKKK", EFI,
564 
  0, it_unknown },
565 
{ "l.cust6",   "",             "11 0xD  ----- ----- ---- ---- ---- ----", EFI,
566 
  0, it_unknown },
567 
{ "l.cust7",   "",             "11 0xE  ----- ----- ---- ---- ---- ----", EFI,
568 
  0, it_unknown },
569 
{ "l.cust8",   "",             "11 0xF  ----- ----- ---- ---- ---- ----", EFI,
570 
  0, it_unknown },
571 133 markom 
 
572 221 markom 
/* This section should not be defined in or1ksim, since it contains duplicates,
573 
   which would cause machine builder to complain.  */
574 374 simons 
#ifdef HAS_CUST
575 1346 nogj 
{ "l.cust5_1",   "rD",         "11 0xC  DDDDD ----- ---- ---- ---- ----", EFI,
576 
  0, it_unknown },
577 
{ "l.cust5_2",   "rD,rA"   ,   "11 0xC  DDDDD AAAAA ---- ---- ---- ----", EFI,
578 
  0, it_unknown },
579 
{ "l.cust5_3",   "rD,rA,rB",   "11 0xC  DDDDD AAAAA BBBB B--- ---- ----", EFI,
580 
  0, it_unknown },
581 221 markom 
 
582 1346 nogj 
{ "l.cust6_1",   "rD",         "11 0xD  DDDDD ----- ---- ---- ---- ----", EFI,
583 
  0, it_unknown },
584 
{ "l.cust6_2",   "rD,rA"   ,   "11 0xD  DDDDD AAAAA ---- ---- ---- ----", EFI,
585 
  0, it_unknown },
586 
{ "l.cust6_3",   "rD,rA,rB",   "11 0xD  DDDDD AAAAA BBBB B--- ---- ----", EFI,
587 
  0, it_unknown },
588 221 markom 
 
589 1346 nogj 
{ "l.cust7_1",   "rD",         "11 0xE  DDDDD ----- ---- ---- ---- ----", EFI,
590 
  0, it_unknown },
591 
{ "l.cust7_2",   "rD,rA"   ,   "11 0xE  DDDDD AAAAA ---- ---- ---- ----", EFI,
592 
  0, it_unknown },
593 
{ "l.cust7_3",   "rD,rA,rB",   "11 0xE  DDDDD AAAAA BBBB B--- ---- ----", EFI,
594 
  0, it_unknown },
595 221 markom 
 
596 1346 nogj 
{ "l.cust8_1",   "rD",         "11 0xF  DDDDD ----- ---- ---- ---- ----", EFI,
597 
  0, it_unknown },
598 
{ "l.cust8_2",   "rD,rA"   ,   "11 0xF  DDDDD AAAAA ---- ---- ---- ----", EFI,
599 
  0, it_unknown },
600 
{ "l.cust8_3",   "rD,rA,rB",   "11 0xF  DDDDD AAAAA BBBB B--- ---- ----", EFI,
601 
  0, it_unknown },
602 221 markom 
#endif
603 
 
604 1346 nogj 
{ "", "", "", EFI, 0, 0 }  /* Dummy entry, not included in num_opcodes.  This
605 
                            * lets code examine entry i+1 without checking
606 
                            * if we've run off the end of the table.  */
607 133 markom 
};
608 
 
609 
#undef EFI
610 
#undef EFN
611 
#undef EF
612 
 
613 
/* **INDENT-ON** */
614 
 
615 371 markom 
/* Define dummy, if debug is not defined.  */
616 1341 nogj 
#ifndef HAS_DEBUG
617 
#define debug(l, fmt...) ;
618 371 markom 
#endif
619 133 markom 
 
620 371 markom 
CONST int num_opcodes = ((sizeof(or32_opcodes)) / (sizeof(struct or32_opcode))) - 1;
621 
 
622 138 markom 
/* Calculates instruction length in bytes. Always 4 for OR32. */
623 
int
624 
insn_len(int insn_index)
625 133 markom 
{
626 
  insn_index = 0; /* Just to get rid that warning.  */
627 
  return 4;
628 
}
629 
 
630 
/* Is individual insn's operand signed or unsigned? */
631 138 markom 
int
632 
letter_signed(char l)
633 133 markom 
{
634 
  CONST struct or32_letter *pletter;
635 
 
636 
  for(pletter = or32_letters; pletter->letter != '\0'; pletter++)
637 
    if (pletter->letter == l)
638 
      return pletter->sign;
639 
 
640 
  printf("letter_signed(%c): Unknown letter.\n", l);
641 
  return 0;
642 
}
643 
 
644 703 markom 
/* Simple cache for letter ranges */
645 
static int range_cache[256] = {0};
646 
 
647 133 markom 
/* Number of letters in the individual lettered operand. */
648 138 markom 
int
649 
letter_range(char l)
650 133 markom 
{
651 
  CONST struct or32_opcode *pinsn;
652 
  char *enc;
653 
  int range = 0;
654 703 markom 
 
655 
  /* Is value cached? */
656 1308 phoenix 
  if ((range = range_cache[(unsigned char)l])) return range;
657 133 markom 
 
658 138 markom 
  for(pinsn = or32_opcodes; strlen(pinsn->name); pinsn++)
659 
    {
660 
      if (strchr(pinsn->encoding,l))
661 
        {
662 
          for (enc = pinsn->encoding; *enc != '\0'; enc++)
663 
            if ((*enc == '0') && (*(enc+1) == 'x'))
664 
              enc += 2;
665 
            else if (*enc == l)
666 
              range++;
667 703 markom 
          return range_cache[(unsigned char)l] = range;
668 133 markom 
        }
669 
    }
670 703 markom 
 
671 133 markom 
  printf("\nABORT: letter_range(%c): Never used letter.\n", l);
672 
  exit(1);
673 
}
674 
 
675 
/* MM: Returns index of given instruction name.  */
676 138 markom 
int
677 
insn_index (char *insn)
678 
{
679 133 markom 
  int i, found = -1;
680 371 markom 
  for (i = 0; i < num_opcodes; i++)
681 138 markom 
    if (!strcmp (or32_opcodes[i].name, insn))
682 
      {
683 
        found = i;
684 
        break;
685 
      }
686 133 markom 
  return found;
687 
}
688 
 
689 717 markom 
/* Returns name of the specified instruction index */
690 
CONST char *
691 
insn_name(int index)
692 138 markom 
{
693 371 markom 
  if (index >= 0 && index < num_opcodes)
694 133 markom 
    return or32_opcodes[index].name;
695 
  else
696 
    return "???";
697 
}
698 
 
699 1342 nogj 
#if defined(HAS_EXECUTION) && SIMPLE_EXECUTION
700 717 markom 
void
701 1342 nogj 
l_none(struct iqueue_entry *current)
702 
{
703 
}
704 
#else
705 
void
706 717 markom 
l_none()
707 138 markom 
{
708 133 markom 
}
709 1342 nogj 
#endif
710 133 markom 
 
711 
/*** Finite automata for instruction decoding building code ***/
712 
 
713 1341 nogj 
/* Find symbols in encoding.  */
714 706 markom 
unsigned long
715 133 markom 
insn_extract(param_ch, enc_initial)
716 
     char param_ch;
717 
     char *enc_initial;
718 
{
719 
  char *enc;
720 
  unsigned long ret = 0;
721 
  unsigned opc_pos = 32;
722 
  for (enc = enc_initial; *enc != '\0'; )
723 
    if ((*enc == '0') && (*(enc+1) == 'x'))
724 
      {
725 
        unsigned long tmp = strtol(enc+2, NULL, 16);
726 
        opc_pos -= 4;
727 138 markom 
        if (param_ch == '0' || param_ch == '1')
728 
          {
729 
            if (param_ch == '0')
730 
              tmp = 15 - tmp;
731 
            ret |= tmp << opc_pos;
732 
          }
733 133 markom 
        enc += 3;
734 
      }
735 138 markom 
    else
736 
      {
737 
        if (*enc == '0' || *enc == '1' || *enc == '-' || isalpha(*enc) )
738 
          {
739 
            opc_pos--;
740 
            if (param_ch == *enc)
741 
              ret |= 1 << opc_pos;
742 
          }
743 
        enc++;
744 133 markom 
      }
745 
  return ret;
746 
}
747 
 
748 138 markom 
#define MAX_AUTOMATA_SIZE (1200)
749 
#define MAX_OP_TABLE_SIZE (1200)
750 133 markom 
#define MAX_LEN           (8)
751 
 
752 
#ifndef MIN
753 
# define MIN(x,y)          ((x) < (y) ? (x) : (y))
754 
#endif
755 
 
756 
unsigned long *automata;
757 
int nuncovered;
758 
int curpass = 0;
759 
 
760 1341 nogj 
/* MM: Struct that holds runtime build information about instructions.  */
761 1342 nogj 
struct temp_insn_struct *ti;
762 138 markom 
 
763 
struct insn_op_struct *op_data, **op_start;
764 
 
765 
/* Recursive utility function used to find best match and to build automata.  */
766 
 
767 
static unsigned long *
768 
cover_insn (unsigned long *cur, int pass, unsigned int mask)
769 
{
770 133 markom 
  int best_first = 0, best_len = 0, i, last_match = -1, ninstr = 0;
771 
  unsigned long cur_mask = mask;
772 
  unsigned long *next;
773 
 
774 
  for (i = 0; i < num_opcodes; i++)
775 138 markom 
    if (ti[i].in_pass == pass)
776 
      {
777 
        cur_mask &= ti[i].insn_mask;
778 
        ninstr++;
779 
        last_match = i;
780 
      }
781 
 
782 344 markom 
  debug(8, "%08X %08X\n", mask, cur_mask);
783 138 markom 
  if (ninstr == 0)
784 
    return 0;
785 
  if (ninstr == 1)
786 
    {
787 
      /* Leaf holds instruction index. */
788 344 markom 
      debug(8, "%i>I%i %s\n", cur - automata, last_match, or32_opcodes[last_match].name);
789 138 markom 
      *cur = LEAF_FLAG | last_match;
790 
      cur++;
791 
      nuncovered--;
792 
    } else {
793 
      /* Find longest match.  */
794 
      for (i = 0; i < 32; i++)
795 
        {
796 
          int len;
797 
          for (len = best_len + 1; len < MIN(MAX_LEN, 33 - i); len++)
798 
            {
799 
              unsigned long m = (1UL << ((unsigned long)len)) - 1;
800 344 markom 
              debug(9, " (%i(%08X & %08X>>%i = %08X, %08X)",len,m, cur_mask, i, (cur_mask >> (unsigned)i), (cur_mask >> (unsigned)i) & m);
801 138 markom 
              if ((m & (cur_mask >> (unsigned)i)) == m)
802 
                {
803 
                  best_len = len;
804 
                  best_first = i;
805 344 markom 
                  debug(9, "!");
806 138 markom 
                }
807 
              else
808 
                break;
809 
            }
810 
        }
811 344 markom 
      debug(9, "\n");
812 138 markom 
      if (!best_len)
813 
        {
814 
          fprintf (stderr, "%i instructions match mask 0x%08X:\n", ninstr, mask);
815 
          for (i = 0; i < num_opcodes; i++)
816 
            if (ti[i].in_pass == pass)
817 
              fprintf (stderr, "%s ", or32_opcodes[i].name);
818 
 
819 
          fprintf (stderr, "\n");
820 
          exit (1);
821 
        }
822 344 markom 
      debug(8, "%i> #### %i << %i (%i) ####\n", cur - automata, best_len, best_first, ninstr);
823 138 markom 
      *cur = best_first;
824 
      cur++;
825 
      *cur = (1 << best_len) - 1;
826 
      cur++;
827 
      next = cur;
828 
      /* Allocate space for pointers.  */
829 
      cur += 1 << best_len;
830 
      cur_mask = (1 << (unsigned long)best_len) - 1;
831 
 
832 
      for (i = 0; i < (1 << (unsigned long)best_len); i++)
833 
        {
834 
          int j;
835 
          unsigned long *c;
836 
          curpass++;
837 
          for (j = 0; j < num_opcodes; j++)
838 
            if (ti[j].in_pass == pass
839 371 markom 
                && ((ti[j].insn >> best_first) & cur_mask) == (unsigned long) i
840 138 markom 
                && ((ti[j].insn_mask >> best_first) & cur_mask) == cur_mask)
841 
              ti[j].in_pass = curpass;
842 
 
843 344 markom 
          debug(9, "%08X %08X %i\n", mask, cur_mask, best_first);
844 138 markom 
          c = cover_insn (cur, curpass, mask & (~(cur_mask << best_first)));
845 
          if (c)
846 
            {
847 344 markom 
              debug(8, "%i> #%X -> %u\n", next - automata, i, cur - automata);
848 138 markom 
              *next = cur - automata;
849 
              cur = c;
850 
            }
851 
          else
852 
            {
853 344 markom 
              debug(8, "%i> N/A\n", next - automata);
854 138 markom 
              *next = 0;
855 
            }
856 
          next++;
857 
        }
858 133 markom 
    }
859 138 markom 
  return cur;
860 
}
861 133 markom 
 
862 138 markom 
/* Returns number of nonzero bits. */
863 
static int
864 
num_ones (unsigned long value)
865 
{
866 
  int c = 0;
867 
  while (value)
868 
    {
869 
      if (value & 1)
870 
        c++;
871 
      value >>= 1;
872 133 markom 
    }
873 138 markom 
  return c;
874 
}
875 133 markom 
 
876 138 markom 
/* Utility function, which converts parameters from or32_opcode format to more binary form.
877 
   Parameters are stored in ti struct.  */
878 
 
879 
static struct insn_op_struct *
880 
parse_params (CONST struct or32_opcode *opcode, struct insn_op_struct *cur)
881 
{
882 
  char *args = opcode->args;
883 
  int i, type;
884 1346 nogj 
  int num_cur_op = 0;;
885 138 markom 
 
886 
  i = 0;
887 
  type = 0;
888 262 markom 
  /* In case we don't have any parameters, we add dummy read from r0.  */
889 
  if (!(*args)) {
890 263 markom 
    cur->type = OPTYPE_REG | OPTYPE_OP | OPTYPE_LAST;
891 262 markom 
    cur->data = 0;
892 355 markom 
    debug(9, "#%08X %08X\n", cur->type, cur->data);
893 262 markom 
    cur++;
894 
    return cur;
895 
  }
896 
 
897 138 markom 
  while (*args != '\0')
898 
    {
899 
      if (*args == 'r')
900 
        {
901 
          args++;
902 
          type |= OPTYPE_REG;
903 1341 nogj 
          if(args[1] == 'D')
904 
            type |= OPTYPE_DST;
905 133 markom 
        }
906 138 markom 
      else if (isalpha (*args))
907 
        {
908 
          unsigned long arg;
909 
          arg = insn_extract(*args, opcode->encoding);
910 355 markom 
          debug(9, "%s : %08X ------\n", opcode->name, arg);
911 138 markom 
          if (letter_signed (*args))
912 
            {
913 
              type |= OPTYPE_SIG;
914 
              type |= ((num_ones (arg) - 1) << OPTYPE_SBIT_SHR) & OPTYPE_SBIT;
915 
            }
916 
 
917 1346 nogj 
          num_cur_op = 0;
918 138 markom 
          /* Split argument to sequences of consecutive ones.  */
919 
          while (arg)
920 
            {
921 
              int shr = 0;
922 
              unsigned long tmp = arg, mask = 0;
923 
              while ((tmp & 1) == 0)
924 
                {
925 
                  shr++;
926 
                  tmp >>= 1;
927 
                }
928 
              while (tmp & 1)
929 
                {
930 
                  mask++;
931 
                  tmp >>= 1;
932 
                }
933 
              cur->type = type | shr;
934 
              cur->data = mask;
935 
              arg &= ~(((1 << mask) - 1) << shr);
936 355 markom 
              debug(6, "|%08X %08X\n", cur->type, cur->data);
937 138 markom 
              cur++;
938 1346 nogj 
              num_cur_op++;
939 138 markom 
            }
940 
          args++;
941 
        }
942 
      else if (*args == '(')
943 
        {
944 
          /* Next param is displacement.  Later we will treat them as one operand.  */
945 1346 nogj 
          /* Set the OPTYPE_DIS flag on all insn_op_structs that belong to this
946 
           * operand */
947 
          while(num_cur_op > 0) {
948 
            cur[-num_cur_op].type |= type | OPTYPE_DIS;
949 
            num_cur_op--;
950 
          }
951 
          cur[-1].type |= OPTYPE_OP;
952 355 markom 
          debug(9, ">%08X %08X\n", cur->type, cur->data);
953 138 markom 
          type = 0;
954 
          i++;
955 
          args++;
956 
        }
957 
      else if (*args == OPERAND_DELIM)
958 
        {
959 
          cur--;
960 
          cur->type = type | cur->type | OPTYPE_OP;
961 355 markom 
          debug(9, ">%08X %08X\n", cur->type, cur->data);
962 138 markom 
          cur++;
963 
          type = 0;
964 
          i++;
965 
          args++;
966 
        }
967 
      else if (*args == '0')
968 
        {
969 
          cur->type = type;
970 
          cur->data = 0;
971 355 markom 
          debug(9, ">%08X %08X\n", cur->type, cur->data);
972 138 markom 
          cur++;
973 
          type = 0;
974 
          i++;
975 
          args++;
976 
        }
977 
      else if (*args == ')')
978 
        args++;
979 
      else
980 
        {
981 
          fprintf (stderr, "%s : parse error in args.\n", opcode->name);
982 
          exit (1);
983 
        }
984 133 markom 
    }
985 138 markom 
  cur--;
986 
  cur->type = type | cur->type | OPTYPE_OP | OPTYPE_LAST;
987 355 markom 
  debug(9, "#%08X %08X\n", cur->type, cur->data);
988 138 markom 
  cur++;
989 133 markom 
  return cur;
990 
}
991 
 
992 138 markom 
/* Constructs new automata based on or32_opcodes array.  */
993 
 
994 
void
995 
build_automata()
996 
{
997 371 markom 
  int i;
998 133 markom 
  unsigned long *end;
999 138 markom 
  struct insn_op_struct *cur;
1000 
 
1001 133 markom 
  automata = (unsigned long *) malloc (MAX_AUTOMATA_SIZE * sizeof (unsigned long));
1002 138 markom 
  ti = (struct temp_insn_struct *) malloc (sizeof (struct temp_insn_struct) * num_opcodes);
1003 133 markom 
 
1004 
  nuncovered = num_opcodes;
1005 709 markom 
 
1006 
#ifdef HAS_EXECUTION
1007 138 markom 
  printf("Building automata... ");
1008 709 markom 
#endif
1009 
 
1010 133 markom 
  /* Build temporary information about instructions.  */
1011 138 markom 
  for (i = 0; i < num_opcodes; i++)
1012 
    {
1013 
      unsigned long ones, zeros;
1014 
      char *encoding = or32_opcodes[i].encoding;
1015 
      ones  = insn_extract('1', encoding);
1016 
      zeros = insn_extract('0', encoding);
1017 
      ti[i].insn_mask = ones | zeros;
1018 
      ti[i].insn = ones;
1019 
      ti[i].in_pass = curpass = 0;
1020 344 markom 
      /*debug(9, "%s: %s %08X %08X\n", or32_opcodes[i].name,
1021 138 markom 
        or32_opcodes[i].encoding, ti[i].insn_mask, ti[i].insn);*/
1022 
    }
1023 133 markom 
 
1024 
  /* Until all are covered search for best criteria to separate them.  */
1025 138 markom 
  end = cover_insn (automata, curpass, 0xFFFFFFFF);
1026 
  if (end - automata > MAX_AUTOMATA_SIZE)
1027 
    {
1028 
      fprintf (stderr, "Automata too large. Increase MAX_AUTOMATA_SIZE.");
1029 
      exit (1);
1030 
    }
1031 709 markom 
#ifdef HAS_EXECUTION
1032 138 markom 
  printf("done, num uncovered: %i/%i.\n", nuncovered, num_opcodes);
1033 709 markom 
#endif
1034 371 markom 
 
1035 709 markom 
#ifdef HAS_EXECUTION
1036 138 markom 
  printf("Parsing operands data... ");
1037 709 markom 
#endif
1038 138 markom 
  op_data = (struct insn_op_struct *) malloc (MAX_OP_TABLE_SIZE * sizeof (struct insn_op_struct));
1039 
  op_start = (struct insn_op_struct **) malloc (num_opcodes * sizeof (struct insn_op_struct *));
1040 
  cur = op_data;
1041 
  for (i = 0; i < num_opcodes; i++)
1042 
    {
1043 
      op_start[i] = cur;
1044 
      cur = parse_params (&or32_opcodes[i], cur);
1045 
      if (cur - op_data > MAX_OP_TABLE_SIZE)
1046 
        {
1047 
          fprintf (stderr, "Operands table too small, increase MAX_OP_TABLE_SIZE.\n");
1048 
          exit (1);
1049 
        }
1050 
    }
1051 709 markom 
#ifdef HAS_EXECUTION
1052 138 markom 
  printf("done.\n");
1053 709 markom 
#endif
1054 133 markom 
}
1055 
 
1056 138 markom 
void destruct_automata ()
1057 
{
1058 
  free (ti);
1059 133 markom 
  free (automata);
1060 138 markom 
  free (op_data);
1061 
  free (op_start);
1062 133 markom 
}
1063 
 
1064 
/* Decodes instruction and returns instruction index.  */
1065 138 markom 
int insn_decode (unsigned int insn)
1066 
{
1067 133 markom 
  unsigned long *a = automata;
1068 138 markom 
  int i;
1069 
  while (!(*a & LEAF_FLAG))
1070 
    {
1071 
      unsigned int first = *a;
1072 703 markom 
      //debug(9, "%i ", a - automata);
1073 138 markom 
      a++;
1074 
      i = (insn >> first) & *a;
1075 
      a++;
1076 
      if (!*(a + i))
1077 
        { /* Invalid instruction found?  */
1078 703 markom 
          //debug(9, "XXX\n", i);
1079 138 markom 
          return -1;
1080 
        }
1081 
      a = automata + *(a + i);
1082 
    }
1083 
  i = *a & ~LEAF_FLAG;
1084 703 markom 
  //debug(9, "%i\n", i);
1085 138 markom 
  /* Final check - do we have direct match?
1086 
     (based on or32_opcodes this should be the only possibility,
1087 
     but in case of invalid/missing instruction we must perform a check)  */
1088 
  if ((ti[i].insn_mask & insn) == ti[i].insn)
1089 
    return i;
1090 
  else
1091 
    return -1;
1092 133 markom 
}
1093 371 markom 
 
1094 
static char disassembled_str[50];
1095 
char *disassembled = &disassembled_str[0];
1096 
 
1097 
/* Automagically does zero- or sign- extension and also finds correct
1098 
   sign bit position if sign extension is correct extension. Which extension
1099 
   is proper is figured out from letter description. */
1100 
 
1101 879 markom 
unsigned long
1102 371 markom 
extend_imm(unsigned long imm, char l)
1103 
{
1104 
  unsigned long mask;
1105 
  int letter_bits;
1106 
 
1107 
  /* First truncate all bits above valid range for this letter
1108 
     in case it is zero extend. */
1109 
  letter_bits = letter_range(l);
1110 
  mask = (1 << letter_bits) - 1;
1111 
  imm &= mask;
1112 
 
1113 
  /* Do sign extend if this is the right one. */
1114 
  if (letter_signed(l) && (imm >> (letter_bits - 1)))
1115 
    imm |= (~mask);
1116 
 
1117 
  return imm;
1118 
}
1119 
 
1120 879 markom 
unsigned long
1121 371 markom 
or32_extract(param_ch, enc_initial, insn)
1122 
     char param_ch;
1123 
     char *enc_initial;
1124 
     unsigned long insn;
1125 
{
1126 
  char *enc;
1127 
  unsigned long ret = 0;
1128 
  int opc_pos = 0;
1129 
  int param_pos = 0;
1130 
 
1131 
  for (enc = enc_initial; *enc != '\0'; enc++)
1132 
    if (*enc == param_ch)
1133 
      {
1134 
        if (enc - 2 >= enc_initial && (*(enc - 2) == '0') && (*(enc - 1) == 'x'))
1135 
          continue;
1136 
        else
1137 
          param_pos++;
1138 
      }
1139 
 
1140 
#if DEBUG
1141 
  printf("or32_extract: %x ", param_pos);
1142 
#endif
1143 
  opc_pos = 32;
1144 
  for (enc = enc_initial; *enc != '\0'; )
1145 
    if ((*enc == '0') && (*(enc+1) == 'x'))
1146 
      {
1147 
        opc_pos -= 4;
1148 
        if ((param_ch == '0') || (param_ch == '1'))
1149 
          {
1150 
            unsigned long tmp = strtol(enc, NULL, 16);
1151 
#if DEBUG
1152 
            printf(" enc=%s, tmp=%x ", enc, tmp);
1153 
#endif
1154 
            if (param_ch == '0')
1155 
              tmp = 15 - tmp;
1156 
            ret |= tmp << opc_pos;
1157 
          }
1158 
        enc += 3;
1159 
      }
1160 
    else if ((*enc == '0') || (*enc == '1'))
1161 
      {
1162 
        opc_pos--;
1163 
        if (param_ch == *enc)
1164 
          ret |= 1 << opc_pos;
1165 
        enc++;
1166 
      }
1167 
    else if (*enc == param_ch)
1168 
      {
1169 
        opc_pos--;
1170 
        param_pos--;
1171 
#if DEBUG
1172 
        printf("\n  ret=%x opc_pos=%x, param_pos=%x\n", ret, opc_pos, param_pos);
1173 
#endif
1174 
        if (islower(param_ch))
1175 
          ret -= ((insn >> opc_pos) & 0x1) << param_pos;
1176 
        else
1177 
          ret += ((insn >> opc_pos) & 0x1) << param_pos;
1178 
        enc++;
1179 
      }
1180 
    else if (isalpha(*enc))
1181 
      {
1182 
        opc_pos--;
1183 
        enc++;
1184 
      }
1185 
    else if (*enc == '-')
1186 
      {
1187 
        opc_pos--;
1188 
        enc++;
1189 
      }
1190 
    else
1191 
      enc++;
1192 
 
1193 
#if DEBUG
1194 
  printf ("ret=%x\n", ret);
1195 
#endif
1196 
  return ret;
1197 
}
1198 
 
1199 
/* Print register. Used only by print_insn. */
1200 
 
1201 703 markom 
static char *
1202 
or32_print_register (dest, param_ch, encoding, insn)
1203 
     char *dest;
1204 371 markom 
     char param_ch;
1205 
     char *encoding;
1206 
     unsigned long insn;
1207 
{
1208 
  int regnum = or32_extract(param_ch, encoding, insn);
1209 
 
1210 703 markom 
  sprintf (dest, "r%d", regnum);
1211 
  while (*dest) dest++;
1212 
  return dest;
1213 371 markom 
}
1214 
 
1215 
/* Print immediate. Used only by print_insn. */
1216 
 
1217 703 markom 
static char *
1218 
or32_print_immediate (dest, param_ch, encoding, insn)
1219 
     char *dest;
1220 371 markom 
     char param_ch;
1221 
     char *encoding;
1222 
     unsigned long insn;
1223 
{
1224 
  int imm = or32_extract (param_ch, encoding, insn);
1225 
 
1226 
  imm = extend_imm(imm, param_ch);
1227 
 
1228 
  if (letter_signed(param_ch))
1229 
    {
1230 
      if (imm < 0)
1231 703 markom 
        sprintf (dest, "%d", imm);
1232 371 markom 
      else
1233 703 markom 
        sprintf (dest, "0x%x", imm);
1234 371 markom 
    }
1235 
  else
1236 703 markom 
    sprintf (dest, "%#x", imm);
1237 
  while (*dest) dest++;
1238 
  return dest;
1239 371 markom 
}
1240 
 
1241 
/* Disassemble one instruction from insn to disassemble.
1242 
   Return the size of the instruction.  */
1243 
 
1244 
int
1245 
disassemble_insn (insn)
1246 
     unsigned long insn;
1247 
{
1248 703 markom 
  return disassemble_index (insn, insn_decode (insn));
1249 
}
1250 371 markom 
 
1251 703 markom 
/* Disassemble one instruction from insn index.
1252 
   Return the size of the instruction.  */
1253 
 
1254 
int
1255 
disassemble_index (insn, index)
1256 
     unsigned long insn;
1257 
     int index;
1258 
{
1259 
  char *dest = disassembled;
1260 371 markom 
  if (index >= 0)
1261 
    {
1262 
      struct or32_opcode const *opcode = &or32_opcodes[index];
1263 
      char *s;
1264 
 
1265 703 markom 
      strcpy (dest, opcode->name);
1266 
      while (*dest) dest++;
1267 
      *dest++ = ' ';
1268 
      *dest = 0;
1269 
 
1270 371 markom 
      for (s = opcode->args; *s != '\0'; ++s)
1271 
        {
1272 
          switch (*s)
1273 
            {
1274 
            case '\0':
1275 703 markom 
              return insn_len (insn);
1276 714 markom 
 
1277 371 markom 
            case 'r':
1278 703 markom 
              dest = or32_print_register(dest, *++s, opcode->encoding, insn);
1279 371 markom 
              break;
1280 714 markom 
 
1281 371 markom 
            default:
1282 
              if (strchr (opcode->encoding, *s))
1283 703 markom 
                dest = or32_print_immediate (dest, *s, opcode->encoding, insn);
1284 
              else {
1285 
                *dest++ = *s;
1286 
                *dest = 0;
1287 
              }
1288 371 markom 
            }
1289 
        }
1290 
    }
1291 
  else
1292 
    {
1293 
      /* This used to be %8x for binutils.  */
1294 1308 phoenix 
      sprintf(dest, ".word 0x%08lx", insn);
1295 703 markom 
      while (*dest) dest++;
1296 371 markom 
    }
1297 
  return insn_len (insn);
1298 
}

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.