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/* abstract.c -- Abstract entities header file

   Copyright (C) 1999 Damjan Lampret, lampret@opencores.org

This file is part of OpenRISC 1000 Architectural Simulator.

This program is free software; you can redistribute it and/or modify

it under the terms of the GNU General Public License as published by

the Free Software Foundation; either version 2 of the License, or

(at your option) any later version.

This program is distributed in the hope that it will be useful,

but WITHOUT ANY WARRANTY; without even the implied warranty of

MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

GNU General Public License for more details.

You should have received a copy of the GNU General Public License

along with this program; if not, write to the Free Software

Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */

#define MEMORY_START    0

#define MEMORY_LEN      102400

#define STACK_SIZE      10000

#define LABELNAME_LEN   50

#define INSNAME_LEN     15

#define OPERANDNAME_LEN 50

/* Structure for holding several labels of a particular memory location */

struct label_entry {

        char *name;

        struct label_entry *next;

};

/* Structure that holds disassembled instruction. */

struct insn_entry {

        char *insn;

        char *op1;

        char *op2;

        char *op3;

        char *op4;

};

/* This is an abstract memory type rather than physical memory type. It holds

disassembled instructions. */

struct mem_entry {

        unsigned char data;

        unsigned char brk;

        struct label_entry *label; /* labels */

        struct insn_entry *insn; /* insn */

};

enum insn_type { unknown, exception, arith, shift, compare, branch,

                 jump, load, store, movimm, move, extend, nop };

/* Instruction queue */

struct iqueue_entry {

        char insn[INSNAME_LEN];

        enum insn_type func_unit;

        char op1[OPERANDNAME_LEN];

        char op2[OPERANDNAME_LEN];

        char op3[OPERANDNAME_LEN];

        char op4[OPERANDNAME_LEN];

        char *dependdst;

        char *dependsrc1;

        char *dependsrc2;

        unsigned long insn_addr;

};

/* Completition queue */

struct icomplet_entry {

        char insn[INSNAME_LEN];

        enum insn_type func_unit;

        char op1[OPERANDNAME_LEN];

        char op2[OPERANDNAME_LEN];

        char op3[OPERANDNAME_LEN];

        char op4[OPERANDNAME_LEN];

        char *dependdst;

        char *dependsrc1;

        char *dependsrc2;

        unsigned long insn_addr;

};

/* Memory regions assigned to devices */

struct dev_memarea {

        struct dev_memarea *next;

        unsigned long baseaddr;

        unsigned long size;

        unsigned char (*readfunc)(unsigned long);

        void (*writefunc)(unsigned long, unsigned char);

};

extern struct iqueue_entry iqueue[20];

extern struct icomplet_entry icomplet[20];

extern unsigned long pc;

extern struct mem_entry mem[MEMORY_LEN];

extern void dumpmemory(unsigned int from, unsigned int to);

extern unsigned long eval_label(char *label);

extern unsigned long eval_mem32(unsigned long memaddr);

extern unsigned short eval_mem16(unsigned long memaddr);

extern unsigned char eval_mem8(unsigned long memaddr);

extern void set_mem32(unsigned long memaddr, unsigned long value);

extern void set_mem16(unsigned long memaddr, unsigned short value);

extern void set_mem8(unsigned long memaddr, unsigned char value);