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[/] [or1k/] [tags/] [nog_patch_66/] [or1ksim/] [cpu/] [or32/] [rec_i386.h] - Blame information for rev 1765

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1 1452 nogj
/* rec_i386.h -- i386 specific parts of the recompile engine
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   Copyright (C) 2005 György `nog' Jeney, nog@sdf.lonestar.org
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This file is part of OpenRISC 1000 Architectural Simulator.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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#include "common_i386.h"
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extern void *rec_stack_base;
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/* Sets the stack to a specified value */
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static inline void or_longjmp(void *loc) __attribute__((noreturn));
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static inline void or_longjmp(void *loc)
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{
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  /* We push a trampoline address (dyn_ret_stack_prot) onto the stack to be able
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   * to detect if any ret instructions found their way into an operation. */
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  asm("\tmovl %0, %%eax\n"
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      "\tmovl %1, %%esp\n"
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      "\tmovl $%2, %%ebp\n"
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      "\tpush $dyn_ret_stack_prot\n"
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      "\tpush $dyn_ret_stack_prot\n"
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      "\tpush $dyn_ret_stack_prot\n"
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      "\tjmp *%%eax\n"
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      :
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      : "m" (loc),
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        "m" (rec_stack_base),
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        "m" (cpu_state));
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}
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/* Initialises the recompiler (architechture specific). */
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static inline void init_dyn_rec(void)
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{
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  uint64_t add = UINT32_C(-1) | UINT64_C(4) << 32;
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  /* Initialises the scheduler handling for future use.  Because the x86 has a
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   * very low number of registers (8), I have to use MMX registers.  I could do
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   * load/store combination but that takes up space and is slow.  I use packed
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   * doublewords to strut my stuff.  The high 32-bits of the first MMX register
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   * is the PC, the low 32-bits is the number of cycles that are still
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   * outstanding for the next scheduled job to run.  The second MMX register
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   * holds the amount that needs to be added to the two values on each cycle.
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   * The third MMX register only holds the value that we must use to update the
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   * low 32-bits with */
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   asm volatile ("movq %0, %%mm1\n"
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                 : : "m" (add));
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}
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/* Gets the current stack pointer */
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static inline void *get_sp(void)
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{
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  void *stack;
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  asm("movl %%esp, %0" : "=rm" (stack));
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  return stack;
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}
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/* Updates the number of cycles that it takes to load 1 instruction */
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static inline void upd_cycles_dec(int32_t amount)
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{
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  useless_x86.val3232.high32 = 4;
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  useless_x86.val3232.low32 = amount;
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  asm volatile ("movq %0, %%mm1" : : "m" (useless_x86.val64));
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}
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/* Adds the number of cycles to the next job that would be added anyway */
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static inline void sched_add_cycles(void)
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{
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  asm("movd %%mm1, %%eax\n"
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      "\tmovd %%eax, %%mm2\n"
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      "paddd %%mm2, %%mm0"
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      : : : "eax");
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}
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/* Adds an arbitary amount to the cycle counter */
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static inline void add_to_cycles(int32_t val)
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{
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  val = -val;
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  asm("movd %0, %%mm2\n"
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      "paddd %%mm2, %%mm0\n"
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      : : "rm" (val));
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}

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