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[/] [or1k/] [tags/] [nog_patch_68/] [or1ksim/] [cpu/] [or32/] [op_i386.h] - Blame information for rev 1765

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1 1452 nogj
/* op_i386.h -- i386 specific support routines for micro operations
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   Copyright (C) 2005 György `nog' Jeney, nog@sdf.lonestar.org
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This file is part of OpenRISC 1000 Architectural Simulator.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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#include "common_i386.h"
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#define OP_JUMP(x) asm("jmp *%0" : : "rm" (x))
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#define FORCE_RET asm volatile ("")
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/* Handles the scheduler and PC updateing.  Yes, useing MMX is a requirement. It
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 * just won't change.  This must be as compact as possible */
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static inline void handle_sched(void)
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{
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  asm("paddd %%mm1, %%mm0\n"
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      "\tmovd %%mm0, %%eax\n"
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      "\ttestl %%eax, %%eax\n"
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      "\tjg .no_need_run_sched\n"
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      "\tcall do_sched_wrap\n"
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      "\t.no_need_run_sched:" : : );
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}
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static inline int32_t do_cycles(void)
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{
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  register uint32_t cycles;
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  asm("paddd %%mm1, %%mm0\n"
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      "\tmovd %%mm0, %0\n"
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      : "=r" (cycles));
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  return cycles;
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}
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/* Joins runtime.sim.mem_cycles with the cycle counter */
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static inline void join_mem_cycles(void)
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{
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  runtime.sim.mem_cycles = -runtime.sim.mem_cycles;
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  asm volatile ("movd %0, %%mm2\n"
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                "\tpaddd %%mm2, %%mm0"
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                : : "m" (runtime.sim.mem_cycles));
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  runtime.sim.mem_cycles = 0;
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}
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