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[/] [or1k/] [tags/] [nog_patch_70/] [or1ksim/] [peripheral/] [mc.c] - Blame information for rev 239

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1 239 markom
/* mc.c -- Simulation of Memory Controller
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         Copyright (C) 2001 by Marko Mlinar, markom@opencores.org
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         This file is part of OpenRISC 1000 Architectural Simulator.
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         This program is free software; you can redistribute it and/or modify
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         it under the terms of the GNU General Public License as published by
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         the Free Software Foundation; either version 2 of the License, or
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         (at your option) any later version.
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         This program is distributed in the hope that it will be useful,
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         but WITHOUT ANY WARRANTY; without even the implied warranty of
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         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.    See the
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         GNU General Public License for more details.
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         You should have received a copy of the GNU General Public License
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         along with this program; if not, write to the Free Software
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         Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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/* Enable memory controller, via:
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  section mc
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    enable = 1
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    POC = 0x13243545
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  end
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   Simulates only bank switching.
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 */
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#include "mc.h"
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#include "abstract.h"

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