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https://opencores.org/ocsvn/or1k/or1k/trunk
[/] [or1k/] [tags/] [rel_4/] [or1200/] [syn/] [scr/] [tech_art_rams18.inc] - Blame information for rev 1012
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lampret |
/* Set Artisan 0.18u RAMs */
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search_path = search_path + { RAMS_PATH + art_hssp_2048x8/ } + { RAMS_PATH + art_hdsp_2048x32/ } \
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+ { RAMS_PATH + art_hssp_512x19/ } + { RAMS_PATH + art_hssp_128x34/ } + \
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{ RAMS_PATH + art_hsdp_32x32/ }
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/*
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add_module art_hssp_2048x8_typical_syn.lib art_hssp_2048x8_typical_syn
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add_module art_hdsp_2048x32_typical_syn.lib art_hdsp_2048x32_typical_syn
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add_module art_hssp_512x19_typical_syn.lib art_hssp_512x19_typical_syn
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add_module -overwrite art_hssp_128x34_typical_syn.lib typical
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*/
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target_library = target_library + { art_hssp_2048x8_typical_syn.db } + \
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{ art_hdsp_2048x32_typical_syn.db } + \
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{ art_hssp_512x19_typical_syn.db } + \
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{ art_hssp_128x34_typical_syn.db } + \
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{ art_hsdp_32x32_typical_syn.db }
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link_library = link_library + target_library
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