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[/] [or1k/] [tags/] [stable_0_1_0/] [or1ksim/] [peripheral/] [eth.c] - Blame information for rev 1068

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1 696 ivang
/* ethernet.c -- Simulation of Ethernet MAC
2
   Copyright (C) 2001 by Erez Volk, erez@opencores.org
3
                         Ivan Guzvinec, ivang@opencores.org
4
 
5
   This file is part of OpenRISC 1000 Architectural Simulator.
6
 
7
   This program is free software; you can redistribute it and/or modify
8
   it under the terms of the GNU General Public License as published by
9
   the Free Software Foundation; either version 2 of the License, or
10
   (at your option) any later version.
11
 
12
   This program is distributed in the hope that it will be useful,
13
   but WITHOUT ANY WARRANTY; without even the implied warranty of
14
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15
   GNU General Public License for more details.
16
 
17
   You should have received a copy of the GNU General Public License
18
   along with this program; if not, write to the Free Software
19
   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20
*/
21
 
22
#include <stdlib.h>
23
#include <stdio.h>
24
#include <string.h>
25
#include <sys/types.h>
26
#include <sys/stat.h>   
27
#include <fcntl.h>      
28
#include <sys/poll.h>   
29
#include <sys/time.h>   
30
#include <unistd.h>     
31
#include <errno.h>
32
 
33 867 markom
#include "config.h"
34 696 ivang
#include "abstract.h"
35
#include "ethernet_i.h"
36
#include "dma.h"
37
#include "sim-config.h"
38
#include "fields.h"
39
#include "crc32.h"
40 889 ivang
#include "vapi.h"
41 696 ivang
 
42
static struct eth_device eths[MAX_ETHERNETS];
43
 
44 702 ivang
/* simulator interface */
45
static void eth_reset_controller( struct eth_device *eth);
46 889 ivang
static void eth_vapi_read( unsigned long id, unsigned long data);
47 696 ivang
/* register interface */
48
static void eth_write32( unsigned long addr, unsigned long value );
49
static unsigned long eth_read32( unsigned long addr );
50
/* clock */
51
static void eth_controller_tx_clock( struct eth_device * );
52
static void eth_controller_rx_clock( struct eth_device * );
53
/* utility functions */
54
static int eth_find_controller( unsigned long addr, struct eth_device **eth, unsigned long *reladdr );
55 889 ivang
struct eth_device *eth_find_vapi_device (unsigned long id, unsigned *which);
56 702 ivang
static ssize_t eth_read_rx_file( struct eth_device *, void *, size_t );
57
static void eth_skip_rx_file( struct eth_device *, off_t );
58
static void eth_rewind_rx_file( struct eth_device *, off_t );
59
static void eth_rx_next_packet( struct eth_device * );
60
static void eth_write_tx_bd_num( struct eth_device *, unsigned long value );
61 696 ivang
/* ========================================================================= */
62 702 ivang
/*  TX LOGIC                                                                 */
63 696 ivang
/*---------------------------------------------------------------------------*/
64
 
65
/*
66
 * TX clock
67
 * Responsible for starting and finishing TX
68
 */
69
void eth_controller_tx_clock( struct eth_device *eth )
70
{
71 702 ivang
    int breakpoint = 0;
72
    int bAdvance   = 1;
73 867 markom
#if HAVE_ETH_PHY
74 702 ivang
    struct sockaddr_ll sll;
75 849 markom
#endif /* HAVE_ETH_PHY */
76 702 ivang
    long nwritten;
77
    unsigned long read_word;
78 696 ivang
 
79
    switch (eth->tx.state) {
80 702 ivang
        case ETH_TXSTATE_IDLE:
81
        if ( TEST_FLAG( eth->regs.moder, ETH_MODER, TXEN ) ) {
82
 
83
            /* wait for TxBuffer to be ready */
84 705 ivang
                debug (3, "TX - entering state WAIT4BD (%d)\n", eth->tx.bd_index);
85 702 ivang
            eth->tx.state = ETH_TXSTATE_WAIT4BD;
86
        }
87
        break;
88 696 ivang
    case ETH_TXSTATE_WAIT4BD:
89 702 ivang
        /* Read buffer descriptor */
90
        eth->tx.bd = eth->regs.bd_ram[eth->tx.bd_index];
91
        eth->tx.bd_addr = eth->regs.bd_ram[eth->tx.bd_index + 1];
92
 
93
        if ( TEST_FLAG( eth->tx.bd, ETH_TX_BD, READY ) ) {
94
            /*****************/
95
            /* initialize TX */
96
            eth->tx.bytes_left = eth->tx.packet_length = GET_FIELD( eth->tx.bd, ETH_TX_BD, LENGTH );
97
            eth->tx.bytes_sent = 0;
98
 
99
            /*   Initialize error status bits */
100
            CLEAR_FLAG( eth->tx.bd, ETH_TX_BD, DEFER );
101
            CLEAR_FLAG( eth->tx.bd, ETH_TX_BD, COLLISION );
102
            CLEAR_FLAG( eth->tx.bd, ETH_TX_BD, RETRANSMIT );
103
            CLEAR_FLAG( eth->tx.bd, ETH_TX_BD, UNDERRUN );
104
            CLEAR_FLAG( eth->tx.bd, ETH_TX_BD, NO_CARRIER );
105
            SET_FIELD ( eth->tx.bd, ETH_TX_BD, RETRY, 0 );
106
 
107
            /* Find out minimum length */
108
            if ( TEST_FLAG( eth->tx.bd, ETH_TX_BD, PAD ) ||
109
                 TEST_FLAG( eth->regs.moder, ETH_MODER, PAD ) )
110
                eth->tx.minimum_length = GET_FIELD( eth->regs.packetlen, ETH_PACKETLEN, MINFL );
111
            else
112
                eth->tx.minimum_length = eth->tx.packet_length;
113
 
114
            /* Find out maximum length */
115
            if ( TEST_FLAG( eth->regs.moder, ETH_MODER, HUGEN ) )
116
                eth->tx.maximum_length = eth->tx.packet_length;
117
            else
118
                eth->tx.maximum_length = GET_FIELD( eth->regs.packetlen, ETH_PACKETLEN, MAXFL );
119
 
120
            /* Do we need CRC on this packet? */
121
            if ( TEST_FLAG( eth->regs.moder, ETH_MODER, CRCEN ) ||
122
                 (TEST_FLAG( eth->tx.bd, ETH_TX_BD, CRC) &&
123
                  TEST_FLAG( eth->tx.bd, ETH_TX_BD, LAST)) )
124
                eth->tx.add_crc = 1;
125
            else
126
                eth->tx.add_crc = 0;
127
 
128
            if ( TEST_FLAG( eth->regs.moder, ETH_MODER, DLYCRCEN ) )
129
                eth->tx.crc_dly = 1;
130
            else
131
                eth->tx.crc_dly = 0;
132
            /* XXX - For now we skip CRC calculation */
133
 
134
            debug( 3, "Ethernet: Starting TX of %u bytes (min. %u, max. %u)\n", eth->tx.packet_length,
135
                   eth->tx.minimum_length, eth->tx.maximum_length );
136
 
137
            if (eth->rtx_type == ETH_RTX_FILE) {
138
                /* write packet length to file */
139
                nwritten = write( eth->txfd, &(eth->tx.packet_length), sizeof(eth->tx.packet_length) );
140
            }
141
 
142
            /************************************************/
143
            /* start transmit with reading packet into FIFO */
144
                debug (3, "TX - entering state READFIFO\n");
145
            eth->tx.state = ETH_TXSTATE_READFIFO;
146
        }
147
        else if ( !TEST_FLAG( eth->regs.moder, ETH_MODER, TXEN ) ) {
148
            /* stop TX logic */
149
                debug (3, "TX - entering state IDLE\n");
150
            eth->tx.state = ETH_TXSTATE_IDLE;
151
        }
152
 
153
        /* stay in this state if (TXEN && !READY) */
154
        break;
155 696 ivang
    case ETH_TXSTATE_READFIFO:
156 744 simons
#if 1
157 702 ivang
        if ( eth->tx.bytes_sent < eth->tx.packet_length ) {
158
            read_word = eval_mem32(eth->tx.bytes_sent + eth->tx.bd_addr, &breakpoint);
159
            eth->tx_buff[eth->tx.bytes_sent]   = (unsigned char)(read_word >> 24);
160
            eth->tx_buff[eth->tx.bytes_sent+1] = (unsigned char)(read_word >> 16);
161
            eth->tx_buff[eth->tx.bytes_sent+2] = (unsigned char)(read_word >> 8);
162
            eth->tx_buff[eth->tx.bytes_sent+3] = (unsigned char)(read_word);
163
            eth->tx.bytes_sent += 4;
164
        }
165 744 simons
#else
166
        if ( eth->tx.bytes_sent < eth->tx.packet_length ) {
167
            eth->tx_buff[eth->tx.bytes_sent] = eval_mem8(eth->tx.bytes_sent + eth->tx.bd_addr, &breakpoint);
168
            eth->tx.bytes_sent += 1;
169
        }
170
#endif
171 702 ivang
        else {
172
            debug (3, "TX - entering state TRANSMIT\n");
173
            eth->tx.state = ETH_TXSTATE_TRANSMIT;
174
        }
175
        break;
176 696 ivang
    case ETH_TXSTATE_TRANSMIT:
177 702 ivang
        /* send packet */
178
        switch (eth->rtx_type) {
179
        case ETH_RTX_FILE:
180
            nwritten = write( eth->txfd, eth->tx_buff, eth->tx.packet_length );
181
            break;
182 867 markom
#if HAVE_ETH_PHY
183 702 ivang
        case ETH_RTX_SOCK:
184
            memset(&sll, 0, sizeof(sll));
185 705 ivang
            sll.sll_ifindex = eth->ifr.ifr_ifindex;
186
            nwritten = sendto(eth->rtx_sock, eth->tx_buff, eth->tx.packet_length, 0, (struct sockaddr *)&sll, sizeof(sll));
187 849 markom
#endif /* HAVE_ETH_PHY */
188 702 ivang
        }
189
 
190
        /* set BD status */
191
        if (nwritten == eth->tx.packet_length) {
192
            CLEAR_FLAG (eth->tx.bd, ETH_TX_BD, READY);
193
            SET_FLAG (eth->regs.int_source, ETH_INT_SOURCE, TXB);
194 836 ivang
            debug (4, "ETH_INT_SOURCE = %0x\n", eth->regs.int_source);
195 702 ivang
 
196 705 ivang
            debug (3, "TX - entering state IDLE\n");
197 702 ivang
            eth->tx.state = ETH_TXSTATE_IDLE;
198
            debug (3, "send (%d)bytes OK\n", nwritten);
199
        }
200
        else {
201
            /* XXX - implement retry mechanism here! */
202
            CLEAR_FLAG (eth->tx.bd, ETH_TX_BD, READY);
203
            CLEAR_FLAG (eth->tx.bd, ETH_TX_BD, COLLISION);
204
            SET_FLAG (eth->regs.int_source, ETH_INT_SOURCE, TXE);
205 889 ivang
            debug (4, "ETH_INT_SOURCE = %0x\n", eth->regs.int_source);
206 702 ivang
 
207 889 ivang
            debug (3, "TX - entering state IDLE\n");
208 702 ivang
            eth->tx.state = ETH_TXSTATE_IDLE;
209
            debug (3, "send FAILED!\n");
210
        }
211
 
212
        eth->regs.bd_ram[eth->tx.bd_index] = eth->tx.bd;
213
 
214 889 ivang
        /* generate OK interrupt */
215
        if ( TEST_FLAG(eth->regs.int_mask, ETH_INT_MASK, TXE_M) ||
216
             TEST_FLAG(eth->regs.int_mask, ETH_INT_MASK, TXB_M) )
217
        {
218
            if ( TEST_FLAG( eth->tx.bd, ETH_TX_BD, IRQ ) )
219
                report_interrupt( eth->mac_int );
220
        }
221
 
222 702 ivang
        /* advance to next BD */
223
        if (bAdvance) {
224
            if ( TEST_FLAG( eth->tx.bd, ETH_TX_BD, WRAP ) ||
225
                            eth->tx.bd_index >= ETH_BD_COUNT )
226
                eth->tx.bd_index = 0;
227
            else
228
                eth->tx.bd_index += 2;
229
        }
230
 
231
        break;
232 696 ivang
    }
233
}
234
/* ========================================================================= */
235
 
236
 
237
/* ========================================================================= */
238 702 ivang
/*  RX LOGIC                                                                 */
239 696 ivang
/*---------------------------------------------------------------------------*/
240
 
241
/*
242
 * RX clock
243
 * Responsible for starting and finishing RX
244
 */
245
void eth_controller_rx_clock( struct eth_device *eth )
246
{
247 702 ivang
    int i;
248
    int breakpoint = 0;
249
    long nread;
250
    unsigned long send_word;
251
 
252
    fd_set rfds;
253
 
254 696 ivang
    switch (eth->rx.state) {
255
    case ETH_RXSTATE_IDLE:
256 702 ivang
        if ( TEST_FLAG( eth->regs.moder, ETH_MODER, RXEN) ) {
257 705 ivang
                debug (3, "RX - entering state WAIT4BD (%d)\n", eth->rx.bd_index);
258 702 ivang
            eth->rx.state = ETH_RXSTATE_WAIT4BD;
259
        }
260
        break;
261
 
262 696 ivang
    case ETH_RXSTATE_WAIT4BD:
263 702 ivang
        eth->rx.bd = eth->regs.bd_ram[eth->rx.bd_index];
264
        eth->rx.bd_addr = eth->regs.bd_ram[eth->rx.bd_index + 1];
265
 
266
        if ( TEST_FLAG( eth->rx.bd, ETH_RX_BD, READY ) ) {
267
            /*****************/
268
            /* Initialize RX */
269
            CLEAR_FLAG( eth->rx.bd, ETH_RX_BD, MISS );
270
            CLEAR_FLAG( eth->rx.bd, ETH_RX_BD, INVALID );
271
            CLEAR_FLAG( eth->rx.bd, ETH_RX_BD, DRIBBLE );
272
            CLEAR_FLAG( eth->rx.bd, ETH_RX_BD, UVERRUN );
273
            CLEAR_FLAG( eth->rx.bd, ETH_RX_BD, COLLISION );
274
            CLEAR_FLAG( eth->rx.bd, ETH_RX_BD, TOOBIG );
275
            CLEAR_FLAG( eth->rx.bd, ETH_RX_BD, TOOSHORT );
276
 
277
            debug( 3,  "Ethernet: Starting RX\n" );
278
 
279
            /* Setup file to read from */
280
            if ( TEST_FLAG( eth->regs.moder, ETH_MODER, LOOPBCK ) ) {
281
                eth->rx.fd = eth->txfd;
282
                eth->rx.offset = &(eth->loopback_offset);
283
            } else {
284
                eth->rx.fd = eth->rxfd;
285
                eth->rx.offset = 0;
286
            }
287 889 ivang
            debug (3, "RX - entering state RECV\n");
288 702 ivang
            eth->rx.state = ETH_RXSTATE_RECV;
289
        }
290 705 ivang
        else if (!TEST_FLAG( eth->regs.moder, ETH_MODER, RXEN)) {
291
          debug (3, "RX - entering state IDLE\n");
292
          eth->rx.state = ETH_RXSTATE_IDLE;
293
        }
294
        else {
295 744 simons
            nread = recv(eth->rtx_sock, eth->rx_buff, ETH_MAXPL, /*MSG_PEEK | */MSG_DONTWAIT);
296 705 ivang
            if (nread > 0) {
297 702 ivang
                SET_FLAG (eth->regs.int_source, ETH_INT_SOURCE, BUSY);
298 723 ivang
                if ( TEST_FLAG(eth->regs.int_mask, ETH_INT_MASK, BUSY_M) )
299
                  report_interrupt(eth->mac_int);
300 702 ivang
            }
301
        }
302
        break;
303
 
304 696 ivang
    case ETH_RXSTATE_RECV:
305 702 ivang
        switch (eth->rtx_type) {
306
        case ETH_RTX_FILE:
307
            /* Read packet length */
308
            if ( eth_read_rx_file( eth, &(eth->rx.packet_length), sizeof(eth->rx.packet_length) )
309
                     < sizeof(eth->rx.packet_length) ) {
310
                /* TODO: just do what real ethernet would do (some kind of error state) */
311 836 ivang
                debug (4, "eth_start_rx(): File does not have a packet ready for RX (len = %d)\n", eth->rx.packet_length );
312 884 markom
                runtime.sim.cont_run = 0;
313 702 ivang
                break;
314
            }
315
 
316
            /* Packet must be big enough to hold a header */
317
            if ( eth->rx.packet_length < ETH_HLEN ){
318
                debug( 3,  "eth_start_rx(): Packet too small\n" );
319
                eth_rx_next_packet( eth );
320
 
321 836 ivang
                debug (3, "RX - entering state IDLE\n");
322 702 ivang
                eth->rx.state = ETH_RXSTATE_IDLE;
323
                break;
324
            }
325
 
326
            eth->rx.bytes_read = 0;
327
            eth->rx.bytes_left = eth->rx.packet_length;
328
 
329
            /* for now Read entire packet into memory */
330
            nread = eth_read_rx_file( eth, eth->rx_buff, eth->rx.bytes_left );
331 844 ivang
            if ( nread < eth->rx.bytes_left ) {
332 702 ivang
                debug (3, "Read %d from %d. Error!\n", nread, eth->rx.bytes_left);
333 844 ivang
                eth->rx.error = 1;
334
                break;
335
            }
336
 
337
            eth->rx.packet_length = nread;
338
            eth->rx.bytes_left = nread;
339
            eth->rx.bytes_read = 0;
340
 
341
            debug (3, "RX - entering state WRITEFIFO\n");
342
            eth->rx.state = ETH_RXSTATE_WRITEFIFO;
343
 
344 702 ivang
            break;
345
 
346
        case ETH_RTX_SOCK:
347
            nread = recv(eth->rtx_sock, eth->rx_buff, ETH_MAXPL, MSG_DONTWAIT);
348 744 simons
 
349
            if (nread == 0)
350
                break;
351
            else if (nread < 0) {
352
                if ( errno != EAGAIN ) {
353 889 ivang
                    debug (3, "recv() FAILED!\n");
354
                    break;
355
                }
356
                else break;
357
            }
358 744 simons
            /* If not promiscouos mode, check the destination address */
359
            if (!TEST_FLAG(eth->regs.moder, ETH_MODER, PRO)) {
360
                if (TEST_FLAG(eth->regs.moder, ETH_MODER, IAM) && (eth->rx_buff[0] & 1)) {
361
                /* Nothing for now */
362
                }
363
 
364
                if (eth->mac_address[5] != eth->rx_buff[0] ||
365
                    eth->mac_address[4] != eth->rx_buff[1] ||
366
                    eth->mac_address[3] != eth->rx_buff[2] ||
367
                    eth->mac_address[2] != eth->rx_buff[3] ||
368
                    eth->mac_address[1] != eth->rx_buff[4] ||
369
                    eth->mac_address[0] != eth->rx_buff[5])
370 889 ivang
                    break;
371 744 simons
            }
372
 
373 841 simons
            eth->rx.packet_length = nread;
374
            eth->rx.bytes_left = nread;
375
            eth->rx.bytes_read = 0;
376
 
377
            debug (3, "RX - entering state WRITEFIFO\n");
378
            eth->rx.state = ETH_RXSTATE_WRITEFIFO;
379
 
380 702 ivang
            break;
381 889 ivang
        case ETH_RTX_VAPI:
382
 
383 702 ivang
        }
384 841 simons
        break;
385
 
386 696 ivang
    case ETH_RXSTATE_WRITEFIFO:
387 744 simons
#if 1
388 702 ivang
        send_word = ((unsigned long)eth->rx_buff[eth->rx.bytes_read]   << 24) |
389
                    ((unsigned long)eth->rx_buff[eth->rx.bytes_read+1] << 16) |
390
                    ((unsigned long)eth->rx_buff[eth->rx.bytes_read+2] << 8)  |
391
                    ((unsigned long)eth->rx_buff[eth->rx.bytes_read+3] );
392
        set_mem32( eth->rx.bd_addr + eth->rx.bytes_read, send_word, &breakpoint);
393
        /* update counters */
394
        debug (3, "Write %d, left %d - %08lXd\n", eth->rx.bytes_read, eth->rx.bytes_left, send_word);
395
        eth->rx.bytes_left -= 4;
396
        eth->rx.bytes_read += 4;
397 744 simons
#else
398
        set_mem8( eth->rx.bd_addr + eth->rx.bytes_read, eth->rx_buff[eth->rx.bytes_read], &breakpoint);
399
        eth->rx.bytes_left -= 1;
400
        eth->rx.bytes_read += 1;
401
#endif
402
 
403 702 ivang
        if ( eth->rx.bytes_left <= 0 ) {
404
            /* Write result to bd */
405
            SET_FIELD( eth->rx.bd, ETH_RX_BD, LENGTH, eth->rx.packet_length );
406
            CLEAR_FLAG( eth->rx.bd, ETH_RX_BD, READY);
407 705 ivang
            SET_FLAG( eth->regs.int_source, ETH_INT_SOURCE, RXB);
408 836 ivang
            debug (4, "ETH_INT_SOURCE = %0x\n", eth->regs.int_source);
409 702 ivang
 
410 1068 simons
            if ( eth->rx.packet_length < (GET_FIELD( eth->regs.packetlen, ETH_PACKETLEN, MINFL ) - 4) )
411 744 simons
                SET_FLAG( eth->rx.bd, ETH_RX_BD, TOOSHORT);
412
            if ( eth->rx.packet_length > GET_FIELD( eth->regs.packetlen, ETH_PACKETLEN, MAXFL ) )
413 702 ivang
                SET_FLAG( eth->rx.bd, ETH_RX_BD, TOOBIG);
414
 
415
            eth->regs.bd_ram[eth->rx.bd_index] = eth->rx.bd;
416
 
417
            /* advance to next BD */
418
            if ( TEST_FLAG( eth->rx.bd, ETH_RX_BD, WRAP ) || eth->rx.bd_index >= ETH_BD_COUNT )
419 1018 simons
                eth->rx.bd_index = eth->regs.tx_bd_num << 1;
420 702 ivang
            else
421 705 ivang
                eth->rx.bd_index += 2;
422 702 ivang
 
423 889 ivang
            if ( ( TEST_FLAG( eth->regs.int_mask, ETH_INT_MASK, RXB_M ) ) &&
424
                 ( TEST_FLAG( eth->rx.bd, ETH_RX_BD, IRQ )              ) ) {
425 702 ivang
                report_interrupt( eth->mac_int );
426
            }
427
 
428
            /* ready to receive next packet */
429
                debug (3, "RX - entering state IDLE\n");
430
            eth->rx.state = ETH_RXSTATE_IDLE;
431
        }
432
        break;
433 696 ivang
    }
434
}
435 702 ivang
 
436 696 ivang
/* ========================================================================= */
437 702 ivang
/* Move to next RX BD */
438
void eth_rx_next_packet( struct eth_device *eth )
439
{
440
    /* Skip any possible leftovers */
441
    if ( eth->rx.bytes_left )
442
        eth_skip_rx_file( eth, eth->rx.bytes_left );
443
}
444
/* "Skip" bytes in RX file */
445
void eth_skip_rx_file( struct eth_device *eth, off_t count )
446
{
447
    eth->rx.offset += count;
448
}
449 696 ivang
 
450 702 ivang
/* Move RX file position back */
451
void eth_rewind_rx_file( struct eth_device *eth, off_t count )
452
{
453
    eth->rx.offset -= count;
454
}
455
/*
456
 * Utility function to read from the ethernet RX file
457
 * This function moves the file pointer to the current place in the packet before reading
458
 */
459
ssize_t eth_read_rx_file( struct eth_device *eth, void *buf, size_t count )
460
{
461
    ssize_t result;
462
 
463
    if ( eth->rx.fd <= 0 ) {
464
        debug( 3,  "Ethernet: No RX file\n" );
465
        return 0;
466
    }
467
 
468
    if ( eth->rx.offset )
469
        if ( lseek( eth->rx.fd, *(eth->rx.offset), SEEK_SET ) == (off_t)-1 ) {
470
            debug( 3,  "Ethernet: Error seeking RX file\n" );
471
            return 0;
472
        }
473 696 ivang
 
474 702 ivang
    result = read( eth->rx.fd, buf, count );
475 836 ivang
    debug (4, "Ethernet: read result = %d \n", result);
476 702 ivang
    if ( eth->rx.offset && result >= 0 )
477
        *(eth->rx.offset) += result;
478
 
479
    return result;
480
}
481
 
482
/* ========================================================================= */
483
 
484 696 ivang
/*
485 702 ivang
  Reset. Initializes all registers to default and places devices in
486
         memory address space.
487 696 ivang
*/
488
void eth_reset()
489
{
490
    static int first_time = 1;
491
    unsigned i;
492
 
493
    if (!config.nethernets)
494 702 ivang
        return;
495 696 ivang
 
496 841 simons
    if ( first_time )
497 702 ivang
        memset( eths, 0, sizeof(eths) );
498 696 ivang
 
499
    for ( i = 0; i < MAX_ETHERNETS; ++ i ) {
500 702 ivang
        struct eth_device *eth = &(eths[i]);
501
 
502 849 markom
        if (!HAVE_ETH_PHY && eth->rtx_type == ETH_RTX_SOCK) {
503
          fprintf (stderr, "Ethernet phy not enabled in this configuration.  Configure with --enable-ethphy.\n");
504
          exit (1);
505
        }
506 702 ivang
        eth->eth_number = i;
507
        eth_reset_controller( eth );
508 841 simons
        if ( eth->baseaddr && first_time )
509 970 simons
            register_memoryarea( eth->baseaddr, ETH_ADDR_SPACE, 4, 0, eth_read32, eth_write32 );
510 696 ivang
    }
511 841 simons
 
512
    if ( first_time )
513
        first_time = 0;
514 696 ivang
}
515 841 simons
 
516 696 ivang
/* ========================================================================= */
517
 
518
 
519 702 ivang
static void eth_reset_controller(struct eth_device *eth)
520
{
521
    int i = eth->eth_number;
522
    int j;
523 867 markom
#if HAVE_ETH_PHY
524 702 ivang
    struct sockaddr_ll sll;
525 849 markom
#endif /* HAVE_ETH_PHY */
526 702 ivang
 
527
    eth->baseaddr = config.ethernets[i].baseaddr;
528
 
529
    if ( eth->baseaddr != 0 ) {
530
        /* Mark which DMA controller and channels */
531
        eth->dma        = config.ethernets[i].dma;
532 725 ivang
        eth->mac_int    = config.ethernets[i].irq;
533 702 ivang
        eth->tx_channel = config.ethernets[i].tx_channel;
534
        eth->rx_channel = config.ethernets[i].rx_channel;
535 725 ivang
        eth->rtx_type   = config.ethernets[i].rtx_type;
536 702 ivang
 
537
        switch (eth->rtx_type) {
538
        case ETH_RTX_FILE:
539
            /* (Re-)open TX/RX files */
540
            eth->rxfile = config.ethernets[i].rxfile;
541
            eth->txfile = config.ethernets[i].txfile;
542
 
543
            if ( eth->rxfd > 0 )
544
                close( eth->rxfd );
545
            if ( eth->txfd > 0 )
546
                close( eth->txfd );
547
            eth->rxfd = eth->txfd = -1;
548
 
549
            if ( (eth->rxfd = open( eth->rxfile, O_RDONLY )) < 0 )
550
                fprintf( stderr, "Cannot open Ethernet RX file \"%s\"\n", eth->rxfile );
551
            if ( (eth->txfd = open( eth->txfile,
552
                                    O_RDWR | O_CREAT | O_APPEND | O_SYNC,
553
                                    S_IRUSR | S_IWUSR | S_IRGRP | S_IROTH )) < 0 )
554
                fprintf( stderr, "Cannot open Ethernet TX file \"%s\"\n", eth->txfile );
555
            eth->loopback_offset = lseek( eth->txfd, 0, SEEK_END );
556
 
557
            break;
558 867 markom
#if HAVE_ETH_PHY
559 702 ivang
        case ETH_RTX_SOCK:
560
            /* (Re-)open TX/RX sockets */
561
            if (eth->rtx_sock != 0)
562
                break;
563
 
564
            debug (3, "RTX oppening socket...\n");
565
            eth->rtx_sock = socket(PF_PACKET, SOCK_RAW, htons(ETH_P_ALL));
566
            if (eth->rtx_sock == -1) {
567
                fprintf( stderr, "Cannot open rtx_sock.\n");
568
                return;
569
            }
570
 
571
            /* get interface index number */
572
            debug (3, "RTX getting interface...\n");
573
            memset(&(eth->ifr), 0, sizeof(eth->ifr));
574 725 ivang
            strncpy(eth->ifr.ifr_name, config.ethernets[i].sockif, IFNAMSIZ);
575 702 ivang
            if (ioctl(eth->rtx_sock, SIOCGIFINDEX, &(eth->ifr)) == -1) {
576
                fprintf( stderr, "SIOCGIFINDEX failed!\n");
577
                return;
578
            }
579
            debug (3, "RTX Socket Interface : %d\n", eth->ifr.ifr_ifindex);
580
 
581
            /* Bind to interface... */
582
            debug (3, "Binding to the interface ifindex=%d\n", eth->ifr.ifr_ifindex);
583
            memset(&sll, 0xff, sizeof(sll));
584
            sll.sll_family = AF_PACKET;    /* allways AF_PACKET */
585
            sll.sll_protocol = htons(ETH_P_ALL);
586
            sll.sll_ifindex = eth->ifr.ifr_ifindex;
587
            if (bind(eth->rtx_sock, (struct sockaddr *)&sll, sizeof(sll)) == -1) {
588
                fprintf( stderr, "Error bind().\n");
589
                return;
590
            }
591
 
592
            /* first, flush all received packets. */
593
            debug (3, "Flush");
594
            do {
595
                fd_set fds;
596
                struct timeval t;
597
 
598
                debug( 3, ".");
599
                FD_ZERO(&fds);
600
                FD_SET(eth->rtx_sock, &fds);
601
                memset(&t, 0, sizeof(t));
602
                j = select(FD_SETSIZE, &fds, NULL, NULL, &t);
603
                if (j > 0)
604
                    recv(eth->rtx_sock, eth->rx_buff, j, 0);
605
            } while (j);
606
            debug (3, "\n");
607
 
608
            break;
609 849 markom
#endif /* HAVE_ETH_PHY */
610 702 ivang
        }
611
 
612
        /* Set registers to default values */
613
        memset( &(eth->regs), 0, sizeof(eth->regs) );
614
        eth->regs.moder = 0x0000A000;
615
        eth->regs.ipgt = 0x00000012;
616
        eth->regs.ipgr1 = 0x0000000C;
617
        eth->regs.ipgr2 = 0x00000012;
618
        eth->regs.packetlen = 0x003C0600;
619
        eth->regs.collconf = 0x000F003F;
620
        eth->regs.miimoder = 0x00000064;
621 1018 simons
        eth->regs.tx_bd_num = 0x00000040;
622 702 ivang
 
623
        /* Initialize TX/RX status */
624
        memset( &(eth->tx), 0, sizeof(eth->tx) );
625
        memset( &(eth->rx), 0, sizeof(eth->rx) );
626 1018 simons
        eth->rx.bd_index = eth->regs.tx_bd_num << 1;
627 889 ivang
 
628
        /* Initialize VAPI */
629
        if (config.ethernets[i].base_vapi_id) {
630
            eth->base_vapi_id = config.ethernets[i].base_vapi_id;
631
            vapi_install_multi_handler( eth->base_vapi_id, ETH_NUM_VAPI_IDS, eth_vapi_read );
632
        }
633 702 ivang
    }
634
}
635
/* ========================================================================= */
636
 
637
 
638 696 ivang
/*
639
  Print register values on stdout
640
*/
641
void eth_status( void )
642
{
643
    unsigned i;
644
 
645
    for ( i = 0; i < MAX_ETHERNETS; ++ i ) {
646 702 ivang
        struct eth_device *eth = &(eths[i]);
647
 
648
        if ( eth->baseaddr == 0 )
649
            continue;
650
 
651 997 markom
        PRINTF( "\nEthernet MAC %u at 0x%08X:\n", i, eth->baseaddr );
652
        PRINTF( "MODER        : 0x%08lX\n", eth->regs.moder );
653
        PRINTF( "INT_SOURCE   : 0x%08lX\n", eth->regs.int_source );
654
        PRINTF( "INT_MASK     : 0x%08lX\n", eth->regs.int_mask );
655
        PRINTF( "IPGT         : 0x%08lX\n", eth->regs.ipgt );
656
        PRINTF( "IPGR1        : 0x%08lX\n", eth->regs.ipgr1 );
657
        PRINTF( "IPGR2        : 0x%08lX\n", eth->regs.ipgr2 );
658
        PRINTF( "PACKETLEN    : 0x%08lX\n", eth->regs.packetlen );
659
        PRINTF( "COLLCONF     : 0x%08lX\n", eth->regs.collconf );
660
        PRINTF( "TX_BD_NUM    : 0x%08lX\n", eth->regs.tx_bd_num );
661
        PRINTF( "CTRLMODER    : 0x%08lX\n", eth->regs.controlmoder );
662
        PRINTF( "MIIMODER     : 0x%08lX\n", eth->regs.miimoder );
663
        PRINTF( "MIICOMMAND   : 0x%08lX\n", eth->regs.miicommand );
664
        PRINTF( "MIIADDRESS   : 0x%08lX\n", eth->regs.miiaddress );
665
        PRINTF( "MIITX_DATA   : 0x%08lX\n", eth->regs.miitx_data );
666
        PRINTF( "MIIRX_DATA   : 0x%08lX\n", eth->regs.miirx_data );
667
        PRINTF( "MIISTATUS    : 0x%08lX\n", eth->regs.miistatus );
668
        PRINTF( "MAC Address  : %02X:%02X:%02X:%02X:%02X:%02X\n",
669 702 ivang
                eth->mac_address[0], eth->mac_address[1], eth->mac_address[2],
670
                eth->mac_address[3], eth->mac_address[4], eth->mac_address[5] );
671 997 markom
        PRINTF( "HASH0        : 0x%08lX\n", eth->regs.hash0 );
672
        PRINTF( "HASH1        : 0x%08lX\n", eth->regs.hash1 );
673 696 ivang
    }
674
}
675
/* ========================================================================= */
676
 
677
 
678
/*
679
  Simulation hook. Must be called every clock cycle to simulate Ethernet MAC.
680
*/
681
void eth_clock()
682
{
683
    unsigned i;
684
 
685
    for ( i = 0; i < config.nethernets; ++ i ) {
686 702 ivang
        eth_controller_tx_clock( &(eths[i]) );
687
        eth_controller_rx_clock( &(eths[i]) );
688 696 ivang
    }
689
}
690
/* ========================================================================= */
691
 
692
 
693
/*
694
  Read a register
695
*/
696
unsigned long eth_read32( unsigned long addr )
697
{
698
    struct eth_device *eth;
699 702 ivang
    if ( !eth_find_controller( addr, &eth, &addr ) )    {
700 997 markom
        PRINTF( "eth_read32( 0x%08lX ): Not in registered range(s)\n", addr );
701 702 ivang
        return 0;
702 696 ivang
    }
703
 
704
    switch( addr ) {
705
    case ETH_MODER: return eth->regs.moder;
706
    case ETH_INT_SOURCE: return eth->regs.int_source;
707
    case ETH_INT_MASK: return eth->regs.int_mask;
708
    case ETH_IPGT: return eth->regs.ipgt;
709
    case ETH_IPGR1: return eth->regs.ipgr1;
710
    case ETH_IPGR2: return eth->regs.ipgr2;
711
    case ETH_PACKETLEN: return eth->regs.packetlen;
712
    case ETH_COLLCONF: return eth->regs.collconf;
713
    case ETH_TX_BD_NUM: return eth->regs.tx_bd_num;
714
    case ETH_CTRLMODER: return eth->regs.controlmoder;
715
    case ETH_MIIMODER: return eth->regs.miimoder;
716
    case ETH_MIICOMMAND: return eth->regs.miicommand;
717
    case ETH_MIIADDRESS: return eth->regs.miiaddress;
718
    case ETH_MIITX_DATA: return eth->regs.miitx_data;
719
    case ETH_MIIRX_DATA: return eth->regs.miirx_data;
720
    case ETH_MIISTATUS: return eth->regs.miistatus;
721
    case ETH_MAC_ADDR0: return (((unsigned long)eth->mac_address[3]) << 24) |
722 702 ivang
                               (((unsigned long)eth->mac_address[2]) << 16) |
723
                               (((unsigned long)eth->mac_address[1]) << 8) |
724
                                 (unsigned long)eth->mac_address[0];
725 696 ivang
    case ETH_MAC_ADDR1: return (((unsigned long)eth->mac_address[5]) << 8) |
726 702 ivang
                                 (unsigned long)eth->mac_address[4];
727 744 simons
    case ETH_HASH0: return eth->regs.hash0;
728
    case ETH_HASH1: return eth->regs.hash1;
729 702 ivang
    /*case ETH_DMA_RX_TX: return eth_rx( eth );*/
730 696 ivang
    }
731
 
732
    if ( (addr >= ETH_BD_BASE) && (addr < ETH_BD_BASE + ETH_BD_SPACE) )
733 702 ivang
        return eth->regs.bd_ram[(addr - ETH_BD_BASE) / 4];
734 696 ivang
 
735 997 markom
    PRINTF( "eth_read32( 0x%08lX ): Illegal address\n", addr + eth->baseaddr );
736 884 markom
    runtime.sim.cont_run = 0;
737 696 ivang
    return 0;
738
}
739
/* ========================================================================= */
740
 
741
 
742
/*
743
  Write a register
744
*/
745
void eth_write32( unsigned long addr, unsigned long value )
746
{
747
    struct eth_device *eth;
748 702 ivang
    if ( !eth_find_controller( addr, &eth, &addr ) )    {
749 997 markom
        PRINTF( "eth_write32( 0x%08lX ): Not in registered range(s)\n", addr );
750 702 ivang
    return;
751 696 ivang
    }
752
 
753
    switch( addr ) {
754 841 simons
    case ETH_MODER: eth->regs.moder = value; if (TEST_FLAG(value, ETH_MODER, RST)) eth_reset(); return;
755 744 simons
    case ETH_INT_SOURCE: eth->regs.int_source &= ~value; return;
756 696 ivang
    case ETH_INT_MASK: eth->regs.int_mask = value; return;
757
    case ETH_IPGT: eth->regs.ipgt = value; return;
758
    case ETH_IPGR1: eth->regs.ipgr1 = value; return;
759
    case ETH_IPGR2: eth->regs.ipgr2 = value; return;
760
    case ETH_PACKETLEN: eth->regs.packetlen = value; return;
761
    case ETH_COLLCONF: eth->regs.collconf = value; return;
762
    case ETH_TX_BD_NUM: eth_write_tx_bd_num( eth, value ); return;
763
    case ETH_CTRLMODER: eth->regs.controlmoder = value; return;
764
    case ETH_MIIMODER: eth->regs.miimoder = value; return;
765
    case ETH_MIICOMMAND: eth->regs.miicommand = value; return;
766
    case ETH_MIIADDRESS: eth->regs.miiaddress = value; return;
767
    case ETH_MIITX_DATA: eth->regs.miitx_data = value; return;
768
    case ETH_MIIRX_DATA: eth->regs.miirx_data = value; return;
769
    case ETH_MIISTATUS: eth->regs.miistatus = value; return;
770
    case ETH_MAC_ADDR0:
771 702 ivang
        eth->mac_address[0] = value & 0xFF;
772
        eth->mac_address[1] = (value >> 8) & 0xFF;
773
        eth->mac_address[2] = (value >> 16) & 0xFF;
774
        eth->mac_address[3] = (value >> 24) & 0xFF;
775
        return;
776 696 ivang
    case ETH_MAC_ADDR1:
777 702 ivang
        eth->mac_address[4] = value & 0xFF;
778
        eth->mac_address[5] = (value >> 8) & 0xFF;
779
        return;
780 744 simons
    case ETH_HASH0: eth->regs.hash0 = value; return;
781
    case ETH_HASH1: eth->regs.hash1 = value; return;
782 702 ivang
 
783
    /*case ETH_DMA_RX_TX: eth_tx( eth, value ); return;*/
784 696 ivang
    }
785
 
786
    if ( (addr >= ETH_BD_BASE) && (addr < ETH_BD_BASE + ETH_BD_SPACE) ) {
787 702 ivang
        eth->regs.bd_ram[(addr - ETH_BD_BASE) / 4] = value;
788
        return;
789 696 ivang
    }
790
 
791 997 markom
    PRINTF( "eth_write32( 0x%08lX ): Illegal address\n", addr + eth->baseaddr );
792 884 markom
    runtime.sim.cont_run = 0;
793 696 ivang
    return;
794
}
795
/* ========================================================================= */
796
 
797
 
798 889 ivang
/*
799
 *   VAPI connection to outside
800
 */
801
static void eth_vapi_read (unsigned long id, unsigned long data)
802
{
803
    unsigned long which;
804
    struct eth_device *eth = eth_find_vapi_device( id, &which );
805
 
806
    debug( 5, "ETH: id %08x, data %08x\n", id, data );
807
 
808
    if ( !eth ) {
809
        debug( 1, "ETH: VAPI ID %08x is not ours!\n", id );
810
        return;
811
    }
812
 
813
    switch( which ) {
814
    case ETH_VAPI_DATA:
815
        break;
816
    case ETH_VAPI_CTRL:
817
        break;
818
    }
819
}
820
/* ========================================================================= */
821
 
822
 
823 702 ivang
/* When TX_BD_NUM is written, also reset current RX BD index */
824
void eth_write_tx_bd_num( struct eth_device *eth, unsigned long value )
825
{
826 1018 simons
    eth->regs.tx_bd_num = value & 0xFF;
827
    eth->rx.bd_index = eth->regs.tx_bd_num << 1;
828 702 ivang
}
829
/* ========================================================================= */
830
 
831
 
832 696 ivang
/*
833
  Convert a memory address to a oontroller struct and relative address.
834
  Return nonzero on success
835
*/
836
int eth_find_controller( unsigned long addr, struct eth_device **eth, unsigned long *reladdr )
837
{
838
    unsigned i;
839
    *eth = NULL;
840
 
841
    for ( i = 0; i < MAX_ETHERNETS && *eth == NULL; ++ i ) {
842 702 ivang
        if ( (addr >= eths[i].baseaddr) && (addr < eths[i].baseaddr + ETH_ADDR_SPACE) )
843
            *eth = &(eths[i]);
844
        }
845 696 ivang
 
846
    /* verify we found a controller */
847
    if ( *eth == NULL )
848 702 ivang
        return 0;
849 696 ivang
 
850
    /* Verify legal address */
851
    if ( (addr - (*eth)->baseaddr) % 4 != 0 )
852 702 ivang
        return 0;
853 696 ivang
 
854
    *reladdr = addr - (*eth)->baseaddr;
855
    return 1;
856
}
857 889 ivang
 
858
/*
859
 * Convert VAPI id to controller struct and relative address.
860
 */
861
struct eth_device *eth_find_vapi_device( unsigned long id, unsigned *which )
862
{
863
    unsigned i;
864
 
865
    for ( i=0; i<config.nethernets; i++) {
866
        if ( (id>=eths[i].base_vapi_id) && (id < eths[i].base_vapi_id + ETH_NUM_VAPI_IDS)) {
867
            *which = id - eths[i].base_vapi_id;
868
            return &(eths[i]);
869
        }
870
    }
871
 
872
    return NULL;
873
}

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