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[/] [or1k/] [tags/] [stable_0_2_0_rc1/] [insight/] [opcodes/] [or32.c] - Blame information for rev 1475

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1 133 markom
/* Table of opcodes for the OpenRISC 1000 ISA.
2
   Copyright 1990, 1991, 1992, 1993 Free Software Foundation, Inc.
3
   Contributed by Damjan Lampret (lampret@opencores.org).
4
 
5 717 markom
This file is part of gen_or1k_isa, or1ksim, GDB and GAS.
6 133 markom
 
7
This program is free software; you can redistribute it and/or modify
8
it under the terms of the GNU General Public License as published by
9
the Free Software Foundation; either version 2 of the License, or
10
(at your option) any later version.
11
 
12
This program is distributed in the hope that it will be useful,
13
but WITHOUT ANY WARRANTY; without even the implied warranty of
14
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15
GNU General Public License for more details.
16
 
17
You should have received a copy of the GNU General Public License
18
along with this program; if not, write to the Free Software
19
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
20
 
21 1114 lampret
/*
22
 * $Log: not supported by cvs2svn $
23 1475 nogj
 * Revision 1.44  2005/03/31 16:09:57  nogj
24
 * Implement a dynamic recompiler to speed up the execution
25
 *
26 1452 nogj
 * Revision 1.43  2005/03/31 16:01:59  nogj
27
 * Reclasify l.trap and l.sys to be an exception instruction
28
 *
29 1440 nogj
 * Revision 1.42  2005/03/16 12:25:56  nogj
30
 * Fix the parameters to the l.ff1/l.maci instructions
31
 *
32 1384 nogj
 * Revision 1.41  2005/02/09 17:41:03  nogj
33
 * Mark a simulated cpu address as such, by introducing the new oraddr_t type
34
 *
35 1350 nogj
 * Revision 1.40  2005/01/27 14:14:13  nogj
36
 * Remove the global op structure
37
 *
38 1346 nogj
 * Revision 1.39  2005/01/27 13:35:40  nogj
39
 *  * Fix generate.c to produce a execgen.c with less warnings.
40
 *  * Fix the --enable-simple configure option.
41
 *
42 1342 nogj
 * Revision 1.38  2005/01/27 13:15:50  nogj
43
 * Mark wich operand is the destination operand in the architechture definition
44
 *
45 1341 nogj
 * Revision 1.37  2005/01/11 15:41:58  andreje
46
 * l.ff1 instruction added
47
 *
48 1338 andreje
 * Revision 1.36  2004/07/22 20:17:23  phoenix
49
 * removed includes
50
 *
51 1309 phoenix
 * Revision 1.35  2004/07/19 23:07:37  phoenix
52
 * Gyorgy Jeney: extensive cleanup
53
 *
54 1308 phoenix
 * Revision 1.34  2004/06/27 22:56:48  lampret
55
 * Updated instruction set descriptions. Changed FP instructions encoding.
56
 *
57 1295 lampret
 * Revision 1.33  2004/05/09 19:52:31  lampret
58
 * Changed desciption of the l.cust5 insns
59
 *
60 1285 lampret
 * Revision 1.31  2003/07/01 19:34:49  csanchez
61
 * Added support for l.addc instruction.
62
 *
63 1169 csanchez
 * Revision 1.30  2003/01/28 03:49:24  lampret
64
 * Added cvs log keywords
65
 *
66 1114 lampret
 */
67
 
68 133 markom
#include <string.h>
69
#include <stdio.h>
70
#include <stdlib.h>
71 371 markom
#include <ctype.h>
72 133 markom
 
73 371 markom
 
74 138 markom
#ifdef HAVE_CONFIG_H
75
# include "config.h"
76
#endif
77 1342 nogj
#ifdef HAS_EXECUTION
78 1350 nogj
# ifdef HAVE_INTTYPES_H
79
#  include <inttypes.h> /* ...but to get arch.h we need uint{8,16,32}_t... */
80
# endif
81
# include "port.h"
82
# include "arch.h" /* ...but to get abstract.h, we need oraddr_t... */
83
# include "abstract.h" /* To get struct iqueue_entry... */
84 1342 nogj
#endif
85 133 markom
#include "opcode/or32.h"
86
 
87
/* **INDENT-OFF** */
88
 
89 1342 nogj
/* We treat all letters the same in encode/decode routines so
90
   we need to assign some characteristics to them like signess etc.*/
91 133 markom
CONST struct or32_letter or32_letters[] =
92
{
93
{ 'A', NUM_UNSIGNED },
94
{ 'B', NUM_UNSIGNED },
95
{ 'D', NUM_UNSIGNED },
96
{ 'I', NUM_SIGNED },
97
{ 'K', NUM_UNSIGNED },
98
{ 'L', NUM_UNSIGNED },
99
{ 'N', NUM_SIGNED },
100
{ '0', NUM_UNSIGNED },
101
{ '\0', 0 }     /* dummy entry */
102
};
103
 
104
/* Opcode encoding:
105
   machine[31:30]: first two bits of opcode
106
                   00 - neither of source operands is GPR
107
                   01 - second source operand is GPR (rB)
108
                   10 - first source operand is GPR (rA)
109
                   11 - both source operands are GPRs (rA and rB)
110
   machine[29:26]: next four bits of opcode
111
   machine[25:00]: instruction operands (specific to individual instruction)
112
 
113
  Recommendation: irrelevant instruction bits should be set with a value of
114
  bits in same positions of instruction preceding current instruction in the
115
  code (when assembling).
116
*/
117
 
118 1341 nogj
#ifdef HAS_EXECUTION
119
# if SIMPLE_EXECUTION
120
#  define EFN &l_none
121
#  define EF(func) &(func)
122
#  define EFI &l_invalid
123 1452 nogj
# elif COMPLEX_EXECUTION
124 1341 nogj
#  define EFN "l_none"
125
#  define EFI "l_invalid"
126
#  ifdef __GNUC__
127
#   define EF(func) #func
128
#  else
129
#   define EF(func) "func"
130
#  endif
131 1452 nogj
# else /* DYNAMIC_EXECUTION */
132
#  define EFN &l_none
133
#  define EF(func) &(gen_ ##func)
134
#  define EFI &gen_l_invalid
135
# endif
136 1341 nogj
#else /* HAS_EXECUTION */
137
# define EFN &l_none
138
# define EF(func) EFN
139
# define EFI EFN
140 133 markom
#endif /* HAS_EXECUTION */
141
 
142
CONST struct or32_opcode or32_opcodes[] =
143
{
144
 
145 1346 nogj
{ "l.j",       "N",            "00 0x0  NNNNN NNNNN NNNN NNNN NNNN NNNN",
146
  EF(l_j), OR32_IF_DELAY, it_jump },
147
{ "l.jal",     "N",            "00 0x1  NNNNN NNNNN NNNN NNNN NNNN NNNN",
148
  EF(l_jal), OR32_IF_DELAY, it_jump },
149
{ "l.bnf",     "N",            "00 0x3  NNNNN NNNNN NNNN NNNN NNNN NNNN",
150
  EF(l_bnf), OR32_IF_DELAY | OR32_R_FLAG, it_branch },
151
{ "l.bf",      "N",            "00 0x4  NNNNN NNNNN NNNN NNNN NNNN NNNN",
152
  EF(l_bf), OR32_IF_DELAY | OR32_R_FLAG, it_branch },
153
{ "l.nop",     "K",            "00 0x5  01--- ----- KKKK KKKK KKKK KKKK",
154
  EF(l_nop), 0, it_nop },
155
{ "l.movhi",   "rD,K",         "00 0x6  DDDDD ----0 KKKK KKKK KKKK KKKK",
156
  EF(l_movhi), 0, it_movimm },
157
{ "l.macrc",   "rD",           "00 0x6  DDDDD ----1 0000 0000 0000 0000",
158
  EF(l_macrc), 0, it_mac },
159
{ "l.sys",     "K",            "00 0x8  00000 00000 KKKK KKKK KKKK KKKK",
160 1440 nogj
  EF(l_sys), 0, it_exception },
161 1346 nogj
{ "l.trap",    "K",            "00 0x8  01000 00000 KKKK KKKK KKKK KKKK",
162 1440 nogj
  EF(l_trap), 0, it_exception },
163 1346 nogj
{ "l.msync",   "",             "00 0x8  10000 00000 0000 0000 0000 0000", EFN,
164
  0, it_unknown },
165
{ "l.psync",   "",             "00 0x8  10100 00000 0000 0000 0000 0000", EFN,
166
  0, it_unknown },
167
{ "l.csync",   "",             "00 0x8  11000 00000 0000 0000 0000 0000", EFN,
168
  0, it_unknown },
169
{ "l.rfe",     "",             "00 0x9  ----- ----- ---- ---- ---- ----",
170 1475 nogj
  EF(l_rfe), 0, it_exception },
171 1346 nogj
{ "lv.all_eq.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x0", EFI, 0,
172
  it_unknown },
173
{ "lv.all_eq.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x1", EFI, 0,
174
  it_unknown },
175
{ "lv.all_ge.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x2", EFI, 0,
176
  it_unknown },
177
{ "lv.all_ge.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x3", EFI, 0,
178
  it_unknown },
179
{ "lv.all_gt.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x4", EFI, 0,
180
  it_unknown },
181
{ "lv.all_gt.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x5", EFI, 0,
182
  it_unknown },
183
{ "lv.all_le.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x6", EFI, 0,
184
  it_unknown },
185
{ "lv.all_le.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x7", EFI, 0,
186
  it_unknown },
187
{ "lv.all_lt.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x8", EFI, 0,
188
  it_unknown },
189
{ "lv.all_lt.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0x9", EFI, 0,
190
  it_unknown },
191
{ "lv.all_ne.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0xA", EFI, 0,
192
  it_unknown },
193
{ "lv.all_ne.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x1 0xB", EFI, 0,
194
  it_unknown },
195
{ "lv.any_eq.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x0", EFI, 0,
196
  it_unknown },
197
{ "lv.any_eq.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x1", EFI, 0,
198
  it_unknown },
199
{ "lv.any_ge.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x2", EFI, 0,
200
  it_unknown },
201
{ "lv.any_ge.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x3", EFI, 0,
202
  it_unknown },
203
{ "lv.any_gt.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x4", EFI, 0,
204
  it_unknown },
205
{ "lv.any_gt.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x5", EFI, 0,
206
  it_unknown },
207
{ "lv.any_le.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x6", EFI, 0,
208
  it_unknown },
209
{ "lv.any_le.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x7", EFI, 0,
210
  it_unknown },
211
{ "lv.any_lt.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x8", EFI, 0,
212
  it_unknown },
213
{ "lv.any_lt.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0x9", EFI, 0,
214
  it_unknown },
215
{ "lv.any_ne.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0xA", EFI, 0,
216
  it_unknown },
217
{ "lv.any_ne.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x2 0xB", EFI, 0,
218
  it_unknown },
219
{ "lv.add.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x0", EFI, 0,
220
  it_unknown },
221
{ "lv.add.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x1", EFI, 0,
222
  it_unknown },
223
{ "lv.adds.b", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x2", EFI, 0,
224
  it_unknown },
225
{ "lv.adds.h", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x3", EFI, 0,
226
  it_unknown },
227
{ "lv.addu.b", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x4", EFI, 0,
228
  it_unknown },
229
{ "lv.addu.h", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x5", EFI, 0,
230
  it_unknown },
231
{ "lv.addus.b","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x6", EFI, 0,
232
  it_unknown },
233
{ "lv.addus.h","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x7", EFI, 0,
234
  it_unknown },
235
{ "lv.and",    "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x8", EFI, 0,
236
  it_unknown },
237
{ "lv.avg.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0x9", EFI, 0,
238
  it_unknown },
239
{ "lv.avg.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x3 0xA", EFI, 0,
240
  it_unknown },
241
{ "lv.cmp_eq.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x0", EFI, 0,
242
  it_unknown },
243
{ "lv.cmp_eq.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x1", EFI, 0,
244
  it_unknown },
245
{ "lv.cmp_ge.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x2", EFI, 0,
246
  it_unknown },
247
{ "lv.cmp_ge.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x3", EFI, 0,
248
  it_unknown },
249
{ "lv.cmp_gt.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x4", EFI, 0,
250
  it_unknown },
251
{ "lv.cmp_gt.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x5", EFI, 0,
252
  it_unknown },
253
{ "lv.cmp_le.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x6", EFI, 0,
254
  it_unknown },
255
{ "lv.cmp_le.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x7", EFI, 0,
256
  it_unknown },
257
{ "lv.cmp_lt.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x8", EFI, 0,
258
  it_unknown },
259
{ "lv.cmp_lt.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0x9", EFI, 0,
260
  it_unknown },
261
{ "lv.cmp_ne.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0xA", EFI, 0,
262
  it_unknown },
263
{ "lv.cmp_ne.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x4 0xB", EFI, 0,
264
  it_unknown },
265
{ "lv.madds.h","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0x4", EFI, 0,
266
  it_unknown },
267
{ "lv.max.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0x5", EFI, 0,
268
  it_unknown },
269
{ "lv.max.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0x6", EFI, 0,
270
  it_unknown },
271
{ "lv.merge.b","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0x7", EFI, 0,
272
  it_unknown },
273
{ "lv.merge.h","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0x8", EFI, 0,
274
  it_unknown },
275
{ "lv.min.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0x9", EFI, 0,
276
  it_unknown },
277
{ "lv.min.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0xA", EFI, 0,
278
  it_unknown },
279
{ "lv.msubs.h","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0xB", EFI, 0,
280
  it_unknown },
281
{ "lv.muls.h", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0xC", EFI, 0,
282
  it_unknown },
283
{ "lv.nand",   "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0xD", EFI, 0,
284
  it_unknown },
285
{ "lv.nor",    "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0xE", EFI, 0,
286
  it_unknown },
287
{ "lv.or",     "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x5 0xF", EFI, 0,
288
  it_unknown },
289
{ "lv.pack.b", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x0", EFI, 0,
290
  it_unknown },
291
{ "lv.pack.h", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x1", EFI, 0,
292
  it_unknown },
293
{ "lv.packs.b","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x2", EFI, 0,
294
  it_unknown },
295
{ "lv.packs.h","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x3", EFI, 0,
296
  it_unknown },
297
{ "lv.packus.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x4", EFI, 0,
298
  it_unknown },
299
{ "lv.packus.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x5", EFI, 0,
300
  it_unknown },
301
{ "lv.perm.n", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x6", EFI, 0,
302
  it_unknown },
303
{ "lv.rl.b",   "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x7", EFI, 0,
304
  it_unknown },
305
{ "lv.rl.h",   "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x8", EFI, 0,
306
  it_unknown },
307
{ "lv.sll.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0x9", EFI, 0,
308
  it_unknown },
309
{ "lv.sll.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0xA", EFI, 0,
310
  it_unknown },
311
{ "lv.sll",    "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0xB", EFI, 0,
312
  it_unknown },
313
{ "lv.srl.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0xC", EFI, 0,
314
  it_unknown },
315
{ "lv.srl.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0xD", EFI, 0,
316
  it_unknown },
317
{ "lv.sra.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0xE", EFI, 0,
318
  it_unknown },
319
{ "lv.sra.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x6 0xF", EFI, 0,
320
  it_unknown },
321
{ "lv.srl",    "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x0", EFI, 0,
322
  it_unknown },
323
{ "lv.sub.b",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x1", EFI, 0,
324
  it_unknown },
325
{ "lv.sub.h",  "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x2", EFI, 0,
326
  it_unknown },
327
{ "lv.subs.b", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x3", EFI, 0,
328
  it_unknown },
329
{ "lv.subs.h", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x4", EFI, 0,
330
  it_unknown },
331
{ "lv.subu.b", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x5", EFI, 0,
332
  it_unknown },
333
{ "lv.subu.h", "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x6", EFI, 0,
334
  it_unknown },
335
{ "lv.subus.b","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x7", EFI, 0,
336
  it_unknown },
337
{ "lv.subus.h","rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x8", EFI, 0,
338
  it_unknown },
339
{ "lv.unpack.b","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0x9", EFI, 0,
340
  it_unknown },
341
{ "lv.unpack.h","rD,rA,rB",    "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0xA", EFI, 0,
342
  it_unknown },
343
{ "lv.xor",    "rD,rA,rB",     "00 0xA  DDDDD AAAAA BBBB B--- 0x7 0xB", EFI, 0,
344
  it_unknown },
345
{ "lv.cust1",  "",             "00 0xA  ----- ----- ---- ---- 0xC ----", EFI, 0,
346
  it_unknown },
347
{ "lv.cust2",  "",             "00 0xA  ----- ----- ---- ---- 0xD ----", EFI, 0,
348
  it_unknown },
349
{ "lv.cust3",  "",             "00 0xA  ----- ----- ---- ---- 0xE ----", EFI, 0,
350
  it_unknown },
351
{ "lv.cust4",  "",             "00 0xA  ----- ----- ---- ---- 0xF ----", EFI, 0,
352
  it_unknown },
353 676 markom
 
354 1346 nogj
{ "l.jr",      "rB",           "01 0x1  ----- ----- BBBB B--- ---- ----",
355
  EF(l_jr), OR32_IF_DELAY, it_jump },
356
{ "l.jalr",    "rB",           "01 0x2  ----- ----- BBBB B--- ---- ----",
357
  EF(l_jalr), OR32_IF_DELAY, it_jump },
358 1384 nogj
{ "l.maci",    "rA,I",         "01 0x3  IIIII ----- AAAA AIII IIII IIII",
359 1346 nogj
  EF(l_mac), 0, it_mac },
360
{ "l.cust1",   "",             "01 0xC  ----- ----- ---- ---- ---- ----",
361
  EF(l_cust1), 0, it_unknown },
362
{ "l.cust2",   "",             "01 0xD  ----- ----- ---- ---- ---- ----",
363
  EF(l_cust2), 0, it_unknown },
364
{ "l.cust3",   "",             "01 0xE  ----- ----- ---- ---- ---- ----",
365
  EF(l_cust3), 0, it_unknown },
366
{ "l.cust4",   "",             "01 0xF  ----- ----- ---- ---- ---- ----",
367
  EF(l_cust4), 0, it_unknown },
368 133 markom
 
369 1346 nogj
{ "l.ld",      "rD,I(rA)",     "10 0x0  DDDDD AAAAA IIII IIII IIII IIII", EFI,
370
  0, it_load },
371
{ "l.lwz",     "rD,I(rA)",     "10 0x1  DDDDD AAAAA IIII IIII IIII IIII",
372
  EF(l_lwz), 0, it_load },
373
{ "l.lws",     "rD,I(rA)",     "10 0x2  DDDDD AAAAA IIII IIII IIII IIII", EFI,
374
  0, it_load },
375
{ "l.lbz",     "rD,I(rA)",     "10 0x3  DDDDD AAAAA IIII IIII IIII IIII",
376
  EF(l_lbz), 0, it_load },
377
{ "l.lbs",     "rD,I(rA)",     "10 0x4  DDDDD AAAAA IIII IIII IIII IIII",
378
  EF(l_lbs), 0, it_load },
379
{ "l.lhz",     "rD,I(rA)",     "10 0x5  DDDDD AAAAA IIII IIII IIII IIII",
380
  EF(l_lhz), 0, it_load },
381
{ "l.lhs",     "rD,I(rA)",     "10 0x6  DDDDD AAAAA IIII IIII IIII IIII",
382
  EF(l_lhs), 0, it_load },
383 133 markom
 
384 1346 nogj
{ "l.addi",    "rD,rA,I",      "10 0x7  DDDDD AAAAA IIII IIII IIII IIII",
385
  EF(l_add), OR32_W_FLAG, it_arith },
386
{ "l.addic",   "rD,rA,I",      "10 0x8  DDDDD AAAAA IIII IIII IIII IIII", EFI,
387
  0, it_arith },
388
{ "l.andi",    "rD,rA,K",      "10 0x9  DDDDD AAAAA KKKK KKKK KKKK KKKK",
389
  EF(l_and), OR32_W_FLAG, it_arith },
390
{ "l.ori",     "rD,rA,K",      "10 0xA  DDDDD AAAAA KKKK KKKK KKKK KKKK",
391
  EF(l_or), 0, it_arith },
392
{ "l.xori",    "rD,rA,I",      "10 0xB  DDDDD AAAAA IIII IIII IIII IIII",
393
  EF(l_xor), 0, it_arith },
394
{ "l.muli",    "rD,rA,I",      "10 0xC  DDDDD AAAAA IIII IIII IIII IIII",
395
  EF(l_mul), 0, it_arith },
396
{ "l.mfspr",   "rD,rA,K",      "10 0xD  DDDDD AAAAA KKKK KKKK KKKK KKKK",
397
  EF(l_mfspr), 0, it_move },
398
{ "l.slli",    "rD,rA,L",      "10 0xE  DDDDD AAAAA ---- ---- 00LL LLLL",
399
  EF(l_sll), 0, it_shift },
400
{ "l.srli",    "rD,rA,L",      "10 0xE  DDDDD AAAAA ---- ---- 01LL LLLL",
401
  EF(l_srl), 0, it_shift },
402
{ "l.srai",    "rD,rA,L",      "10 0xE  DDDDD AAAAA ---- ---- 10LL LLLL",
403
  EF(l_sra), 0, it_shift },
404
{ "l.rori",    "rD,rA,L",      "10 0xE  DDDDD AAAAA ---- ---- 11LL LLLL", EFI,
405
  0, it_shift },
406 133 markom
 
407 1346 nogj
{ "l.sfeqi",   "rA,I",         "10 0xF  00000 AAAAA IIII IIII IIII IIII",
408
  EF(l_sfeq), OR32_W_FLAG, it_compare },
409
{ "l.sfnei",   "rA,I",         "10 0xF  00001 AAAAA IIII IIII IIII IIII",
410
  EF(l_sfne), OR32_W_FLAG, it_compare },
411
{ "l.sfgtui",  "rA,I",         "10 0xF  00010 AAAAA IIII IIII IIII IIII",
412
  EF(l_sfgtu), OR32_W_FLAG, it_compare },
413
{ "l.sfgeui",  "rA,I",         "10 0xF  00011 AAAAA IIII IIII IIII IIII",
414
  EF(l_sfgeu), OR32_W_FLAG, it_compare },
415
{ "l.sfltui",  "rA,I",         "10 0xF  00100 AAAAA IIII IIII IIII IIII",
416
  EF(l_sfltu), OR32_W_FLAG, it_compare },
417
{ "l.sfleui",  "rA,I",         "10 0xF  00101 AAAAA IIII IIII IIII IIII",
418
  EF(l_sfleu), OR32_W_FLAG, it_compare },
419
{ "l.sfgtsi",  "rA,I",         "10 0xF  01010 AAAAA IIII IIII IIII IIII",
420
  EF(l_sfgts), OR32_W_FLAG, it_compare },
421
{ "l.sfgesi",  "rA,I",         "10 0xF  01011 AAAAA IIII IIII IIII IIII",
422
  EF(l_sfges), OR32_W_FLAG, it_compare },
423
{ "l.sfltsi",  "rA,I",         "10 0xF  01100 AAAAA IIII IIII IIII IIII",
424
  EF(l_sflts), OR32_W_FLAG, it_compare },
425
{ "l.sflesi",  "rA,I",         "10 0xF  01101 AAAAA IIII IIII IIII IIII",
426
  EF(l_sfles), OR32_W_FLAG, it_compare },
427 133 markom
 
428 1346 nogj
{ "l.mtspr",   "rA,rB,K",      "11 0x0  KKKKK AAAAA BBBB BKKK KKKK KKKK",
429
  EF(l_mtspr), 0, it_move },
430
{ "l.mac",     "rA,rB",        "11 0x1  ----- AAAAA BBBB B--- ---- 0x1",
431
  EF(l_mac), 0, it_mac },
432
{ "l.msb",     "rA,rB",        "11 0x1  ----- AAAAA BBBB B--- ---- 0x2",
433
  EF(l_msb), 0, it_mac },
434 133 markom
 
435 1346 nogj
{ "lf.add.s",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x0 0x0",
436
  EF(lf_add_s), 0, it_float },
437
{ "lf.sub.s",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x0 0x1",
438
  EF(lf_sub_s), 0, it_float },
439
{ "lf.mul.s",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x0 0x2",
440
  EF(lf_mul_s), 0, it_float },
441
{ "lf.div.s",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x0 0x3",
442
  EF(lf_div_s), 0, it_float },
443
{ "lf.itof.s",  "rD,rA",       "11 0x2  DDDDD AAAAA 0000 0--- 0x0 0x4",
444
  EF(lf_itof_s), 0, it_float },
445
{ "lf.ftoi.s",  "rD,rA",       "11 0x2  DDDDD AAAAA 0000 0--- 0x0 0x5",
446
  EF(lf_ftoi_s), 0, it_float },
447
{ "lf.rem.s",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x0 0x6",
448
  EF(lf_rem_s), 0, it_float },
449
{ "lf.madd.s",  "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x0 0x7",
450
  EF(lf_madd_s), 0, it_float },
451
{ "lf.sfeq.s",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x0 0x8",
452
  EF(lf_sfeq_s), 0, it_float },
453
{ "lf.sfne.s",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x0 0x9",
454
  EF(lf_sfne_s), 0, it_float },
455
{ "lf.sfgt.s",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x0 0xA",
456
  EF(lf_sfgt_s), 0, it_float },
457
{ "lf.sfge.s",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x0 0xB",
458
  EF(lf_sfge_s), 0, it_float },
459
{ "lf.sflt.s",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x0 0xC",
460
  EF(lf_sflt_s), 0, it_float },
461
{ "lf.sfle.s",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x0 0xD",
462
  EF(lf_sfle_s), 0, it_float },
463
{ "lf.cust1.s", "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0xD ----", EFI,
464
  0, it_float },
465 133 markom
 
466 1346 nogj
{ "lf.add.d",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x1 0x0", EFI, 0,
467
  it_float },
468
{ "lf.sub.d",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x1 0x1", EFI, 0,
469
  it_float },
470
{ "lf.mul.d",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x1 0x2", EFI, 0,
471
  it_float },
472
{ "lf.div.d",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x1 0x3", EFI, 0,
473
  it_float },
474
{ "lf.itof.d",  "rD,rA",       "11 0x2  DDDDD AAAAA 0000 0--- 0x1 0x4", EFI, 0,
475
  it_float },
476
{ "lf.ftoi.d",  "rD,rA",       "11 0x2  DDDDD AAAAA 0000 0--- 0x1 0x5", EFI, 0,
477
  it_float },
478
{ "lf.rem.d",   "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x1 0x6", EFI, 0,
479
  it_float },
480
{ "lf.madd.d",  "rD,rA,rB",    "11 0x2  DDDDD AAAAA BBBB B--- 0x1 0x7", EFI, 0,
481
  it_float },
482
{ "lf.sfeq.d",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x1 0x8", EFI, 0,
483
  it_float },
484
{ "lf.sfne.d",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x1 0x9", EFI, 0,
485
  it_float },
486
{ "lf.sfgt.d",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x1 0xA", EFI, 0,
487
  it_float },
488
{ "lf.sfge.d",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x1 0xB", EFI, 0,
489
  it_float },
490
{ "lf.sflt.d",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x1 0xC", EFI, 0,
491
  it_float },
492
{ "lf.sfle.d",  "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0x1 0xD", EFI, 0,
493
  it_float },
494
{ "lf.cust1.d", "rA,rB",       "11 0x2  ----- AAAAA BBBB B--- 0xE ----", EFI, 0,
495
  it_float },
496 676 markom
 
497 1346 nogj
{ "l.sd",      "I(rD),rB",     "11 0x4  IIIII DDDDD BBBB BIII IIII IIII", EFI,
498
  0, it_store },
499
{ "l.sw",      "I(rD),rB",     "11 0x5  IIIII DDDDD BBBB BIII IIII IIII",
500
  EF(l_sw), 0, it_store },
501
{ "l.sb",      "I(rD),rB",     "11 0x6  IIIII DDDDD BBBB BIII IIII IIII",
502
  EF(l_sb), 0, it_store },
503
{ "l.sh",      "I(rD),rB",     "11 0x7  IIIII DDDDD BBBB BIII IIII IIII",
504
  EF(l_sh), 0, it_store },
505 1295 lampret
 
506 1346 nogj
{ "l.add",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0x0",
507
  EF(l_add), OR32_W_FLAG, it_arith },
508
{ "l.addc",    "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0x1",
509
  EF(l_addc), OR32_W_FLAG, it_arith },
510
{ "l.sub",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0x2",
511
  EF(l_sub), 0, it_arith },
512
{ "l.and",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0x3",
513
  EF(l_and), OR32_W_FLAG, it_arith },
514
{ "l.or",      "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0x4",
515
  EF(l_or), 0, it_arith },
516
{ "l.xor",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0x5",
517
  EF(l_xor), 0, it_arith },
518
{ "l.mul",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-11 ---- 0x6",
519
  EF(l_mul), 0, it_arith },
520 1295 lampret
 
521 1346 nogj
{ "l.sll",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 00-- 0x8",
522
  EF(l_sll), 0, it_shift },
523
{ "l.srl",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 01-- 0x8",
524
  EF(l_srl), 0, it_shift },
525
{ "l.sra",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 10-- 0x8",
526
  EF(l_sra), 0, it_shift },
527
{ "l.ror",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 11-- 0x8", EFI,
528
  0, it_shift },
529
{ "l.div",     "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-11 ---- 0x9",
530
  EF(l_div), 0, it_arith },
531
{ "l.divu",    "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-11 ---- 0xA",
532
  EF(l_divu), 0, it_arith },
533
{ "l.mulu",    "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-11 ---- 0xB", EFI,
534
  0, it_arith },
535
{ "l.extbs",   "rD,rA",     "11 0x8  DDDDD AAAAA ---- --00 01-- 0xC",
536
  EF(l_extbs), 0, it_move },
537
{ "l.exths",   "rD,rA",     "11 0x8  DDDDD AAAAA ---- --00 00-- 0xC",
538
  EF(l_exths), 0, it_move },
539
{ "l.extws",   "rD,rA",     "11 0x8  DDDDD AAAAA ---- --00 00-- 0xD",
540
  EF(l_extws), 0, it_move },
541
{ "l.extbz",   "rD,rA",     "11 0x8  DDDDD AAAAA ---- --00 11-- 0xC",
542
  EF(l_extbz), 0, it_move },
543
{ "l.exthz",   "rD,rA",     "11 0x8  DDDDD AAAAA ---- --00 10-- 0xC",
544
  EF(l_exthz), 0, it_move },
545
{ "l.extwz",   "rD,rA",     "11 0x8  DDDDD AAAAA ---- --00 01-- 0xD",
546
  EF(l_extwz), 0, it_move },
547
{ "l.cmov",    "rD,rA,rB",     "11 0x8  DDDDD AAAAA BBBB B-00 ---- 0xE",
548
  EF(l_cmov), OR32_R_FLAG, it_move },
549 1384 nogj
{ "l.ff1",     "rD,rA",     "11 0x8  DDDDD AAAAA ---- --00 ---- 0xF", EFI, 0,
550
  it_arith },
551 133 markom
 
552 1346 nogj
{ "l.sfeq",    "rA,rB",        "11 0x9  00000 AAAAA BBBB B--- ---- ----",
553
  EF(l_sfeq), OR32_W_FLAG, it_compare },
554
{ "l.sfne",    "rA,rB",        "11 0x9  00001 AAAAA BBBB B--- ---- ----",
555
  EF(l_sfne), OR32_W_FLAG, it_compare },
556
{ "l.sfgtu",   "rA,rB",        "11 0x9  00010 AAAAA BBBB B--- ---- ----",
557
  EF(l_sfgtu), OR32_W_FLAG, it_compare },
558
{ "l.sfgeu",   "rA,rB",        "11 0x9  00011 AAAAA BBBB B--- ---- ----",
559
  EF(l_sfgeu), OR32_W_FLAG, it_compare },
560
{ "l.sfltu",   "rA,rB",        "11 0x9  00100 AAAAA BBBB B--- ---- ----",
561
  EF(l_sfltu), OR32_W_FLAG, it_compare },
562
{ "l.sfleu",   "rA,rB",        "11 0x9  00101 AAAAA BBBB B--- ---- ----",
563
  EF(l_sfleu), OR32_W_FLAG, it_compare },
564
{ "l.sfgts",   "rA,rB",        "11 0x9  01010 AAAAA BBBB B--- ---- ----",
565
  EF(l_sfgts), OR32_W_FLAG, it_compare },
566
{ "l.sfges",   "rA,rB",        "11 0x9  01011 AAAAA BBBB B--- ---- ----",
567
  EF(l_sfges), OR32_W_FLAG, it_compare },
568
{ "l.sflts",   "rA,rB",        "11 0x9  01100 AAAAA BBBB B--- ---- ----",
569
  EF(l_sflts), OR32_W_FLAG, it_compare },
570
{ "l.sfles",   "rA,rB",        "11 0x9  01101 AAAAA BBBB B--- ---- ----",
571
  EF(l_sfles), OR32_W_FLAG, it_compare },
572 676 markom
 
573 1346 nogj
{ "l.cust5",   "rD,rA,rB,L,K", "11 0xC  DDDDD AAAAA BBBB BLLL LLLK KKKK", EFI,
574
  0, it_unknown },
575
{ "l.cust6",   "",             "11 0xD  ----- ----- ---- ---- ---- ----", EFI,
576
  0, it_unknown },
577
{ "l.cust7",   "",             "11 0xE  ----- ----- ---- ---- ---- ----", EFI,
578
  0, it_unknown },
579
{ "l.cust8",   "",             "11 0xF  ----- ----- ---- ---- ---- ----", EFI,
580
  0, it_unknown },
581 133 markom
 
582 221 markom
/* This section should not be defined in or1ksim, since it contains duplicates,
583
   which would cause machine builder to complain.  */
584 374 simons
#ifdef HAS_CUST
585 1346 nogj
{ "l.cust5_1",   "rD",         "11 0xC  DDDDD ----- ---- ---- ---- ----", EFI,
586
  0, it_unknown },
587
{ "l.cust5_2",   "rD,rA"   ,   "11 0xC  DDDDD AAAAA ---- ---- ---- ----", EFI,
588
  0, it_unknown },
589
{ "l.cust5_3",   "rD,rA,rB",   "11 0xC  DDDDD AAAAA BBBB B--- ---- ----", EFI,
590
  0, it_unknown },
591 221 markom
 
592 1346 nogj
{ "l.cust6_1",   "rD",         "11 0xD  DDDDD ----- ---- ---- ---- ----", EFI,
593
  0, it_unknown },
594
{ "l.cust6_2",   "rD,rA"   ,   "11 0xD  DDDDD AAAAA ---- ---- ---- ----", EFI,
595
  0, it_unknown },
596
{ "l.cust6_3",   "rD,rA,rB",   "11 0xD  DDDDD AAAAA BBBB B--- ---- ----", EFI,
597
  0, it_unknown },
598 221 markom
 
599 1346 nogj
{ "l.cust7_1",   "rD",         "11 0xE  DDDDD ----- ---- ---- ---- ----", EFI,
600
  0, it_unknown },
601
{ "l.cust7_2",   "rD,rA"   ,   "11 0xE  DDDDD AAAAA ---- ---- ---- ----", EFI,
602
  0, it_unknown },
603
{ "l.cust7_3",   "rD,rA,rB",   "11 0xE  DDDDD AAAAA BBBB B--- ---- ----", EFI,
604
  0, it_unknown },
605 221 markom
 
606 1346 nogj
{ "l.cust8_1",   "rD",         "11 0xF  DDDDD ----- ---- ---- ---- ----", EFI,
607
  0, it_unknown },
608
{ "l.cust8_2",   "rD,rA"   ,   "11 0xF  DDDDD AAAAA ---- ---- ---- ----", EFI,
609
  0, it_unknown },
610
{ "l.cust8_3",   "rD,rA,rB",   "11 0xF  DDDDD AAAAA BBBB B--- ---- ----", EFI,
611
  0, it_unknown },
612 221 markom
#endif
613
 
614 1346 nogj
{ "", "", "", EFI, 0, 0 }  /* Dummy entry, not included in num_opcodes.  This
615
                            * lets code examine entry i+1 without checking
616
                            * if we've run off the end of the table.  */
617 133 markom
};
618
 
619
#undef EFI
620
#undef EFN
621
#undef EF 
622
 
623
/* **INDENT-ON** */
624
 
625 371 markom
/* Define dummy, if debug is not defined.  */
626 1341 nogj
#ifndef HAS_DEBUG
627
#define debug(l, fmt...) ;
628 371 markom
#endif
629 133 markom
 
630 371 markom
CONST int num_opcodes = ((sizeof(or32_opcodes)) / (sizeof(struct or32_opcode))) - 1;
631
 
632 138 markom
/* Calculates instruction length in bytes. Always 4 for OR32. */
633
int
634
insn_len(int insn_index)
635 133 markom
{
636
  insn_index = 0; /* Just to get rid that warning.  */
637
  return 4;
638
}
639
 
640
/* Is individual insn's operand signed or unsigned? */
641 138 markom
int
642
letter_signed(char l)
643 133 markom
{
644
  CONST struct or32_letter *pletter;
645
 
646
  for(pletter = or32_letters; pletter->letter != '\0'; pletter++)
647
    if (pletter->letter == l)
648
      return pletter->sign;
649
 
650
  printf("letter_signed(%c): Unknown letter.\n", l);
651
  return 0;
652
}
653
 
654 703 markom
/* Simple cache for letter ranges */
655
static int range_cache[256] = {0};
656
 
657 133 markom
/* Number of letters in the individual lettered operand. */
658 138 markom
int
659
letter_range(char l)
660 133 markom
{
661
  CONST struct or32_opcode *pinsn;
662
  char *enc;
663
  int range = 0;
664 703 markom
 
665
  /* Is value cached? */
666 1308 phoenix
  if ((range = range_cache[(unsigned char)l])) return range;
667 133 markom
 
668 138 markom
  for(pinsn = or32_opcodes; strlen(pinsn->name); pinsn++)
669
    {
670
      if (strchr(pinsn->encoding,l))
671
        {
672
          for (enc = pinsn->encoding; *enc != '\0'; enc++)
673
            if ((*enc == '0') && (*(enc+1) == 'x'))
674
              enc += 2;
675
            else if (*enc == l)
676
              range++;
677 703 markom
          return range_cache[(unsigned char)l] = range;
678 133 markom
        }
679
    }
680 703 markom
 
681 133 markom
  printf("\nABORT: letter_range(%c): Never used letter.\n", l);
682
  exit(1);
683
}
684
 
685
/* MM: Returns index of given instruction name.  */
686 138 markom
int
687
insn_index (char *insn)
688
{
689 133 markom
  int i, found = -1;
690 371 markom
  for (i = 0; i < num_opcodes; i++)
691 138 markom
    if (!strcmp (or32_opcodes[i].name, insn))
692
      {
693
        found = i;
694
        break;
695
      }
696 133 markom
  return found;
697
}
698
 
699 717 markom
/* Returns name of the specified instruction index */
700
CONST char *
701
insn_name(int index)
702 138 markom
{
703 371 markom
  if (index >= 0 && index < num_opcodes)
704 133 markom
    return or32_opcodes[index].name;
705
  else
706
    return "???";
707
}
708
 
709 1342 nogj
#if defined(HAS_EXECUTION) && SIMPLE_EXECUTION
710 717 markom
void
711 1342 nogj
l_none(struct iqueue_entry *current)
712
{
713
}
714 1452 nogj
#elif defined(HAS_EXECUTION) && DYNAMIC_EXECUTION
715
void
716
l_none(struct op_queue *opq, int *param_t, orreg_t *param, int delay_slot)
717
{
718
}
719 1342 nogj
#else
720
void
721 717 markom
l_none()
722 138 markom
{
723 133 markom
}
724 1342 nogj
#endif
725 133 markom
 
726
/*** Finite automata for instruction decoding building code ***/
727
 
728 1341 nogj
/* Find symbols in encoding.  */
729 706 markom
unsigned long
730 133 markom
insn_extract(param_ch, enc_initial)
731
     char param_ch;
732
     char *enc_initial;
733
{
734
  char *enc;
735
  unsigned long ret = 0;
736
  unsigned opc_pos = 32;
737
  for (enc = enc_initial; *enc != '\0'; )
738
    if ((*enc == '0') && (*(enc+1) == 'x'))
739
      {
740
        unsigned long tmp = strtol(enc+2, NULL, 16);
741
        opc_pos -= 4;
742 138 markom
        if (param_ch == '0' || param_ch == '1')
743
          {
744
            if (param_ch == '0')
745
              tmp = 15 - tmp;
746
            ret |= tmp << opc_pos;
747
          }
748 133 markom
        enc += 3;
749
      }
750 138 markom
    else
751
      {
752
        if (*enc == '0' || *enc == '1' || *enc == '-' || isalpha(*enc) )
753
          {
754
            opc_pos--;
755
            if (param_ch == *enc)
756
              ret |= 1 << opc_pos;
757
          }
758
        enc++;
759 133 markom
      }
760
  return ret;
761
}
762
 
763 138 markom
#define MAX_AUTOMATA_SIZE (1200)
764
#define MAX_OP_TABLE_SIZE (1200)
765 133 markom
#define MAX_LEN           (8)
766
 
767
#ifndef MIN
768
# define MIN(x,y)          ((x) < (y) ? (x) : (y))
769
#endif
770
 
771
unsigned long *automata;
772
int nuncovered;
773
int curpass = 0;
774
 
775 1341 nogj
/* MM: Struct that holds runtime build information about instructions.  */
776 1342 nogj
struct temp_insn_struct *ti;
777 138 markom
 
778
struct insn_op_struct *op_data, **op_start;
779
 
780
/* Recursive utility function used to find best match and to build automata.  */
781
 
782
static unsigned long *
783
cover_insn (unsigned long *cur, int pass, unsigned int mask)
784
{
785 133 markom
  int best_first = 0, best_len = 0, i, last_match = -1, ninstr = 0;
786
  unsigned long cur_mask = mask;
787
  unsigned long *next;
788
 
789
  for (i = 0; i < num_opcodes; i++)
790 138 markom
    if (ti[i].in_pass == pass)
791
      {
792
        cur_mask &= ti[i].insn_mask;
793
        ninstr++;
794
        last_match = i;
795
      }
796
 
797 344 markom
  debug(8, "%08X %08X\n", mask, cur_mask);
798 138 markom
  if (ninstr == 0)
799
    return 0;
800
  if (ninstr == 1)
801
    {
802
      /* Leaf holds instruction index. */
803 344 markom
      debug(8, "%i>I%i %s\n", cur - automata, last_match, or32_opcodes[last_match].name);
804 138 markom
      *cur = LEAF_FLAG | last_match;
805
      cur++;
806
      nuncovered--;
807
    } else {
808
      /* Find longest match.  */
809
      for (i = 0; i < 32; i++)
810
        {
811
          int len;
812
          for (len = best_len + 1; len < MIN(MAX_LEN, 33 - i); len++)
813
            {
814
              unsigned long m = (1UL << ((unsigned long)len)) - 1;
815 344 markom
              debug(9, " (%i(%08X & %08X>>%i = %08X, %08X)",len,m, cur_mask, i, (cur_mask >> (unsigned)i), (cur_mask >> (unsigned)i) & m);
816 138 markom
              if ((m & (cur_mask >> (unsigned)i)) == m)
817
                {
818
                  best_len = len;
819
                  best_first = i;
820 344 markom
                  debug(9, "!");
821 138 markom
                }
822
              else
823
                break;
824
            }
825
        }
826 344 markom
      debug(9, "\n");
827 138 markom
      if (!best_len)
828
        {
829
          fprintf (stderr, "%i instructions match mask 0x%08X:\n", ninstr, mask);
830
          for (i = 0; i < num_opcodes; i++)
831
            if (ti[i].in_pass == pass)
832
              fprintf (stderr, "%s ", or32_opcodes[i].name);
833
 
834
          fprintf (stderr, "\n");
835
          exit (1);
836
        }
837 344 markom
      debug(8, "%i> #### %i << %i (%i) ####\n", cur - automata, best_len, best_first, ninstr);
838 138 markom
      *cur = best_first;
839
      cur++;
840
      *cur = (1 << best_len) - 1;
841
      cur++;
842
      next = cur;
843
      /* Allocate space for pointers.  */
844
      cur += 1 << best_len;
845
      cur_mask = (1 << (unsigned long)best_len) - 1;
846
 
847
      for (i = 0; i < (1 << (unsigned long)best_len); i++)
848
        {
849
          int j;
850
          unsigned long *c;
851
          curpass++;
852
          for (j = 0; j < num_opcodes; j++)
853
            if (ti[j].in_pass == pass
854 371 markom
                && ((ti[j].insn >> best_first) & cur_mask) == (unsigned long) i
855 138 markom
                && ((ti[j].insn_mask >> best_first) & cur_mask) == cur_mask)
856
              ti[j].in_pass = curpass;
857
 
858 344 markom
          debug(9, "%08X %08X %i\n", mask, cur_mask, best_first);
859 138 markom
          c = cover_insn (cur, curpass, mask & (~(cur_mask << best_first)));
860
          if (c)
861
            {
862 344 markom
              debug(8, "%i> #%X -> %u\n", next - automata, i, cur - automata);
863 138 markom
              *next = cur - automata;
864
              cur = c;
865
            }
866
          else
867
            {
868 344 markom
              debug(8, "%i> N/A\n", next - automata);
869 138 markom
              *next = 0;
870
            }
871
          next++;
872
        }
873 133 markom
    }
874 138 markom
  return cur;
875
}
876 133 markom
 
877 138 markom
/* Returns number of nonzero bits. */
878
static int
879
num_ones (unsigned long value)
880
{
881
  int c = 0;
882
  while (value)
883
    {
884
      if (value & 1)
885
        c++;
886
      value >>= 1;
887 133 markom
    }
888 138 markom
  return c;
889
}
890 133 markom
 
891 138 markom
/* Utility function, which converts parameters from or32_opcode format to more binary form.
892
   Parameters are stored in ti struct.  */
893
 
894
static struct insn_op_struct *
895
parse_params (CONST struct or32_opcode *opcode, struct insn_op_struct *cur)
896
{
897
  char *args = opcode->args;
898
  int i, type;
899 1346 nogj
  int num_cur_op = 0;;
900 138 markom
 
901
  i = 0;
902
  type = 0;
903 262 markom
  /* In case we don't have any parameters, we add dummy read from r0.  */
904
  if (!(*args)) {
905 263 markom
    cur->type = OPTYPE_REG | OPTYPE_OP | OPTYPE_LAST;
906 262 markom
    cur->data = 0;
907 355 markom
    debug(9, "#%08X %08X\n", cur->type, cur->data);
908 262 markom
    cur++;
909
    return cur;
910
  }
911
 
912 138 markom
  while (*args != '\0')
913
    {
914
      if (*args == 'r')
915
        {
916
          args++;
917
          type |= OPTYPE_REG;
918 1341 nogj
          if(args[1] == 'D')
919
            type |= OPTYPE_DST;
920 133 markom
        }
921 138 markom
      else if (isalpha (*args))
922
        {
923
          unsigned long arg;
924
          arg = insn_extract(*args, opcode->encoding);
925 355 markom
          debug(9, "%s : %08X ------\n", opcode->name, arg);
926 138 markom
          if (letter_signed (*args))
927
            {
928
              type |= OPTYPE_SIG;
929
              type |= ((num_ones (arg) - 1) << OPTYPE_SBIT_SHR) & OPTYPE_SBIT;
930
            }
931
 
932 1346 nogj
          num_cur_op = 0;
933 138 markom
          /* Split argument to sequences of consecutive ones.  */
934
          while (arg)
935
            {
936
              int shr = 0;
937
              unsigned long tmp = arg, mask = 0;
938
              while ((tmp & 1) == 0)
939
                {
940
                  shr++;
941
                  tmp >>= 1;
942
                }
943
              while (tmp & 1)
944
                {
945
                  mask++;
946
                  tmp >>= 1;
947
                }
948
              cur->type = type | shr;
949
              cur->data = mask;
950
              arg &= ~(((1 << mask) - 1) << shr);
951 355 markom
              debug(6, "|%08X %08X\n", cur->type, cur->data);
952 138 markom
              cur++;
953 1346 nogj
              num_cur_op++;
954 138 markom
            }
955
          args++;
956
        }
957
      else if (*args == '(')
958
        {
959
          /* Next param is displacement.  Later we will treat them as one operand.  */
960 1346 nogj
          /* Set the OPTYPE_DIS flag on all insn_op_structs that belong to this
961
           * operand */
962
          while(num_cur_op > 0) {
963
            cur[-num_cur_op].type |= type | OPTYPE_DIS;
964
            num_cur_op--;
965
          }
966
          cur[-1].type |= OPTYPE_OP;
967 355 markom
          debug(9, ">%08X %08X\n", cur->type, cur->data);
968 138 markom
          type = 0;
969
          i++;
970
          args++;
971
        }
972
      else if (*args == OPERAND_DELIM)
973
        {
974
          cur--;
975
          cur->type = type | cur->type | OPTYPE_OP;
976 355 markom
          debug(9, ">%08X %08X\n", cur->type, cur->data);
977 138 markom
          cur++;
978
          type = 0;
979
          i++;
980
          args++;
981
        }
982
      else if (*args == '0')
983
        {
984
          cur->type = type;
985
          cur->data = 0;
986 355 markom
          debug(9, ">%08X %08X\n", cur->type, cur->data);
987 138 markom
          cur++;
988
          type = 0;
989
          i++;
990
          args++;
991
        }
992
      else if (*args == ')')
993
        args++;
994
      else
995
        {
996
          fprintf (stderr, "%s : parse error in args.\n", opcode->name);
997
          exit (1);
998
        }
999 133 markom
    }
1000 138 markom
  cur--;
1001
  cur->type = type | cur->type | OPTYPE_OP | OPTYPE_LAST;
1002 355 markom
  debug(9, "#%08X %08X\n", cur->type, cur->data);
1003 138 markom
  cur++;
1004 133 markom
  return cur;
1005
}
1006
 
1007 138 markom
/* Constructs new automata based on or32_opcodes array.  */
1008
 
1009
void
1010
build_automata()
1011
{
1012 371 markom
  int i;
1013 133 markom
  unsigned long *end;
1014 138 markom
  struct insn_op_struct *cur;
1015
 
1016 133 markom
  automata = (unsigned long *) malloc (MAX_AUTOMATA_SIZE * sizeof (unsigned long));
1017 138 markom
  ti = (struct temp_insn_struct *) malloc (sizeof (struct temp_insn_struct) * num_opcodes);
1018 133 markom
 
1019
  nuncovered = num_opcodes;
1020 709 markom
 
1021
#ifdef HAS_EXECUTION
1022 138 markom
  printf("Building automata... ");
1023 709 markom
#endif
1024
 
1025 133 markom
  /* Build temporary information about instructions.  */
1026 138 markom
  for (i = 0; i < num_opcodes; i++)
1027
    {
1028
      unsigned long ones, zeros;
1029
      char *encoding = or32_opcodes[i].encoding;
1030
      ones  = insn_extract('1', encoding);
1031
      zeros = insn_extract('0', encoding);
1032
      ti[i].insn_mask = ones | zeros;
1033
      ti[i].insn = ones;
1034
      ti[i].in_pass = curpass = 0;
1035 344 markom
      /*debug(9, "%s: %s %08X %08X\n", or32_opcodes[i].name,
1036 138 markom
        or32_opcodes[i].encoding, ti[i].insn_mask, ti[i].insn);*/
1037
    }
1038 133 markom
 
1039
  /* Until all are covered search for best criteria to separate them.  */
1040 138 markom
  end = cover_insn (automata, curpass, 0xFFFFFFFF);
1041
  if (end - automata > MAX_AUTOMATA_SIZE)
1042
    {
1043
      fprintf (stderr, "Automata too large. Increase MAX_AUTOMATA_SIZE.");
1044
      exit (1);
1045
    }
1046 709 markom
#ifdef HAS_EXECUTION
1047 138 markom
  printf("done, num uncovered: %i/%i.\n", nuncovered, num_opcodes);
1048 709 markom
#endif
1049 371 markom
 
1050 709 markom
#ifdef HAS_EXECUTION
1051 138 markom
  printf("Parsing operands data... ");
1052 709 markom
#endif
1053 138 markom
  op_data = (struct insn_op_struct *) malloc (MAX_OP_TABLE_SIZE * sizeof (struct insn_op_struct));
1054
  op_start = (struct insn_op_struct **) malloc (num_opcodes * sizeof (struct insn_op_struct *));
1055
  cur = op_data;
1056
  for (i = 0; i < num_opcodes; i++)
1057
    {
1058
      op_start[i] = cur;
1059
      cur = parse_params (&or32_opcodes[i], cur);
1060
      if (cur - op_data > MAX_OP_TABLE_SIZE)
1061
        {
1062
          fprintf (stderr, "Operands table too small, increase MAX_OP_TABLE_SIZE.\n");
1063
          exit (1);
1064
        }
1065
    }
1066 709 markom
#ifdef HAS_EXECUTION
1067 138 markom
  printf("done.\n");
1068 709 markom
#endif
1069 133 markom
}
1070
 
1071 138 markom
void destruct_automata ()
1072
{
1073
  free (ti);
1074 133 markom
  free (automata);
1075 138 markom
  free (op_data);
1076
  free (op_start);
1077 133 markom
}
1078
 
1079
/* Decodes instruction and returns instruction index.  */
1080 138 markom
int insn_decode (unsigned int insn)
1081
{
1082 133 markom
  unsigned long *a = automata;
1083 138 markom
  int i;
1084
  while (!(*a & LEAF_FLAG))
1085
    {
1086
      unsigned int first = *a;
1087 703 markom
      //debug(9, "%i ", a - automata);
1088 138 markom
      a++;
1089
      i = (insn >> first) & *a;
1090
      a++;
1091
      if (!*(a + i))
1092
        { /* Invalid instruction found?  */
1093 703 markom
          //debug(9, "XXX\n", i);
1094 138 markom
          return -1;
1095
        }
1096
      a = automata + *(a + i);
1097
    }
1098
  i = *a & ~LEAF_FLAG;
1099 703 markom
  //debug(9, "%i\n", i);
1100 138 markom
  /* Final check - do we have direct match?
1101
     (based on or32_opcodes this should be the only possibility,
1102
     but in case of invalid/missing instruction we must perform a check)  */
1103
  if ((ti[i].insn_mask & insn) == ti[i].insn)
1104
    return i;
1105
  else
1106
    return -1;
1107 133 markom
}
1108 371 markom
 
1109
static char disassembled_str[50];
1110
char *disassembled = &disassembled_str[0];
1111
 
1112
/* Automagically does zero- or sign- extension and also finds correct
1113
   sign bit position if sign extension is correct extension. Which extension
1114
   is proper is figured out from letter description. */
1115
 
1116 879 markom
unsigned long
1117 371 markom
extend_imm(unsigned long imm, char l)
1118
{
1119
  unsigned long mask;
1120
  int letter_bits;
1121
 
1122
  /* First truncate all bits above valid range for this letter
1123
     in case it is zero extend. */
1124
  letter_bits = letter_range(l);
1125
  mask = (1 << letter_bits) - 1;
1126
  imm &= mask;
1127
 
1128
  /* Do sign extend if this is the right one. */
1129
  if (letter_signed(l) && (imm >> (letter_bits - 1)))
1130
    imm |= (~mask);
1131
 
1132
  return imm;
1133
}
1134
 
1135 879 markom
unsigned long
1136 371 markom
or32_extract(param_ch, enc_initial, insn)
1137
     char param_ch;
1138
     char *enc_initial;
1139
     unsigned long insn;
1140
{
1141
  char *enc;
1142
  unsigned long ret = 0;
1143
  int opc_pos = 0;
1144
  int param_pos = 0;
1145
 
1146
  for (enc = enc_initial; *enc != '\0'; enc++)
1147
    if (*enc == param_ch)
1148
      {
1149
        if (enc - 2 >= enc_initial && (*(enc - 2) == '0') && (*(enc - 1) == 'x'))
1150
          continue;
1151
        else
1152
          param_pos++;
1153
      }
1154
 
1155
#if DEBUG
1156
  printf("or32_extract: %x ", param_pos);
1157
#endif
1158
  opc_pos = 32;
1159
  for (enc = enc_initial; *enc != '\0'; )
1160
    if ((*enc == '0') && (*(enc+1) == 'x'))
1161
      {
1162
        opc_pos -= 4;
1163
        if ((param_ch == '0') || (param_ch == '1'))
1164
          {
1165
            unsigned long tmp = strtol(enc, NULL, 16);
1166
#if DEBUG
1167
            printf(" enc=%s, tmp=%x ", enc, tmp);
1168
#endif
1169
            if (param_ch == '0')
1170
              tmp = 15 - tmp;
1171
            ret |= tmp << opc_pos;
1172
          }
1173
        enc += 3;
1174
      }
1175
    else if ((*enc == '0') || (*enc == '1'))
1176
      {
1177
        opc_pos--;
1178
        if (param_ch == *enc)
1179
          ret |= 1 << opc_pos;
1180
        enc++;
1181
      }
1182
    else if (*enc == param_ch)
1183
      {
1184
        opc_pos--;
1185
        param_pos--;
1186
#if DEBUG
1187
        printf("\n  ret=%x opc_pos=%x, param_pos=%x\n", ret, opc_pos, param_pos);
1188
#endif  
1189
        if (islower(param_ch))
1190
          ret -= ((insn >> opc_pos) & 0x1) << param_pos;
1191
        else
1192
          ret += ((insn >> opc_pos) & 0x1) << param_pos;
1193
        enc++;
1194
      }
1195
    else if (isalpha(*enc))
1196
      {
1197
        opc_pos--;
1198
        enc++;
1199
      }
1200
    else if (*enc == '-')
1201
      {
1202
        opc_pos--;
1203
        enc++;
1204
      }
1205
    else
1206
      enc++;
1207
 
1208
#if DEBUG
1209
  printf ("ret=%x\n", ret);
1210
#endif
1211
  return ret;
1212
}
1213
 
1214
/* Print register. Used only by print_insn. */
1215
 
1216 703 markom
static char *
1217
or32_print_register (dest, param_ch, encoding, insn)
1218
     char *dest;
1219 371 markom
     char param_ch;
1220
     char *encoding;
1221
     unsigned long insn;
1222
{
1223
  int regnum = or32_extract(param_ch, encoding, insn);
1224
 
1225 703 markom
  sprintf (dest, "r%d", regnum);
1226
  while (*dest) dest++;
1227
  return dest;
1228 371 markom
}
1229
 
1230
/* Print immediate. Used only by print_insn. */
1231
 
1232 703 markom
static char *
1233
or32_print_immediate (dest, param_ch, encoding, insn)
1234
     char *dest;
1235 371 markom
     char param_ch;
1236
     char *encoding;
1237
     unsigned long insn;
1238
{
1239
  int imm = or32_extract (param_ch, encoding, insn);
1240
 
1241
  imm = extend_imm(imm, param_ch);
1242
 
1243
  if (letter_signed(param_ch))
1244
    {
1245
      if (imm < 0)
1246 703 markom
        sprintf (dest, "%d", imm);
1247 371 markom
      else
1248 703 markom
        sprintf (dest, "0x%x", imm);
1249 371 markom
    }
1250
  else
1251 703 markom
    sprintf (dest, "%#x", imm);
1252
  while (*dest) dest++;
1253
  return dest;
1254 371 markom
}
1255
 
1256
/* Disassemble one instruction from insn to disassemble.
1257
   Return the size of the instruction.  */
1258
 
1259
int
1260
disassemble_insn (insn)
1261
     unsigned long insn;
1262
{
1263 703 markom
  return disassemble_index (insn, insn_decode (insn));
1264
}
1265 371 markom
 
1266 703 markom
/* Disassemble one instruction from insn index.
1267
   Return the size of the instruction.  */
1268
 
1269
int
1270
disassemble_index (insn, index)
1271
     unsigned long insn;
1272
     int index;
1273
{
1274
  char *dest = disassembled;
1275 371 markom
  if (index >= 0)
1276
    {
1277
      struct or32_opcode const *opcode = &or32_opcodes[index];
1278
      char *s;
1279
 
1280 703 markom
      strcpy (dest, opcode->name);
1281
      while (*dest) dest++;
1282
      *dest++ = ' ';
1283
      *dest = 0;
1284
 
1285 371 markom
      for (s = opcode->args; *s != '\0'; ++s)
1286
        {
1287
          switch (*s)
1288
            {
1289
            case '\0':
1290 703 markom
              return insn_len (insn);
1291 714 markom
 
1292 371 markom
            case 'r':
1293 703 markom
              dest = or32_print_register(dest, *++s, opcode->encoding, insn);
1294 371 markom
              break;
1295 714 markom
 
1296 371 markom
            default:
1297
              if (strchr (opcode->encoding, *s))
1298 703 markom
                dest = or32_print_immediate (dest, *s, opcode->encoding, insn);
1299
              else {
1300
                *dest++ = *s;
1301
                *dest = 0;
1302
              }
1303 371 markom
            }
1304
        }
1305
    }
1306
  else
1307
    {
1308
      /* This used to be %8x for binutils.  */
1309 1308 phoenix
      sprintf(dest, ".word 0x%08lx", insn);
1310 703 markom
      while (*dest) dest++;
1311 371 markom
    }
1312
  return insn_len (insn);
1313
}

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