OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [stable_0_2_0_rc1/] [or1ksim/] [cpu/] [or32/] [op_mac_op.h] - Blame information for rev 1452

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 1452 nogj
/* op_mac_op.h -- Micro operations template for mac operations
2
   Copyright (C) 2005 György `nog' Jeney, nog@sdf.lonestar.org
3
 
4
This file is part of OpenRISC 1000 Architectural Simulator.
5
 
6
This program is free software; you can redistribute it and/or modify
7
it under the terms of the GNU General Public License as published by
8
the Free Software Foundation; either version 2 of the License, or
9
(at your option) any later version.
10
 
11
This program is distributed in the hope that it will be useful,
12
but WITHOUT ANY WARRANTY; without even the implied warranty of
13
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14
GNU General Public License for more details.
15
 
16
You should have received a copy of the GNU General Public License
17
along with this program; if not, write to the Free Software
18
Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
19
 
20
 
21
__or_dynop void glue(glue(op_, OP_NAME), _t0_t0)(void)
22
{
23
  int64_t temp = env->sprs[SPR_MACLO] | ((int64_t)env->sprs[SPR_MACHI] << 32);
24
 
25
  temp OP (int64_t)t0 * (int64_t)t0;
26
 
27
  env->sprs[SPR_MACLO] = temp & 0xffffffff;
28
  env->sprs[SPR_MACHI] = temp >> 32;
29
}
30
 
31
__or_dynop void glue(glue(op_, OP_NAME), _t0_t1)(void)
32
{
33
  int64_t temp = env->sprs[SPR_MACLO] | ((int64_t)env->sprs[SPR_MACHI] << 32);
34
 
35
  temp OP (int64_t)t0 * (int64_t)t1;
36
 
37
  env->sprs[SPR_MACLO] = temp & 0xffffffff;
38
  env->sprs[SPR_MACHI] = temp >> 32;
39
}
40
 
41
__or_dynop void glue(glue(op_, OP_NAME), _t0_t2)(void)
42
{
43
  int64_t temp = env->sprs[SPR_MACLO] | ((int64_t)env->sprs[SPR_MACHI] << 32);
44
 
45
  temp OP (int64_t)t0 * (int64_t)t2;
46
 
47
  env->sprs[SPR_MACLO] = temp & 0xffffffff;
48
  env->sprs[SPR_MACHI] = temp >> 32;
49
}
50
 
51
__or_dynop void glue(glue(op_, OP_NAME), _t1_t1)(void)
52
{
53
  int64_t temp = env->sprs[SPR_MACLO] | ((int64_t)env->sprs[SPR_MACHI] << 32);
54
 
55
  temp OP (int64_t)t1 * (int64_t)t1;
56
 
57
  env->sprs[SPR_MACLO] = temp & 0xffffffff;
58
  env->sprs[SPR_MACHI] = temp >> 32;
59
}
60
 
61
__or_dynop void glue(glue(op_, OP_NAME), _t1_t2)(void)
62
{
63
  int64_t temp = env->sprs[SPR_MACLO] | ((int64_t)env->sprs[SPR_MACHI] << 32);
64
 
65
  temp OP (int64_t)t1 * (int64_t)t2;
66
 
67
  env->sprs[SPR_MACLO] = temp & 0xffffffff;
68
  env->sprs[SPR_MACHI] = temp >> 32;
69
}
70
 
71
__or_dynop void glue(glue(op_, OP_NAME), _t2_t2)(void)
72
{
73
  int64_t temp = env->sprs[SPR_MACLO] | ((int64_t)env->sprs[SPR_MACHI] << 32);
74
 
75
  temp OP (int64_t)t2 * (int64_t)t2;
76
 
77
  env->sprs[SPR_MACLO] = temp & 0xffffffff;
78
  env->sprs[SPR_MACHI] = temp >> 32;
79
}
80
 

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.