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[/] [or1k/] [tags/] [stable_0_2_0_rc1/] [or1ksim/] [cpu/] [or32/] [op_mftspr_op.h] - Blame information for rev 1765

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Line No. Rev Author Line
1 1452 nogj
/* op_mftspr_op.h -- Micro operations template for the m{f,t}spr operations
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   Copyright (C) 2005 György `nog' Jeney, nog@sdf.lonestar.org
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This file is part of OpenRISC 1000 Architectural Simulator.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
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#ifndef ONLY_MTSPR
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__or_dynop void glue(glue(glue(op_mfspr_, GPR_T_NAME), _), SPR_T_NAME)(void)
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{
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  /* FIXME: NPC/PPC Handling is br0ke */
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  if(env->sprs[SPR_SR] & SPR_SR_SM) {
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    upd_sim_cycles();
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    GPR_T = mfspr(SPR_T + OP_PARAM1);
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  }
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}
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#endif
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__or_dynop void glue(glue(glue(op_mtspr_, SPR_T_NAME), _), GPR_T_NAME)(void)
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{
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  /* FIXME: NPC handling DOES NOT WORK like this */
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  if(env->sprs[SPR_SR] & SPR_SR_SM) {
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    upd_sim_cycles();
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    /* Yes, an l.mtspr instruction can cause an exception if the immu is touched
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     * it might cause an ITLB miss of instruction page fault. */
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    save_t_temporary();
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    mtspr(SPR_T + OP_PARAM1, GPR_T);
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  }
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}
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