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/* config.h -- Simulator configuration header file
   Copyright (C) 1999 Damjan Lampret, lampret@opencores.org
 
   This file is part of OpenRISC 1000 Architectural Simulator.
 
   This program is free software; you can redistribute it and/or modify
   it under the terms of the GNU General Public License as published by
   the Free Software Foundation; either version 2 of the License, or
   (at your option) any later version.
 
   This program is distributed in the hope that it will be useful,
   but WITHOUT ANY WARRANTY; without even the implied warranty of
   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
   GNU General Public License for more details.
 
   You should have received a copy of the GNU General Public License
   along with this program; if not, write to the Free Software
   Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */
 
#ifndef _CONFIG_H_
#define _CONFIG_H_
 
#include <stdio.h>
 
/* Simulator configuration macros. Eventually this one will be a lot bigger. */
 
#define MAX_UARTS        4       /* Max. number of UARTs simulated */   
#define MAX_DMAS         4       /* Max. number of DMA controllers */
#define MAX_ETHERNETS    4       /* Max. number of Ethernet MACs   */
#define MAX_GPIOS        4       /* Max. number of GPIO modules    */
#define MAX_MEMORIES     16      /* Max. number of memory devices attached */
#define MAX_VGAS         4       /* Max. number of VGAs */
#define MAX_SBUF_LEN     256     /* Max. length of store buffer */
 
#define STR_SIZE        (256)
 
struct config {
  struct {
    int enabled;                      /* Is tick timer enabled?  */
  } tick;
 
  int nuarts;
  struct {
    char rxfile[STR_SIZE];            /* Filename for RX */
    char txfile[STR_SIZE];            /* Filename for TX (required) */
    int jitter;                       /* CZ 250801 - in msecs...time to block */
    unsigned long baseaddr;           /* Naturally aligned base address */
    int irq;                          /* IRQ of this device */
    unsigned long vapi_id;            /* VAPI id for this instance */
    int uart16550;                    /* Whether this device is uart 16450 or 16550 */
  } uarts[MAX_UARTS];
 
  int ndmas;
  struct {
    unsigned long baseaddr;
    int irq;                          /* IRQ of this device */
    unsigned long vapi_id;            /* VAPI id for this instance */
  } dmas[MAX_DMAS];
 
  int nethernets;
  struct {
    unsigned long baseaddr;
    unsigned dma;                     /* Which controller is this ethernet "connected" to */
    unsigned tx_channel;              /* DMA channel used for TX */
    unsigned rx_channel;              /* DMA channel used for RX */
    char rxfile[STR_SIZE];            /* Filename for RX */
    char txfile[STR_SIZE];            /* File for TX */
    unsigned long vapi_id;            /* VAPI id for this instance */
  } ethernets[MAX_ETHERNETS];
 
  int ngpios;
  struct {
    unsigned long baseaddr;           /* Base address */
    int irq;                          /* IRQ of this device */
    unsigned long base_vapi_id;       /* First VAPI ID.  GPIO uses 8 consecutive IDs */
  } gpios[MAX_GPIOS];
 
  int nvgas;
  struct {
    unsigned long baseaddr;           /* Base address */
    int irq;                          /* IRQ of this device */
    int refresh_rate;                 /* Number of clocks per refresh */
    char filename[STR_SIZE];          /* Base file name; suffix of ####.bmp is added */
  } vgas[MAX_VGAS];
 
  struct {
    int enabled;                      /* Whether frame buffer is enabled */
    unsigned long baseaddr;           /* Base address of frame buffer register */
    int refresh_rate;                 /* Number of clocks per refresh */
    char filename[STR_SIZE];          /* Base file name; suffix of ####.bmp is added */
  } fb;
 
  struct {
    int enabled;                      /* is MC enabled? */
    unsigned long baseaddr;           /* Naturally aligned base address */
    unsigned POC;                     /* power on reset configuration register */
  } mc;
 
  struct {
    int pattern;                      /* A user specified memory initialization pattern */
    int random_seed;                  /* Initialize the memory with random values, starting with seed */
    enum {
      MT_UNKNOWN,
      MT_PATTERN,
      MT_RANDOM
    } type;
    int nmemories;                    /* Number of attached memories */
    struct {
      int ce;                         /* Which ce this memory is associated with */
      unsigned long baseaddr;         /* Start address of the memory */
      unsigned long size;             /* Memory size */
      char name[STR_SIZE];            /* Memory type string */
      char log[STR_SIZE];             /* Memory log filename */
      int delayr;                     /* Read cycles */
      int delayw;                     /* Write cycles */
    } table[MAX_MEMORIES];
  } memory;
 
  struct {
    int enabled;                      /* Whether IMMU is enabled */
    int nways;                        /* Number of ITLB ways */
    int nsets;                        /* Number of ITLB sets */
    int pagesize;                     /* ITLB page size */
    int entrysize;                    /* ITLB entry size */
    int ustates;                      /* number of ITLB usage states */
    int missdelay;                    /* How much cycles does the miss cost */
    int hitdelay;                     /* How much cycles does the hit cost */
  } immu;
 
  struct {
    int enabled;                      /* Whether DMMU is enabled */
    int nways;                        /* Number of DTLB ways */
    int nsets;                        /* Number of DTLB sets */
    int pagesize;                     /* DTLB page size */
    int entrysize;                    /* DTLB entry size */
    int ustates;                      /* number of DTLB usage states */
    int missdelay;                    /* How much cycles does the miss cost */
    int hitdelay;                     /* How much cycles does the hit cost */
  } dmmu;
 
  struct {
    int enabled;                      /* Whether instruction cache is enabled */
    int nways;                        /* Number of IC ways */
    int nsets;                        /* Number of IC sets */
    int blocksize;                    /* IC entry size */
    int ustates;                      /* number of IC usage states */
    int missdelay;                    /* How much cycles does the miss cost */
    int hitdelay;                     /* How much cycles does the hit cost */
  } ic;
 
  struct {
    int enabled;                      /* Whether data cache is enabled */
    int nways;                        /* Number of DC ways */
    int nsets;                        /* Number of DC sets */
    int blocksize;                    /* DC entry size */
    int ustates;                      /* number of DC usage states */
    int store_missdelay;              /* How much cycles does the store miss cost */
    int store_hitdelay;               /* How much cycles does the store hit cost */
    int load_missdelay;               /* How much cycles does the load miss cost */
    int load_hitdelay;                /* How much cycles does the load hit cost */
  } dc;
 
  struct {
    int enabled;            /* branch prediction buffer analysis */
    int sbp_bnf_fwd;        /* Static branch prediction for l.bnf uses forward prediction */
    int sbp_bf_fwd;         /* Static branch prediction for l.bf uses forward prediction */
    int btic;               /* branch prediction target insn cache analysis */
    int missdelay;          /* How much cycles does the miss cost */
    int hitdelay;           /* How much cycles does the hit cost */
#if 0
    int nways;              /* Number of BP ways */
    int nsets;              /* Number of BP sets */
    int blocksize;          /* BP entry size */
    int ustates;            /* number of BP usage states */
    int pstates;            /* number of BP predict states */
#endif
  } bpb;
 
  struct {
    unsigned long upr;      /* Unit present register */
    unsigned long ver, rev; /* Version register */
    int sr;                 /* Supervision register */
    int superscalar;        /* superscalara analysis */
    int hazards;            /* dependency hazards analysis */
    int dependstats;        /* dependency statistics */
    int raw_range;          /* raw register usage over time stats; range in cycles, 0 = disabled */
    int sbuf_len;           /* length of store buffer, zero if disabled */
  } cpu;
 
  struct {
    int debug;              /* Simulator debugging */
    int verbose;            /* Force verbose output */
 
    int profile;            /* Is profiler running */
    int profile_mode;       /* Profiler operating mode */
    char prof_fn[STR_SIZE]; /* Profiler filename */
 
    int mprofile;           /* Is memory profiler running */
    int mprofile_mode;      /* Memory profiler operating mode */
    int mprofile_group;     /* Grouping for memory profiler */
    char mprof_fn[STR_SIZE];/* Memory profiler filename */
 
    int history;            /* instruction stream history analysis */
    int exe_log;            /* Print out RTL states? */
    char exe_log_fn[STR_SIZE]; /* RTL state comparison filename */
    int spr_log;            /* Print out SPR states */
    char spr_log_fn[STR_SIZE]; /* SPR state log filename */
    long clkcycle_ps;       /* Clock duration in ps */
  } sim;
 
  struct {
    int enabled;            /* Whether is debug module enabled */
    int gdb_enabled;        /* Whether is debugging with gdb possible */
    int server_port;        /* A user specified port number for services */
    unsigned long vapi_id;  /* "Fake" vapi device id for JTAG proxy */
  } debug;
 
  struct {                  /* Verification API, part of Advanced Core Verification */
    int enabled;            /* Whether is VAPI module enabled */
    int server_port;        /* A user specified port number for services */
    int log_enabled;        /* Whether to log the vapi requests */
    int hide_device_id;     /* Whether to log device ID for each request */
    char vapi_fn[STR_SIZE]; /* vapi log filename */
  } vapi;
 
  struct {
    int enabled;            /* Whether power menagement is operational */
  } pm;
};
 
struct runtime {
  struct {
    FILE *fprof;            /* Profiler file */
    FILE *fmprof;           /* Memory profiler file */
    FILE *fexe_log;         /* RTL state comparison file */
    FILE *fspr_log;         /* SPR state log file */
    int init;               /* Whether we are still initilizing sim */
    int script_file_specified;/* Whether script file was already loaded */
    char *filename;         /* Original Command Simulator file (CZ) */
    int output_cfg;         /* Whether sim is to output cfg files */
    char script_fn[STR_SIZE];/* Script file read */
    int iprompt;            /* Interactive prompt */
  } sim;
 
  struct {
    unsigned long ifea;     /* Instruction fetch effective address */
    unsigned long lea;      /* Load effective address */
    unsigned long sea;      /* Store effective address */
    unsigned long ld;       /* Load data */
    unsigned long sd;       /* Store data */
    unsigned long lsea;     /* Load/Store effective address */
  } cpu;
 
  struct {
    int random_seed;                  /* Initialize the memory with random values, starting with seed */
  } memory;
 
  struct {                  /* Verification API, part of Advanced Core Verification */
    int enabled;            /* Whether is VAPI module enabled */
    FILE *vapi_file;        /* vapi file */
    int server_port;        /* A user specified port number for services */
  } vapi;
};
 
#if FAST_SIM
#include "fast_config.c"
#define IFF(x) if (x)
#else
extern struct config config;
#define IFF(x) if (1)
#endif
 
extern struct runtime runtime;
 
/* Read environment from a script file. Does not fail - assumes defaukt configuration instead. */
void read_script_file (char *filename);
 
/* Executes set sim command.  Returns nonzero if error.  */
void set_config_command (char *s);
 
/* Outputs C structure of current config to file */
void output_cfg (FILE *f);
 
#endif

Line No.	Rev	Author	Line
1	7	jrydberg	`/* config.h -- Simulator configuration header file`
2			`Copyright (C) 1999 Damjan Lampret, lampret@opencores.org`
3
4			`This file is part of OpenRISC 1000 Architectural Simulator.`
5
6			`This program is free software; you can redistribute it and/or modify`
7			`it under the terms of the GNU General Public License as published by`
8			`the Free Software Foundation; either version 2 of the License, or`
9			`(at your option) any later version.`
10
11			`This program is distributed in the hope that it will be useful,`
12			`but WITHOUT ANY WARRANTY; without even the implied warranty of`
13			`MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the`
14			`GNU General Public License for more details.`
15
16			`You should have received a copy of the GNU General Public License`
17			`along with this program; if not, write to the Free Software`
18			`Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */`
19	428	markom
20			`#ifndef _CONFIG_H_`
21			`#define _CONFIG_H_`
22
23	173	markom	`#include <stdio.h>`
24
25	7	jrydberg	`/* Simulator configuration macros. Eventually this one will be a lot bigger. */`
26	30	lampret
27	424	markom	`#define MAX_UARTS 4 /* Max. number of UARTs simulated */`
28			`#define MAX_DMAS 4 /* Max. number of DMA controllers */`
29			`#define MAX_ETHERNETS 4 /* Max. number of Ethernet MACs */`
30	444	erez	`#define MAX_GPIOS 4 /* Max. number of GPIO modules */`
31	424	markom	`#define MAX_MEMORIES 16 /* Max. number of memory devices attached */`
32	645	markom	`#define MAX_VGAS 4 /* Max. number of VGAs */`
33	626	markom	`#define MAX_SBUF_LEN 256 /* Max. length of store buffer */`
34	424	markom
35	239	markom	`#define STR_SIZE (256)`
36
37	7	jrydberg	`struct config {`
38	239	markom	`struct {`
39	332	markom	`int enabled; /* Is tick timer enabled? */`
40			`} tick;`
41
42	261	markom	`int nuarts;`
43	239	markom	`struct {`
44	310	markom	`char rxfile[STR_SIZE]; /* Filename for RX */`
45			`char txfile[STR_SIZE]; /* Filename for TX (required) */`
46			`int jitter; /* CZ 250801 - in msecs...time to block */`
47			`unsigned long baseaddr; /* Naturally aligned base address */`
48	332	markom	`int irq; /* IRQ of this device */`
49	313	markom	`unsigned long vapi_id; /* VAPI id for this instance */`
50	341	markom	`int uart16550; /* Whether this device is uart 16450 or 16550 */`
51	424	markom	`} uarts[MAX_UARTS];`
52	239	markom
53	261	markom	`int ndmas;`
54	239	markom	`struct {`
55			`unsigned long baseaddr;`
56	332	markom	`int irq; /* IRQ of this device */`
57	313	markom	`unsigned long vapi_id; /* VAPI id for this instance */`
58	424	markom	`} dmas[MAX_DMAS];`
59	239	markom
60	304	markom	`int nethernets;`
61	361	markom	`struct {`
62			`unsigned long baseaddr;`
63			`unsigned dma; /* Which controller is this ethernet "connected" to */`
64			`unsigned tx_channel; /* DMA channel used for TX */`
65			`unsigned rx_channel; /* DMA channel used for RX */`
66			`char rxfile[STR_SIZE]; /* Filename for RX */`
67			`char txfile[STR_SIZE]; /* File for TX */`
68			`unsigned long vapi_id; /* VAPI id for this instance */`
69	424	markom	`} ethernets[MAX_ETHERNETS];`
70	444	erez
71			`int ngpios;`
72	261	markom	`struct {`
73	444	erez	`unsigned long baseaddr; /* Base address */`
74			`int irq; /* IRQ of this device */`
75	477	erez	`unsigned long base_vapi_id; /* First VAPI ID. GPIO uses 8 consecutive IDs */`
76	444	erez	`} gpios[MAX_GPIOS];`
77	645	markom
78			`int nvgas;`
79			`struct {`
80			`unsigned long baseaddr; /* Base address */`
81			`int irq; /* IRQ of this device */`
82			`int refresh_rate; /* Number of clocks per refresh */`
83			`char filename[STR_SIZE]; /* Base file name; suffix of ####.bmp is added */`
84			`} vgas[MAX_VGAS];`
85	444	erez
86			`struct {`
87	645	markom	`int enabled; /* Whether frame buffer is enabled */`
88	647	markom	`unsigned long baseaddr; /* Base address of frame buffer register */`
89	645	markom	`int refresh_rate; /* Number of clocks per refresh */`
90			`char filename[STR_SIZE]; /* Base file name; suffix of ####.bmp is added */`
91			`} fb;`
92
93			`struct {`
94	261	markom	`int enabled; /* is MC enabled? */`
95			`unsigned long baseaddr; /* Naturally aligned base address */`
96	239	markom	`unsigned POC; /* power on reset configuration register */`
97			`} mc;`
98	645	markom
99	262	markom	`struct {`
100	394	markom	`int pattern; /* A user specified memory initialization pattern */`
101			`int random_seed; /* Initialize the memory with random values, starting with seed */`
102	262	markom	`enum {`
103	269	markom	`MT_UNKNOWN,`
104	262	markom	`MT_PATTERN,`
105			`MT_RANDOM`
106			`} type;`
107	424	markom	`int nmemories; /* Number of attached memories */`
108			`struct {`
109			`int ce; /* Which ce this memory is associated with */`
110			`unsigned long baseaddr; /* Start address of the memory */`
111			`unsigned long size; /* Memory size */`
112			`char name[STR_SIZE]; /* Memory type string */`
113			`char log[STR_SIZE]; /* Memory log filename */`
114			`int delayr; /* Read cycles */`
115			`int delayw; /* Write cycles */`
116			`} table[MAX_MEMORIES];`
117	262	markom	`} memory;`
118	425	markom
119			`struct {`
120			`int enabled; /* Whether IMMU is enabled */`
121			`int nways; /* Number of ITLB ways */`
122			`int nsets; /* Number of ITLB sets */`
123			`int pagesize; /* ITLB page size */`
124			`int entrysize; /* ITLB entry size */`
125			`int ustates; /* number of ITLB usage states */`
126	541	markom	`int missdelay; /* How much cycles does the miss cost */`
127			`int hitdelay; /* How much cycles does the hit cost */`
128	425	markom	`} immu;`
129
130			`struct {`
131			`int enabled; /* Whether DMMU is enabled */`
132			`int nways; /* Number of DTLB ways */`
133			`int nsets; /* Number of DTLB sets */`
134			`int pagesize; /* DTLB page size */`
135			`int entrysize; /* DTLB entry size */`
136			`int ustates; /* number of DTLB usage states */`
137	541	markom	`int missdelay; /* How much cycles does the miss cost */`
138			`int hitdelay; /* How much cycles does the hit cost */`
139	425	markom	`} dmmu;`
140	428	markom
141			`struct {`
142			`int enabled; /* Whether instruction cache is enabled */`
143			`int nways; /* Number of IC ways */`
144			`int nsets; /* Number of IC sets */`
145			`int blocksize; /* IC entry size */`
146			`int ustates; /* number of IC usage states */`
147	541	markom	`int missdelay; /* How much cycles does the miss cost */`
148			`int hitdelay; /* How much cycles does the hit cost */`
149	428	markom	`} ic;`
150	424	markom
151	263	markom	`struct {`
152	541	markom	`int enabled; /* Whether data cache is enabled */`
153	428	markom	`int nways; /* Number of DC ways */`
154			`int nsets; /* Number of DC sets */`
155			`int blocksize; /* DC entry size */`
156			`int ustates; /* number of DC usage states */`
157	541	markom	`int store_missdelay; /* How much cycles does the store miss cost */`
158			`int store_hitdelay; /* How much cycles does the store hit cost */`
159			`int load_missdelay; /* How much cycles does the load miss cost */`
160			`int load_hitdelay; /* How much cycles does the load hit cost */`
161	428	markom	`} dc;`
162
163			`struct {`
164	541	markom	`int enabled; /* branch prediction buffer analysis */`
165			`int sbp_bnf_fwd; /* Static branch prediction for l.bnf uses forward prediction */`
166			`int sbp_bf_fwd; /* Static branch prediction for l.bf uses forward prediction */`
167			`int btic; /* branch prediction target insn cache analysis */`
168			`int missdelay; /* How much cycles does the miss cost */`
169			`int hitdelay; /* How much cycles does the hit cost */`
170	629	markom	`#if 0`
171			`int nways; /* Number of BP ways */`
172			`int nsets; /* Number of BP sets */`
173			`int blocksize; /* BP entry size */`
174			`int ustates; /* number of BP usage states */`
175			`int pstates; /* number of BP predict states */`
176			`#endif`
177	541	markom	`} bpb;`
178
179			`struct {`
180	263	markom	`unsigned long upr; /* Unit present register */`
181			`unsigned long ver, rev; /* Version register */`
182	556	markom	`int sr; /* Supervision register */`
183	263	markom	`int superscalar; /* superscalara analysis */`
184			`int hazards; /* dependency hazards analysis */`
185	361	markom	`int dependstats; /* dependency statistics */`
186	535	markom	`int raw_range; /* raw register usage over time stats; range in cycles, 0 = disabled */`
187	626	markom	`int sbuf_len; /* length of store buffer, zero if disabled */`
188	263	markom	`} cpu;`
189	264	markom
190			`struct {`
191			`int debug; /* Simulator debugging */`
192	293	markom	`int verbose; /* Force verbose output */`
193	361	markom
194	264	markom	`int profile; /* Is profiler running */`
195	632	ivang	`int profile_mode; /* Profiler operating mode */`
196	264	markom	`char prof_fn[STR_SIZE]; /* Profiler filename */`
197	547	markom
198			`int mprofile; /* Is memory profiler running */`
199	632	ivang	`int mprofile_mode; /* Memory profiler operating mode */`
200			`int mprofile_group; /* Grouping for memory profiler */`
201	547	markom	`char mprof_fn[STR_SIZE];/* Memory profiler filename */`
202	394	markom
203			`int history; /* instruction stream history analysis */`
204	361	markom	`int exe_log; /* Print out RTL states? */`
205	294	markom	`char exe_log_fn[STR_SIZE]; /* RTL state comparison filename */`
206	624	ivang	`int spr_log; /* Print out SPR states */`
207			`char spr_log_fn[STR_SIZE]; /* SPR state log filename */`
208	433	markom	`long clkcycle_ps; /* Clock duration in ps */`
209	264	markom	`} sim;`
210	294	markom
211	269	markom	`struct {`
212			`int enabled; /* Whether is debug module enabled */`
213			`int gdb_enabled; /* Whether is debugging with gdb possible */`
214			`int server_port; /* A user specified port number for services */`
215	439	erez	`unsigned long vapi_id; /* "Fake" vapi device id for JTAG proxy */`
216	269	markom	`} debug;`
217
218	293	markom	`struct { /* Verification API, part of Advanced Core Verification */`
219	306	markom	`int enabled; /* Whether is VAPI module enabled */`
220			`int server_port; /* A user specified port number for services */`
221	355	markom	`int log_enabled; /* Whether to log the vapi requests */`
222	477	erez	`int hide_device_id; /* Whether to log device ID for each request */`
223	355	markom	`char vapi_fn[STR_SIZE]; /* vapi log filename */`
224	361	markom	`} vapi;`
225	557	markom
226			`struct {`
227			`int enabled; /* Whether power menagement is operational */`
228			`} pm;`
229	361	markom	`};`
230
231			`struct runtime {`
232			`struct {`
233			`FILE fprof; / Profiler file */`
234	547	markom	`FILE fmprof; / Memory profiler file */`
235	361	markom	`FILE fexe_log; / RTL state comparison file */`
236	624	ivang	`FILE fspr_log; / SPR state log file */`
237	361	markom	`int init; /* Whether we are still initilizing sim */`
238			`int script_file_specified;/* Whether script file was already loaded */`
239	549	markom	`char filename; / Original Command Simulator file (CZ) */`
240			`int output_cfg; /* Whether sim is to output cfg files */`
241			`char script_fn[STR_SIZE];/* Script file read */`
242	551	markom	`int iprompt; /* Interactive prompt */`
243	361	markom	`} sim;`
244	424	markom
245	479	markom	`struct {`
246			`unsigned long ifea; /* Instruction fetch effective address */`
247			`unsigned long lea; /* Load effective address */`
248			`unsigned long sea; /* Store effective address */`
249			`unsigned long ld; /* Load data */`
250			`unsigned long sd; /* Store data */`
251			`unsigned long lsea; /* Load/Store effective address */`
252			`} cpu;`
253
254	551	markom	`struct {`
255			`int random_seed; /* Initialize the memory with random values, starting with seed */`
256			`} memory;`
257
258	361	markom	`struct { /* Verification API, part of Advanced Core Verification */`
259	551	markom	`int enabled; /* Whether is VAPI module enabled */`
260	355	markom	`FILE vapi_file; / vapi file */`
261	551	markom	`int server_port; /* A user specified port number for services */`
262	293	markom	`} vapi;`
263	7	jrydberg	`};`
264	239	markom
265	551	markom	`#if FAST_SIM`
266			`#include "fast_config.c"`
267	557	markom	`#define IFF(x) if (x)`
268	551	markom	`#else`
269	7	jrydberg	`extern struct config config;`
270	557	markom	`#define IFF(x) if (1)`
271	551	markom	`#endif`
272
273	361	markom	`extern struct runtime runtime;`
274	239	markom
275			`/* Read environment from a script file. Does not fail - assumes defaukt configuration instead. */`
276			`void read_script_file (char *filename);`
277	361	markom
278			`/* Executes set sim command. Returns nonzero if error. */`
279			`void set_config_command (char *s);`
280	428	markom
281	549	markom	`/* Outputs C structure of current config to file */`
282			`void output_cfg (FILE *f);`
283
284	428	markom	`#endif`

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[/] [or1k/] [tags/] [stable_0_2_0_rc1/] [or1ksim/] [sim-config.h] - Blame information for rev 648