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[/] [or1k/] [tags/] [start/] [gdb-5.0/] [sim/] [m32r/] [sem.c] - Blame information for rev 1778

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1 106 markom
/* Simulator instruction semantics for m32rbf.
2
 
3
THIS FILE IS MACHINE GENERATED WITH CGEN.
4
 
5
Copyright (C) 1996, 1997, 1998, 1999 Free Software Foundation, Inc.
6
 
7
This file is part of the GNU Simulators.
8
 
9
This program is free software; you can redistribute it and/or modify
10
it under the terms of the GNU General Public License as published by
11
the Free Software Foundation; either version 2, or (at your option)
12
any later version.
13
 
14
This program is distributed in the hope that it will be useful,
15
but WITHOUT ANY WARRANTY; without even the implied warranty of
16
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17
GNU General Public License for more details.
18
 
19
You should have received a copy of the GNU General Public License along
20
with this program; if not, write to the Free Software Foundation, Inc.,
21
59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
22
 
23
*/
24
 
25
#define WANT_CPU m32rbf
26
#define WANT_CPU_M32RBF
27
 
28
#include "sim-main.h"
29
#include "cgen-mem.h"
30
#include "cgen-ops.h"
31
 
32
#undef GET_ATTR
33
#define GET_ATTR(cpu, num, attr) CGEN_ATTR_VALUE (NULL, abuf->idesc->attrs, CGEN_INSN_##attr)
34
 
35
/* This is used so that we can compile two copies of the semantic code,
36
   one with full feature support and one without that runs fast(er).
37
   FAST_P, when desired, is defined on the command line, -DFAST_P=1.  */
38
#if FAST_P
39
#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_semf_,fn)
40
#undef TRACE_RESULT
41
#define TRACE_RESULT(cpu, abuf, name, type, val)
42
#else
43
#define SEM_FN_NAME(cpu,fn) XCONCAT3 (cpu,_sem_,fn)
44
#endif
45
 
46
/* x-invalid: --invalid-- */
47
 
48
static SEM_PC
49
SEM_FN_NAME (m32rbf,x_invalid) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
50
{
51
#define FLD(f) abuf->fields.fmt_empty.f
52
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
53
  int UNUSED written = 0;
54
  IADDR UNUSED pc = abuf->addr;
55
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
56
 
57
  {
58
    /* Update the recorded pc in the cpu state struct.
59
       Only necessary for WITH_SCACHE case, but to avoid the
60
       conditional compilation ....  */
61
    SET_H_PC (pc);
62
    /* Virtual insns have zero size.  Overwrite vpc with address of next insn
63
       using the default-insn-bitsize spec.  When executing insns in parallel
64
       we may want to queue the fault and continue execution.  */
65
    vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
66
    vpc = sim_engine_invalid_insn (current_cpu, pc, vpc);
67
  }
68
 
69
  return vpc;
70
#undef FLD
71
}
72
 
73
/* x-after: --after-- */
74
 
75
static SEM_PC
76
SEM_FN_NAME (m32rbf,x_after) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
77
{
78
#define FLD(f) abuf->fields.fmt_empty.f
79
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
80
  int UNUSED written = 0;
81
  IADDR UNUSED pc = abuf->addr;
82
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
83
 
84
  {
85
#if WITH_SCACHE_PBB_M32RBF
86
    m32rbf_pbb_after (current_cpu, sem_arg);
87
#endif
88
  }
89
 
90
  return vpc;
91
#undef FLD
92
}
93
 
94
/* x-before: --before-- */
95
 
96
static SEM_PC
97
SEM_FN_NAME (m32rbf,x_before) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
98
{
99
#define FLD(f) abuf->fields.fmt_empty.f
100
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
101
  int UNUSED written = 0;
102
  IADDR UNUSED pc = abuf->addr;
103
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
104
 
105
  {
106
#if WITH_SCACHE_PBB_M32RBF
107
    m32rbf_pbb_before (current_cpu, sem_arg);
108
#endif
109
  }
110
 
111
  return vpc;
112
#undef FLD
113
}
114
 
115
/* x-cti-chain: --cti-chain-- */
116
 
117
static SEM_PC
118
SEM_FN_NAME (m32rbf,x_cti_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
119
{
120
#define FLD(f) abuf->fields.fmt_empty.f
121
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
122
  int UNUSED written = 0;
123
  IADDR UNUSED pc = abuf->addr;
124
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
125
 
126
  {
127
#if WITH_SCACHE_PBB_M32RBF
128
#ifdef DEFINE_SWITCH
129
    vpc = m32rbf_pbb_cti_chain (current_cpu, sem_arg,
130
                               pbb_br_type, pbb_br_npc);
131
    BREAK (sem);
132
#else
133
    /* FIXME: Allow provision of explicit ifmt spec in insn spec.  */
134
    vpc = m32rbf_pbb_cti_chain (current_cpu, sem_arg,
135
                               CPU_PBB_BR_TYPE (current_cpu),
136
                               CPU_PBB_BR_NPC (current_cpu));
137
#endif
138
#endif
139
  }
140
 
141
  return vpc;
142
#undef FLD
143
}
144
 
145
/* x-chain: --chain-- */
146
 
147
static SEM_PC
148
SEM_FN_NAME (m32rbf,x_chain) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
149
{
150
#define FLD(f) abuf->fields.fmt_empty.f
151
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
152
  int UNUSED written = 0;
153
  IADDR UNUSED pc = abuf->addr;
154
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
155
 
156
  {
157
#if WITH_SCACHE_PBB_M32RBF
158
    vpc = m32rbf_pbb_chain (current_cpu, sem_arg);
159
#ifdef DEFINE_SWITCH
160
    BREAK (sem);
161
#endif
162
#endif
163
  }
164
 
165
  return vpc;
166
#undef FLD
167
}
168
 
169
/* x-begin: --begin-- */
170
 
171
static SEM_PC
172
SEM_FN_NAME (m32rbf,x_begin) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
173
{
174
#define FLD(f) abuf->fields.fmt_empty.f
175
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
176
  int UNUSED written = 0;
177
  IADDR UNUSED pc = abuf->addr;
178
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 0);
179
 
180
  {
181
#if WITH_SCACHE_PBB_M32RBF
182
#ifdef DEFINE_SWITCH
183
    /* In the switch case FAST_P is a constant, allowing several optimizations
184
       in any called inline functions.  */
185
    vpc = m32rbf_pbb_begin (current_cpu, FAST_P);
186
#else
187
    vpc = m32rbf_pbb_begin (current_cpu, STATE_RUN_FAST_P (CPU_STATE (current_cpu)));
188
#endif
189
#endif
190
  }
191
 
192
  return vpc;
193
#undef FLD
194
}
195
 
196
/* add: add $dr,$sr */
197
 
198
static SEM_PC
199
SEM_FN_NAME (m32rbf,add) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
200
{
201
#define FLD(f) abuf->fields.sfmt_add.f
202
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
203
  int UNUSED written = 0;
204
  IADDR UNUSED pc = abuf->addr;
205
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
206
 
207
  {
208
    SI opval = ADDSI (* FLD (i_dr), * FLD (i_sr));
209
    * FLD (i_dr) = opval;
210
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
211
  }
212
 
213
  return vpc;
214
#undef FLD
215
}
216
 
217
/* add3: add3 $dr,$sr,$hash$slo16 */
218
 
219
static SEM_PC
220
SEM_FN_NAME (m32rbf,add3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
221
{
222
#define FLD(f) abuf->fields.sfmt_add3.f
223
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
224
  int UNUSED written = 0;
225
  IADDR UNUSED pc = abuf->addr;
226
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
227
 
228
  {
229
    SI opval = ADDSI (* FLD (i_sr), FLD (f_simm16));
230
    * FLD (i_dr) = opval;
231
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
232
  }
233
 
234
  return vpc;
235
#undef FLD
236
}
237
 
238
/* and: and $dr,$sr */
239
 
240
static SEM_PC
241
SEM_FN_NAME (m32rbf,and) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
242
{
243
#define FLD(f) abuf->fields.sfmt_add.f
244
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
245
  int UNUSED written = 0;
246
  IADDR UNUSED pc = abuf->addr;
247
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
248
 
249
  {
250
    SI opval = ANDSI (* FLD (i_dr), * FLD (i_sr));
251
    * FLD (i_dr) = opval;
252
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
253
  }
254
 
255
  return vpc;
256
#undef FLD
257
}
258
 
259
/* and3: and3 $dr,$sr,$uimm16 */
260
 
261
static SEM_PC
262
SEM_FN_NAME (m32rbf,and3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
263
{
264
#define FLD(f) abuf->fields.sfmt_and3.f
265
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
266
  int UNUSED written = 0;
267
  IADDR UNUSED pc = abuf->addr;
268
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
269
 
270
  {
271
    SI opval = ANDSI (* FLD (i_sr), FLD (f_uimm16));
272
    * FLD (i_dr) = opval;
273
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
274
  }
275
 
276
  return vpc;
277
#undef FLD
278
}
279
 
280
/* or: or $dr,$sr */
281
 
282
static SEM_PC
283
SEM_FN_NAME (m32rbf,or) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
284
{
285
#define FLD(f) abuf->fields.sfmt_add.f
286
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
287
  int UNUSED written = 0;
288
  IADDR UNUSED pc = abuf->addr;
289
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
290
 
291
  {
292
    SI opval = ORSI (* FLD (i_dr), * FLD (i_sr));
293
    * FLD (i_dr) = opval;
294
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
295
  }
296
 
297
  return vpc;
298
#undef FLD
299
}
300
 
301
/* or3: or3 $dr,$sr,$hash$ulo16 */
302
 
303
static SEM_PC
304
SEM_FN_NAME (m32rbf,or3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
305
{
306
#define FLD(f) abuf->fields.sfmt_and3.f
307
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
308
  int UNUSED written = 0;
309
  IADDR UNUSED pc = abuf->addr;
310
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
311
 
312
  {
313
    SI opval = ORSI (* FLD (i_sr), FLD (f_uimm16));
314
    * FLD (i_dr) = opval;
315
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
316
  }
317
 
318
  return vpc;
319
#undef FLD
320
}
321
 
322
/* xor: xor $dr,$sr */
323
 
324
static SEM_PC
325
SEM_FN_NAME (m32rbf,xor) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
326
{
327
#define FLD(f) abuf->fields.sfmt_add.f
328
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
329
  int UNUSED written = 0;
330
  IADDR UNUSED pc = abuf->addr;
331
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
332
 
333
  {
334
    SI opval = XORSI (* FLD (i_dr), * FLD (i_sr));
335
    * FLD (i_dr) = opval;
336
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
337
  }
338
 
339
  return vpc;
340
#undef FLD
341
}
342
 
343
/* xor3: xor3 $dr,$sr,$uimm16 */
344
 
345
static SEM_PC
346
SEM_FN_NAME (m32rbf,xor3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
347
{
348
#define FLD(f) abuf->fields.sfmt_and3.f
349
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
350
  int UNUSED written = 0;
351
  IADDR UNUSED pc = abuf->addr;
352
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
353
 
354
  {
355
    SI opval = XORSI (* FLD (i_sr), FLD (f_uimm16));
356
    * FLD (i_dr) = opval;
357
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
358
  }
359
 
360
  return vpc;
361
#undef FLD
362
}
363
 
364
/* addi: addi $dr,$simm8 */
365
 
366
static SEM_PC
367
SEM_FN_NAME (m32rbf,addi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
368
{
369
#define FLD(f) abuf->fields.sfmt_addi.f
370
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
371
  int UNUSED written = 0;
372
  IADDR UNUSED pc = abuf->addr;
373
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
374
 
375
  {
376
    SI opval = ADDSI (* FLD (i_dr), FLD (f_simm8));
377
    * FLD (i_dr) = opval;
378
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
379
  }
380
 
381
  return vpc;
382
#undef FLD
383
}
384
 
385
/* addv: addv $dr,$sr */
386
 
387
static SEM_PC
388
SEM_FN_NAME (m32rbf,addv) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
389
{
390
#define FLD(f) abuf->fields.sfmt_add.f
391
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
392
  int UNUSED written = 0;
393
  IADDR UNUSED pc = abuf->addr;
394
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
395
 
396
{
397
  SI temp0;BI temp1;
398
  temp0 = ADDSI (* FLD (i_dr), * FLD (i_sr));
399
  temp1 = ADDOFSI (* FLD (i_dr), * FLD (i_sr), 0);
400
  {
401
    SI opval = temp0;
402
    * FLD (i_dr) = opval;
403
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
404
  }
405
  {
406
    BI opval = temp1;
407
    CPU (h_cond) = opval;
408
    TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
409
  }
410
}
411
 
412
  return vpc;
413
#undef FLD
414
}
415
 
416
/* addv3: addv3 $dr,$sr,$simm16 */
417
 
418
static SEM_PC
419
SEM_FN_NAME (m32rbf,addv3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
420
{
421
#define FLD(f) abuf->fields.sfmt_add3.f
422
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
423
  int UNUSED written = 0;
424
  IADDR UNUSED pc = abuf->addr;
425
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
426
 
427
{
428
  SI temp0;BI temp1;
429
  temp0 = ADDSI (* FLD (i_sr), FLD (f_simm16));
430
  temp1 = ADDOFSI (* FLD (i_sr), FLD (f_simm16), 0);
431
  {
432
    SI opval = temp0;
433
    * FLD (i_dr) = opval;
434
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
435
  }
436
  {
437
    BI opval = temp1;
438
    CPU (h_cond) = opval;
439
    TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
440
  }
441
}
442
 
443
  return vpc;
444
#undef FLD
445
}
446
 
447
/* addx: addx $dr,$sr */
448
 
449
static SEM_PC
450
SEM_FN_NAME (m32rbf,addx) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
451
{
452
#define FLD(f) abuf->fields.sfmt_add.f
453
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
454
  int UNUSED written = 0;
455
  IADDR UNUSED pc = abuf->addr;
456
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
457
 
458
{
459
  SI temp0;BI temp1;
460
  temp0 = ADDCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
461
  temp1 = ADDCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
462
  {
463
    SI opval = temp0;
464
    * FLD (i_dr) = opval;
465
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
466
  }
467
  {
468
    BI opval = temp1;
469
    CPU (h_cond) = opval;
470
    TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
471
  }
472
}
473
 
474
  return vpc;
475
#undef FLD
476
}
477
 
478
/* bc8: bc.s $disp8 */
479
 
480
static SEM_PC
481
SEM_FN_NAME (m32rbf,bc8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
482
{
483
#define FLD(f) abuf->fields.sfmt_bl8.f
484
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
485
  int UNUSED written = 0;
486
  IADDR UNUSED pc = abuf->addr;
487
  SEM_BRANCH_INIT
488
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
489
 
490
if (CPU (h_cond)) {
491
  {
492
    USI opval = FLD (i_disp8);
493
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
494
    written |= (1 << 2);
495
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
496
  }
497
}
498
 
499
  abuf->written = written;
500
  SEM_BRANCH_FINI (vpc);
501
  return vpc;
502
#undef FLD
503
}
504
 
505
/* bc24: bc.l $disp24 */
506
 
507
static SEM_PC
508
SEM_FN_NAME (m32rbf,bc24) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
509
{
510
#define FLD(f) abuf->fields.sfmt_bl24.f
511
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
512
  int UNUSED written = 0;
513
  IADDR UNUSED pc = abuf->addr;
514
  SEM_BRANCH_INIT
515
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
516
 
517
if (CPU (h_cond)) {
518
  {
519
    USI opval = FLD (i_disp24);
520
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
521
    written |= (1 << 2);
522
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
523
  }
524
}
525
 
526
  abuf->written = written;
527
  SEM_BRANCH_FINI (vpc);
528
  return vpc;
529
#undef FLD
530
}
531
 
532
/* beq: beq $src1,$src2,$disp16 */
533
 
534
static SEM_PC
535
SEM_FN_NAME (m32rbf,beq) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
536
{
537
#define FLD(f) abuf->fields.sfmt_beq.f
538
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
539
  int UNUSED written = 0;
540
  IADDR UNUSED pc = abuf->addr;
541
  SEM_BRANCH_INIT
542
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
543
 
544
if (EQSI (* FLD (i_src1), * FLD (i_src2))) {
545
  {
546
    USI opval = FLD (i_disp16);
547
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
548
    written |= (1 << 3);
549
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
550
  }
551
}
552
 
553
  abuf->written = written;
554
  SEM_BRANCH_FINI (vpc);
555
  return vpc;
556
#undef FLD
557
}
558
 
559
/* beqz: beqz $src2,$disp16 */
560
 
561
static SEM_PC
562
SEM_FN_NAME (m32rbf,beqz) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
563
{
564
#define FLD(f) abuf->fields.sfmt_beq.f
565
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
566
  int UNUSED written = 0;
567
  IADDR UNUSED pc = abuf->addr;
568
  SEM_BRANCH_INIT
569
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
570
 
571
if (EQSI (* FLD (i_src2), 0)) {
572
  {
573
    USI opval = FLD (i_disp16);
574
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
575
    written |= (1 << 2);
576
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
577
  }
578
}
579
 
580
  abuf->written = written;
581
  SEM_BRANCH_FINI (vpc);
582
  return vpc;
583
#undef FLD
584
}
585
 
586
/* bgez: bgez $src2,$disp16 */
587
 
588
static SEM_PC
589
SEM_FN_NAME (m32rbf,bgez) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
590
{
591
#define FLD(f) abuf->fields.sfmt_beq.f
592
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
593
  int UNUSED written = 0;
594
  IADDR UNUSED pc = abuf->addr;
595
  SEM_BRANCH_INIT
596
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
597
 
598
if (GESI (* FLD (i_src2), 0)) {
599
  {
600
    USI opval = FLD (i_disp16);
601
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
602
    written |= (1 << 2);
603
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
604
  }
605
}
606
 
607
  abuf->written = written;
608
  SEM_BRANCH_FINI (vpc);
609
  return vpc;
610
#undef FLD
611
}
612
 
613
/* bgtz: bgtz $src2,$disp16 */
614
 
615
static SEM_PC
616
SEM_FN_NAME (m32rbf,bgtz) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
617
{
618
#define FLD(f) abuf->fields.sfmt_beq.f
619
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
620
  int UNUSED written = 0;
621
  IADDR UNUSED pc = abuf->addr;
622
  SEM_BRANCH_INIT
623
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
624
 
625
if (GTSI (* FLD (i_src2), 0)) {
626
  {
627
    USI opval = FLD (i_disp16);
628
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
629
    written |= (1 << 2);
630
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
631
  }
632
}
633
 
634
  abuf->written = written;
635
  SEM_BRANCH_FINI (vpc);
636
  return vpc;
637
#undef FLD
638
}
639
 
640
/* blez: blez $src2,$disp16 */
641
 
642
static SEM_PC
643
SEM_FN_NAME (m32rbf,blez) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
644
{
645
#define FLD(f) abuf->fields.sfmt_beq.f
646
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
647
  int UNUSED written = 0;
648
  IADDR UNUSED pc = abuf->addr;
649
  SEM_BRANCH_INIT
650
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
651
 
652
if (LESI (* FLD (i_src2), 0)) {
653
  {
654
    USI opval = FLD (i_disp16);
655
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
656
    written |= (1 << 2);
657
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
658
  }
659
}
660
 
661
  abuf->written = written;
662
  SEM_BRANCH_FINI (vpc);
663
  return vpc;
664
#undef FLD
665
}
666
 
667
/* bltz: bltz $src2,$disp16 */
668
 
669
static SEM_PC
670
SEM_FN_NAME (m32rbf,bltz) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
671
{
672
#define FLD(f) abuf->fields.sfmt_beq.f
673
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
674
  int UNUSED written = 0;
675
  IADDR UNUSED pc = abuf->addr;
676
  SEM_BRANCH_INIT
677
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
678
 
679
if (LTSI (* FLD (i_src2), 0)) {
680
  {
681
    USI opval = FLD (i_disp16);
682
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
683
    written |= (1 << 2);
684
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
685
  }
686
}
687
 
688
  abuf->written = written;
689
  SEM_BRANCH_FINI (vpc);
690
  return vpc;
691
#undef FLD
692
}
693
 
694
/* bnez: bnez $src2,$disp16 */
695
 
696
static SEM_PC
697
SEM_FN_NAME (m32rbf,bnez) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
698
{
699
#define FLD(f) abuf->fields.sfmt_beq.f
700
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
701
  int UNUSED written = 0;
702
  IADDR UNUSED pc = abuf->addr;
703
  SEM_BRANCH_INIT
704
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
705
 
706
if (NESI (* FLD (i_src2), 0)) {
707
  {
708
    USI opval = FLD (i_disp16);
709
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
710
    written |= (1 << 2);
711
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
712
  }
713
}
714
 
715
  abuf->written = written;
716
  SEM_BRANCH_FINI (vpc);
717
  return vpc;
718
#undef FLD
719
}
720
 
721
/* bl8: bl.s $disp8 */
722
 
723
static SEM_PC
724
SEM_FN_NAME (m32rbf,bl8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
725
{
726
#define FLD(f) abuf->fields.sfmt_bl8.f
727
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
728
  int UNUSED written = 0;
729
  IADDR UNUSED pc = abuf->addr;
730
  SEM_BRANCH_INIT
731
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
732
 
733
{
734
  {
735
    SI opval = ADDSI (ANDSI (pc, -4), 4);
736
    CPU (h_gr[((UINT) 14)]) = opval;
737
    TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
738
  }
739
  {
740
    USI opval = FLD (i_disp8);
741
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
742
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
743
  }
744
}
745
 
746
  SEM_BRANCH_FINI (vpc);
747
  return vpc;
748
#undef FLD
749
}
750
 
751
/* bl24: bl.l $disp24 */
752
 
753
static SEM_PC
754
SEM_FN_NAME (m32rbf,bl24) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
755
{
756
#define FLD(f) abuf->fields.sfmt_bl24.f
757
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
758
  int UNUSED written = 0;
759
  IADDR UNUSED pc = abuf->addr;
760
  SEM_BRANCH_INIT
761
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
762
 
763
{
764
  {
765
    SI opval = ADDSI (pc, 4);
766
    CPU (h_gr[((UINT) 14)]) = opval;
767
    TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
768
  }
769
  {
770
    USI opval = FLD (i_disp24);
771
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
772
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
773
  }
774
}
775
 
776
  SEM_BRANCH_FINI (vpc);
777
  return vpc;
778
#undef FLD
779
}
780
 
781
/* bnc8: bnc.s $disp8 */
782
 
783
static SEM_PC
784
SEM_FN_NAME (m32rbf,bnc8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
785
{
786
#define FLD(f) abuf->fields.sfmt_bl8.f
787
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
788
  int UNUSED written = 0;
789
  IADDR UNUSED pc = abuf->addr;
790
  SEM_BRANCH_INIT
791
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
792
 
793
if (NOTBI (CPU (h_cond))) {
794
  {
795
    USI opval = FLD (i_disp8);
796
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
797
    written |= (1 << 2);
798
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
799
  }
800
}
801
 
802
  abuf->written = written;
803
  SEM_BRANCH_FINI (vpc);
804
  return vpc;
805
#undef FLD
806
}
807
 
808
/* bnc24: bnc.l $disp24 */
809
 
810
static SEM_PC
811
SEM_FN_NAME (m32rbf,bnc24) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
812
{
813
#define FLD(f) abuf->fields.sfmt_bl24.f
814
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
815
  int UNUSED written = 0;
816
  IADDR UNUSED pc = abuf->addr;
817
  SEM_BRANCH_INIT
818
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
819
 
820
if (NOTBI (CPU (h_cond))) {
821
  {
822
    USI opval = FLD (i_disp24);
823
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
824
    written |= (1 << 2);
825
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
826
  }
827
}
828
 
829
  abuf->written = written;
830
  SEM_BRANCH_FINI (vpc);
831
  return vpc;
832
#undef FLD
833
}
834
 
835
/* bne: bne $src1,$src2,$disp16 */
836
 
837
static SEM_PC
838
SEM_FN_NAME (m32rbf,bne) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
839
{
840
#define FLD(f) abuf->fields.sfmt_beq.f
841
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
842
  int UNUSED written = 0;
843
  IADDR UNUSED pc = abuf->addr;
844
  SEM_BRANCH_INIT
845
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
846
 
847
if (NESI (* FLD (i_src1), * FLD (i_src2))) {
848
  {
849
    USI opval = FLD (i_disp16);
850
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
851
    written |= (1 << 3);
852
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
853
  }
854
}
855
 
856
  abuf->written = written;
857
  SEM_BRANCH_FINI (vpc);
858
  return vpc;
859
#undef FLD
860
}
861
 
862
/* bra8: bra.s $disp8 */
863
 
864
static SEM_PC
865
SEM_FN_NAME (m32rbf,bra8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
866
{
867
#define FLD(f) abuf->fields.sfmt_bl8.f
868
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
869
  int UNUSED written = 0;
870
  IADDR UNUSED pc = abuf->addr;
871
  SEM_BRANCH_INIT
872
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
873
 
874
  {
875
    USI opval = FLD (i_disp8);
876
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
877
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
878
  }
879
 
880
  SEM_BRANCH_FINI (vpc);
881
  return vpc;
882
#undef FLD
883
}
884
 
885
/* bra24: bra.l $disp24 */
886
 
887
static SEM_PC
888
SEM_FN_NAME (m32rbf,bra24) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
889
{
890
#define FLD(f) abuf->fields.sfmt_bl24.f
891
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
892
  int UNUSED written = 0;
893
  IADDR UNUSED pc = abuf->addr;
894
  SEM_BRANCH_INIT
895
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
896
 
897
  {
898
    USI opval = FLD (i_disp24);
899
    SEM_BRANCH_VIA_CACHE (current_cpu, sem_arg, opval, vpc);
900
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
901
  }
902
 
903
  SEM_BRANCH_FINI (vpc);
904
  return vpc;
905
#undef FLD
906
}
907
 
908
/* cmp: cmp $src1,$src2 */
909
 
910
static SEM_PC
911
SEM_FN_NAME (m32rbf,cmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
912
{
913
#define FLD(f) abuf->fields.sfmt_st_plus.f
914
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
915
  int UNUSED written = 0;
916
  IADDR UNUSED pc = abuf->addr;
917
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
918
 
919
  {
920
    BI opval = LTSI (* FLD (i_src1), * FLD (i_src2));
921
    CPU (h_cond) = opval;
922
    TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
923
  }
924
 
925
  return vpc;
926
#undef FLD
927
}
928
 
929
/* cmpi: cmpi $src2,$simm16 */
930
 
931
static SEM_PC
932
SEM_FN_NAME (m32rbf,cmpi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
933
{
934
#define FLD(f) abuf->fields.sfmt_st_d.f
935
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
936
  int UNUSED written = 0;
937
  IADDR UNUSED pc = abuf->addr;
938
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
939
 
940
  {
941
    BI opval = LTSI (* FLD (i_src2), FLD (f_simm16));
942
    CPU (h_cond) = opval;
943
    TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
944
  }
945
 
946
  return vpc;
947
#undef FLD
948
}
949
 
950
/* cmpu: cmpu $src1,$src2 */
951
 
952
static SEM_PC
953
SEM_FN_NAME (m32rbf,cmpu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
954
{
955
#define FLD(f) abuf->fields.sfmt_st_plus.f
956
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
957
  int UNUSED written = 0;
958
  IADDR UNUSED pc = abuf->addr;
959
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
960
 
961
  {
962
    BI opval = LTUSI (* FLD (i_src1), * FLD (i_src2));
963
    CPU (h_cond) = opval;
964
    TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
965
  }
966
 
967
  return vpc;
968
#undef FLD
969
}
970
 
971
/* cmpui: cmpui $src2,$simm16 */
972
 
973
static SEM_PC
974
SEM_FN_NAME (m32rbf,cmpui) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
975
{
976
#define FLD(f) abuf->fields.sfmt_st_d.f
977
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
978
  int UNUSED written = 0;
979
  IADDR UNUSED pc = abuf->addr;
980
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
981
 
982
  {
983
    BI opval = LTUSI (* FLD (i_src2), FLD (f_simm16));
984
    CPU (h_cond) = opval;
985
    TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
986
  }
987
 
988
  return vpc;
989
#undef FLD
990
}
991
 
992
/* div: div $dr,$sr */
993
 
994
static SEM_PC
995
SEM_FN_NAME (m32rbf,div) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
996
{
997
#define FLD(f) abuf->fields.sfmt_add.f
998
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
999
  int UNUSED written = 0;
1000
  IADDR UNUSED pc = abuf->addr;
1001
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1002
 
1003
if (NESI (* FLD (i_sr), 0)) {
1004
  {
1005
    SI opval = DIVSI (* FLD (i_dr), * FLD (i_sr));
1006
    * FLD (i_dr) = opval;
1007
    written |= (1 << 2);
1008
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1009
  }
1010
}
1011
 
1012
  abuf->written = written;
1013
  return vpc;
1014
#undef FLD
1015
}
1016
 
1017
/* divu: divu $dr,$sr */
1018
 
1019
static SEM_PC
1020
SEM_FN_NAME (m32rbf,divu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1021
{
1022
#define FLD(f) abuf->fields.sfmt_add.f
1023
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1024
  int UNUSED written = 0;
1025
  IADDR UNUSED pc = abuf->addr;
1026
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1027
 
1028
if (NESI (* FLD (i_sr), 0)) {
1029
  {
1030
    SI opval = UDIVSI (* FLD (i_dr), * FLD (i_sr));
1031
    * FLD (i_dr) = opval;
1032
    written |= (1 << 2);
1033
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1034
  }
1035
}
1036
 
1037
  abuf->written = written;
1038
  return vpc;
1039
#undef FLD
1040
}
1041
 
1042
/* rem: rem $dr,$sr */
1043
 
1044
static SEM_PC
1045
SEM_FN_NAME (m32rbf,rem) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1046
{
1047
#define FLD(f) abuf->fields.sfmt_add.f
1048
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1049
  int UNUSED written = 0;
1050
  IADDR UNUSED pc = abuf->addr;
1051
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1052
 
1053
if (NESI (* FLD (i_sr), 0)) {
1054
  {
1055
    SI opval = MODSI (* FLD (i_dr), * FLD (i_sr));
1056
    * FLD (i_dr) = opval;
1057
    written |= (1 << 2);
1058
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1059
  }
1060
}
1061
 
1062
  abuf->written = written;
1063
  return vpc;
1064
#undef FLD
1065
}
1066
 
1067
/* remu: remu $dr,$sr */
1068
 
1069
static SEM_PC
1070
SEM_FN_NAME (m32rbf,remu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1071
{
1072
#define FLD(f) abuf->fields.sfmt_add.f
1073
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1074
  int UNUSED written = 0;
1075
  IADDR UNUSED pc = abuf->addr;
1076
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1077
 
1078
if (NESI (* FLD (i_sr), 0)) {
1079
  {
1080
    SI opval = UMODSI (* FLD (i_dr), * FLD (i_sr));
1081
    * FLD (i_dr) = opval;
1082
    written |= (1 << 2);
1083
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1084
  }
1085
}
1086
 
1087
  abuf->written = written;
1088
  return vpc;
1089
#undef FLD
1090
}
1091
 
1092
/* jl: jl $sr */
1093
 
1094
static SEM_PC
1095
SEM_FN_NAME (m32rbf,jl) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1096
{
1097
#define FLD(f) abuf->fields.sfmt_jl.f
1098
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1099
  int UNUSED written = 0;
1100
  IADDR UNUSED pc = abuf->addr;
1101
  SEM_BRANCH_INIT
1102
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1103
 
1104
{
1105
  SI temp0;USI temp1;
1106
  temp0 = ADDSI (ANDSI (pc, -4), 4);
1107
  temp1 = ANDSI (* FLD (i_sr), -4);
1108
  {
1109
    SI opval = temp0;
1110
    CPU (h_gr[((UINT) 14)]) = opval;
1111
    TRACE_RESULT (current_cpu, abuf, "gr-14", 'x', opval);
1112
  }
1113
  {
1114
    USI opval = temp1;
1115
    SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1116
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1117
  }
1118
}
1119
 
1120
  SEM_BRANCH_FINI (vpc);
1121
  return vpc;
1122
#undef FLD
1123
}
1124
 
1125
/* jmp: jmp $sr */
1126
 
1127
static SEM_PC
1128
SEM_FN_NAME (m32rbf,jmp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1129
{
1130
#define FLD(f) abuf->fields.sfmt_mvtc.f
1131
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1132
  int UNUSED written = 0;
1133
  IADDR UNUSED pc = abuf->addr;
1134
  SEM_BRANCH_INIT
1135
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1136
 
1137
  {
1138
    USI opval = ANDSI (* FLD (i_sr), -4);
1139
    SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1140
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1141
  }
1142
 
1143
  SEM_BRANCH_FINI (vpc);
1144
  return vpc;
1145
#undef FLD
1146
}
1147
 
1148
/* ld: ld $dr,@$sr */
1149
 
1150
static SEM_PC
1151
SEM_FN_NAME (m32rbf,ld) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1152
{
1153
#define FLD(f) abuf->fields.sfmt_ld_plus.f
1154
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1155
  int UNUSED written = 0;
1156
  IADDR UNUSED pc = abuf->addr;
1157
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1158
 
1159
  {
1160
    SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
1161
    * FLD (i_dr) = opval;
1162
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1163
  }
1164
 
1165
  return vpc;
1166
#undef FLD
1167
}
1168
 
1169
/* ld-d: ld $dr,@($slo16,$sr) */
1170
 
1171
static SEM_PC
1172
SEM_FN_NAME (m32rbf,ld_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1173
{
1174
#define FLD(f) abuf->fields.sfmt_add3.f
1175
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1176
  int UNUSED written = 0;
1177
  IADDR UNUSED pc = abuf->addr;
1178
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1179
 
1180
  {
1181
    SI opval = GETMEMSI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16)));
1182
    * FLD (i_dr) = opval;
1183
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1184
  }
1185
 
1186
  return vpc;
1187
#undef FLD
1188
}
1189
 
1190
/* ldb: ldb $dr,@$sr */
1191
 
1192
static SEM_PC
1193
SEM_FN_NAME (m32rbf,ldb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1194
{
1195
#define FLD(f) abuf->fields.sfmt_ld_plus.f
1196
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1197
  int UNUSED written = 0;
1198
  IADDR UNUSED pc = abuf->addr;
1199
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1200
 
1201
  {
1202
    SI opval = EXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
1203
    * FLD (i_dr) = opval;
1204
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1205
  }
1206
 
1207
  return vpc;
1208
#undef FLD
1209
}
1210
 
1211
/* ldb-d: ldb $dr,@($slo16,$sr) */
1212
 
1213
static SEM_PC
1214
SEM_FN_NAME (m32rbf,ldb_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1215
{
1216
#define FLD(f) abuf->fields.sfmt_add3.f
1217
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1218
  int UNUSED written = 0;
1219
  IADDR UNUSED pc = abuf->addr;
1220
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1221
 
1222
  {
1223
    SI opval = EXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1224
    * FLD (i_dr) = opval;
1225
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1226
  }
1227
 
1228
  return vpc;
1229
#undef FLD
1230
}
1231
 
1232
/* ldh: ldh $dr,@$sr */
1233
 
1234
static SEM_PC
1235
SEM_FN_NAME (m32rbf,ldh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1236
{
1237
#define FLD(f) abuf->fields.sfmt_ld_plus.f
1238
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1239
  int UNUSED written = 0;
1240
  IADDR UNUSED pc = abuf->addr;
1241
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1242
 
1243
  {
1244
    SI opval = EXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
1245
    * FLD (i_dr) = opval;
1246
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1247
  }
1248
 
1249
  return vpc;
1250
#undef FLD
1251
}
1252
 
1253
/* ldh-d: ldh $dr,@($slo16,$sr) */
1254
 
1255
static SEM_PC
1256
SEM_FN_NAME (m32rbf,ldh_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1257
{
1258
#define FLD(f) abuf->fields.sfmt_add3.f
1259
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1260
  int UNUSED written = 0;
1261
  IADDR UNUSED pc = abuf->addr;
1262
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1263
 
1264
  {
1265
    SI opval = EXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1266
    * FLD (i_dr) = opval;
1267
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1268
  }
1269
 
1270
  return vpc;
1271
#undef FLD
1272
}
1273
 
1274
/* ldub: ldub $dr,@$sr */
1275
 
1276
static SEM_PC
1277
SEM_FN_NAME (m32rbf,ldub) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1278
{
1279
#define FLD(f) abuf->fields.sfmt_ld_plus.f
1280
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1281
  int UNUSED written = 0;
1282
  IADDR UNUSED pc = abuf->addr;
1283
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1284
 
1285
  {
1286
    SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, * FLD (i_sr)));
1287
    * FLD (i_dr) = opval;
1288
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1289
  }
1290
 
1291
  return vpc;
1292
#undef FLD
1293
}
1294
 
1295
/* ldub-d: ldub $dr,@($slo16,$sr) */
1296
 
1297
static SEM_PC
1298
SEM_FN_NAME (m32rbf,ldub_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1299
{
1300
#define FLD(f) abuf->fields.sfmt_add3.f
1301
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1302
  int UNUSED written = 0;
1303
  IADDR UNUSED pc = abuf->addr;
1304
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1305
 
1306
  {
1307
    SI opval = ZEXTQISI (GETMEMQI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1308
    * FLD (i_dr) = opval;
1309
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1310
  }
1311
 
1312
  return vpc;
1313
#undef FLD
1314
}
1315
 
1316
/* lduh: lduh $dr,@$sr */
1317
 
1318
static SEM_PC
1319
SEM_FN_NAME (m32rbf,lduh) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1320
{
1321
#define FLD(f) abuf->fields.sfmt_ld_plus.f
1322
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1323
  int UNUSED written = 0;
1324
  IADDR UNUSED pc = abuf->addr;
1325
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1326
 
1327
  {
1328
    SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, * FLD (i_sr)));
1329
    * FLD (i_dr) = opval;
1330
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1331
  }
1332
 
1333
  return vpc;
1334
#undef FLD
1335
}
1336
 
1337
/* lduh-d: lduh $dr,@($slo16,$sr) */
1338
 
1339
static SEM_PC
1340
SEM_FN_NAME (m32rbf,lduh_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1341
{
1342
#define FLD(f) abuf->fields.sfmt_add3.f
1343
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1344
  int UNUSED written = 0;
1345
  IADDR UNUSED pc = abuf->addr;
1346
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1347
 
1348
  {
1349
    SI opval = ZEXTHISI (GETMEMHI (current_cpu, pc, ADDSI (* FLD (i_sr), FLD (f_simm16))));
1350
    * FLD (i_dr) = opval;
1351
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1352
  }
1353
 
1354
  return vpc;
1355
#undef FLD
1356
}
1357
 
1358
/* ld-plus: ld $dr,@$sr+ */
1359
 
1360
static SEM_PC
1361
SEM_FN_NAME (m32rbf,ld_plus) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1362
{
1363
#define FLD(f) abuf->fields.sfmt_ld_plus.f
1364
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1365
  int UNUSED written = 0;
1366
  IADDR UNUSED pc = abuf->addr;
1367
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1368
 
1369
{
1370
  SI temp0;SI temp1;
1371
  temp0 = GETMEMSI (current_cpu, pc, * FLD (i_sr));
1372
  temp1 = ADDSI (* FLD (i_sr), 4);
1373
  {
1374
    SI opval = temp0;
1375
    * FLD (i_dr) = opval;
1376
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1377
  }
1378
  {
1379
    SI opval = temp1;
1380
    * FLD (i_sr) = opval;
1381
    TRACE_RESULT (current_cpu, abuf, "sr", 'x', opval);
1382
  }
1383
}
1384
 
1385
  return vpc;
1386
#undef FLD
1387
}
1388
 
1389
/* ld24: ld24 $dr,$uimm24 */
1390
 
1391
static SEM_PC
1392
SEM_FN_NAME (m32rbf,ld24) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1393
{
1394
#define FLD(f) abuf->fields.sfmt_ld24.f
1395
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1396
  int UNUSED written = 0;
1397
  IADDR UNUSED pc = abuf->addr;
1398
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1399
 
1400
  {
1401
    SI opval = FLD (i_uimm24);
1402
    * FLD (i_dr) = opval;
1403
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1404
  }
1405
 
1406
  return vpc;
1407
#undef FLD
1408
}
1409
 
1410
/* ldi8: ldi8 $dr,$simm8 */
1411
 
1412
static SEM_PC
1413
SEM_FN_NAME (m32rbf,ldi8) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1414
{
1415
#define FLD(f) abuf->fields.sfmt_addi.f
1416
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1417
  int UNUSED written = 0;
1418
  IADDR UNUSED pc = abuf->addr;
1419
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1420
 
1421
  {
1422
    SI opval = FLD (f_simm8);
1423
    * FLD (i_dr) = opval;
1424
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1425
  }
1426
 
1427
  return vpc;
1428
#undef FLD
1429
}
1430
 
1431
/* ldi16: ldi16 $dr,$hash$slo16 */
1432
 
1433
static SEM_PC
1434
SEM_FN_NAME (m32rbf,ldi16) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1435
{
1436
#define FLD(f) abuf->fields.sfmt_add3.f
1437
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1438
  int UNUSED written = 0;
1439
  IADDR UNUSED pc = abuf->addr;
1440
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
1441
 
1442
  {
1443
    SI opval = FLD (f_simm16);
1444
    * FLD (i_dr) = opval;
1445
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1446
  }
1447
 
1448
  return vpc;
1449
#undef FLD
1450
}
1451
 
1452
/* lock: lock $dr,@$sr */
1453
 
1454
static SEM_PC
1455
SEM_FN_NAME (m32rbf,lock) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1456
{
1457
#define FLD(f) abuf->fields.sfmt_ld_plus.f
1458
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1459
  int UNUSED written = 0;
1460
  IADDR UNUSED pc = abuf->addr;
1461
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1462
 
1463
{
1464
  {
1465
    BI opval = 1;
1466
    CPU (h_lock) = opval;
1467
    TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
1468
  }
1469
  {
1470
    SI opval = GETMEMSI (current_cpu, pc, * FLD (i_sr));
1471
    * FLD (i_dr) = opval;
1472
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1473
  }
1474
}
1475
 
1476
  return vpc;
1477
#undef FLD
1478
}
1479
 
1480
/* machi: machi $src1,$src2 */
1481
 
1482
static SEM_PC
1483
SEM_FN_NAME (m32rbf,machi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1484
{
1485
#define FLD(f) abuf->fields.sfmt_st_plus.f
1486
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1487
  int UNUSED written = 0;
1488
  IADDR UNUSED pc = abuf->addr;
1489
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1490
 
1491
  {
1492
    DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUM (), MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8);
1493
    SET_H_ACCUM (opval);
1494
    TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1495
  }
1496
 
1497
  return vpc;
1498
#undef FLD
1499
}
1500
 
1501
/* maclo: maclo $src1,$src2 */
1502
 
1503
static SEM_PC
1504
SEM_FN_NAME (m32rbf,maclo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1505
{
1506
#define FLD(f) abuf->fields.sfmt_st_plus.f
1507
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1508
  int UNUSED written = 0;
1509
  IADDR UNUSED pc = abuf->addr;
1510
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1511
 
1512
  {
1513
    DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUM (), MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8);
1514
    SET_H_ACCUM (opval);
1515
    TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1516
  }
1517
 
1518
  return vpc;
1519
#undef FLD
1520
}
1521
 
1522
/* macwhi: macwhi $src1,$src2 */
1523
 
1524
static SEM_PC
1525
SEM_FN_NAME (m32rbf,macwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1526
{
1527
#define FLD(f) abuf->fields.sfmt_st_plus.f
1528
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1529
  int UNUSED written = 0;
1530
  IADDR UNUSED pc = abuf->addr;
1531
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1532
 
1533
  {
1534
    DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUM (), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16))))), 8), 8);
1535
    SET_H_ACCUM (opval);
1536
    TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1537
  }
1538
 
1539
  return vpc;
1540
#undef FLD
1541
}
1542
 
1543
/* macwlo: macwlo $src1,$src2 */
1544
 
1545
static SEM_PC
1546
SEM_FN_NAME (m32rbf,macwlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1547
{
1548
#define FLD(f) abuf->fields.sfmt_st_plus.f
1549
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1550
  int UNUSED written = 0;
1551
  IADDR UNUSED pc = abuf->addr;
1552
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1553
 
1554
  {
1555
    DI opval = SRADI (SLLDI (ADDDI (GET_H_ACCUM (), MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2))))), 8), 8);
1556
    SET_H_ACCUM (opval);
1557
    TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1558
  }
1559
 
1560
  return vpc;
1561
#undef FLD
1562
}
1563
 
1564
/* mul: mul $dr,$sr */
1565
 
1566
static SEM_PC
1567
SEM_FN_NAME (m32rbf,mul) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1568
{
1569
#define FLD(f) abuf->fields.sfmt_add.f
1570
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1571
  int UNUSED written = 0;
1572
  IADDR UNUSED pc = abuf->addr;
1573
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1574
 
1575
  {
1576
    SI opval = MULSI (* FLD (i_dr), * FLD (i_sr));
1577
    * FLD (i_dr) = opval;
1578
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1579
  }
1580
 
1581
  return vpc;
1582
#undef FLD
1583
}
1584
 
1585
/* mulhi: mulhi $src1,$src2 */
1586
 
1587
static SEM_PC
1588
SEM_FN_NAME (m32rbf,mulhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1589
{
1590
#define FLD(f) abuf->fields.sfmt_st_plus.f
1591
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1592
  int UNUSED written = 0;
1593
  IADDR UNUSED pc = abuf->addr;
1594
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1595
 
1596
  {
1597
    DI opval = SRADI (SLLDI (MULDI (EXTSIDI (ANDSI (* FLD (i_src1), 0xffff0000)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 16), 16);
1598
    SET_H_ACCUM (opval);
1599
    TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1600
  }
1601
 
1602
  return vpc;
1603
#undef FLD
1604
}
1605
 
1606
/* mullo: mullo $src1,$src2 */
1607
 
1608
static SEM_PC
1609
SEM_FN_NAME (m32rbf,mullo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1610
{
1611
#define FLD(f) abuf->fields.sfmt_st_plus.f
1612
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1613
  int UNUSED written = 0;
1614
  IADDR UNUSED pc = abuf->addr;
1615
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1616
 
1617
  {
1618
    DI opval = SRADI (SLLDI (MULDI (EXTSIDI (SLLSI (* FLD (i_src1), 16)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 16), 16);
1619
    SET_H_ACCUM (opval);
1620
    TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1621
  }
1622
 
1623
  return vpc;
1624
#undef FLD
1625
}
1626
 
1627
/* mulwhi: mulwhi $src1,$src2 */
1628
 
1629
static SEM_PC
1630
SEM_FN_NAME (m32rbf,mulwhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1631
{
1632
#define FLD(f) abuf->fields.sfmt_st_plus.f
1633
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1634
  int UNUSED written = 0;
1635
  IADDR UNUSED pc = abuf->addr;
1636
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1637
 
1638
  {
1639
    DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (SRASI (* FLD (i_src2), 16)))), 8), 8);
1640
    SET_H_ACCUM (opval);
1641
    TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1642
  }
1643
 
1644
  return vpc;
1645
#undef FLD
1646
}
1647
 
1648
/* mulwlo: mulwlo $src1,$src2 */
1649
 
1650
static SEM_PC
1651
SEM_FN_NAME (m32rbf,mulwlo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1652
{
1653
#define FLD(f) abuf->fields.sfmt_st_plus.f
1654
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1655
  int UNUSED written = 0;
1656
  IADDR UNUSED pc = abuf->addr;
1657
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1658
 
1659
  {
1660
    DI opval = SRADI (SLLDI (MULDI (EXTSIDI (* FLD (i_src1)), EXTHIDI (TRUNCSIHI (* FLD (i_src2)))), 8), 8);
1661
    SET_H_ACCUM (opval);
1662
    TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1663
  }
1664
 
1665
  return vpc;
1666
#undef FLD
1667
}
1668
 
1669
/* mv: mv $dr,$sr */
1670
 
1671
static SEM_PC
1672
SEM_FN_NAME (m32rbf,mv) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1673
{
1674
#define FLD(f) abuf->fields.sfmt_ld_plus.f
1675
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1676
  int UNUSED written = 0;
1677
  IADDR UNUSED pc = abuf->addr;
1678
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1679
 
1680
  {
1681
    SI opval = * FLD (i_sr);
1682
    * FLD (i_dr) = opval;
1683
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1684
  }
1685
 
1686
  return vpc;
1687
#undef FLD
1688
}
1689
 
1690
/* mvfachi: mvfachi $dr */
1691
 
1692
static SEM_PC
1693
SEM_FN_NAME (m32rbf,mvfachi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1694
{
1695
#define FLD(f) abuf->fields.sfmt_seth.f
1696
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1697
  int UNUSED written = 0;
1698
  IADDR UNUSED pc = abuf->addr;
1699
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1700
 
1701
  {
1702
    SI opval = TRUNCDISI (SRADI (GET_H_ACCUM (), 32));
1703
    * FLD (i_dr) = opval;
1704
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1705
  }
1706
 
1707
  return vpc;
1708
#undef FLD
1709
}
1710
 
1711
/* mvfaclo: mvfaclo $dr */
1712
 
1713
static SEM_PC
1714
SEM_FN_NAME (m32rbf,mvfaclo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1715
{
1716
#define FLD(f) abuf->fields.sfmt_seth.f
1717
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1718
  int UNUSED written = 0;
1719
  IADDR UNUSED pc = abuf->addr;
1720
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1721
 
1722
  {
1723
    SI opval = TRUNCDISI (GET_H_ACCUM ());
1724
    * FLD (i_dr) = opval;
1725
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1726
  }
1727
 
1728
  return vpc;
1729
#undef FLD
1730
}
1731
 
1732
/* mvfacmi: mvfacmi $dr */
1733
 
1734
static SEM_PC
1735
SEM_FN_NAME (m32rbf,mvfacmi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1736
{
1737
#define FLD(f) abuf->fields.sfmt_seth.f
1738
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1739
  int UNUSED written = 0;
1740
  IADDR UNUSED pc = abuf->addr;
1741
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1742
 
1743
  {
1744
    SI opval = TRUNCDISI (SRADI (GET_H_ACCUM (), 16));
1745
    * FLD (i_dr) = opval;
1746
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1747
  }
1748
 
1749
  return vpc;
1750
#undef FLD
1751
}
1752
 
1753
/* mvfc: mvfc $dr,$scr */
1754
 
1755
static SEM_PC
1756
SEM_FN_NAME (m32rbf,mvfc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1757
{
1758
#define FLD(f) abuf->fields.sfmt_mvfc.f
1759
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1760
  int UNUSED written = 0;
1761
  IADDR UNUSED pc = abuf->addr;
1762
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1763
 
1764
  {
1765
    SI opval = GET_H_CR (FLD (f_r2));
1766
    * FLD (i_dr) = opval;
1767
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1768
  }
1769
 
1770
  return vpc;
1771
#undef FLD
1772
}
1773
 
1774
/* mvtachi: mvtachi $src1 */
1775
 
1776
static SEM_PC
1777
SEM_FN_NAME (m32rbf,mvtachi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1778
{
1779
#define FLD(f) abuf->fields.sfmt_st_plus.f
1780
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1781
  int UNUSED written = 0;
1782
  IADDR UNUSED pc = abuf->addr;
1783
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1784
 
1785
  {
1786
    DI opval = ORDI (ANDDI (GET_H_ACCUM (), MAKEDI (0, 0xffffffff)), SLLDI (EXTSIDI (* FLD (i_src1)), 32));
1787
    SET_H_ACCUM (opval);
1788
    TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1789
  }
1790
 
1791
  return vpc;
1792
#undef FLD
1793
}
1794
 
1795
/* mvtaclo: mvtaclo $src1 */
1796
 
1797
static SEM_PC
1798
SEM_FN_NAME (m32rbf,mvtaclo) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1799
{
1800
#define FLD(f) abuf->fields.sfmt_st_plus.f
1801
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1802
  int UNUSED written = 0;
1803
  IADDR UNUSED pc = abuf->addr;
1804
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1805
 
1806
  {
1807
    DI opval = ORDI (ANDDI (GET_H_ACCUM (), MAKEDI (0xffffffff, 0)), ZEXTSIDI (* FLD (i_src1)));
1808
    SET_H_ACCUM (opval);
1809
    TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1810
  }
1811
 
1812
  return vpc;
1813
#undef FLD
1814
}
1815
 
1816
/* mvtc: mvtc $sr,$dcr */
1817
 
1818
static SEM_PC
1819
SEM_FN_NAME (m32rbf,mvtc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1820
{
1821
#define FLD(f) abuf->fields.sfmt_mvtc.f
1822
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1823
  int UNUSED written = 0;
1824
  IADDR UNUSED pc = abuf->addr;
1825
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1826
 
1827
  {
1828
    USI opval = * FLD (i_sr);
1829
    SET_H_CR (FLD (f_r1), opval);
1830
    TRACE_RESULT (current_cpu, abuf, "dcr", 'x', opval);
1831
  }
1832
 
1833
  return vpc;
1834
#undef FLD
1835
}
1836
 
1837
/* neg: neg $dr,$sr */
1838
 
1839
static SEM_PC
1840
SEM_FN_NAME (m32rbf,neg) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1841
{
1842
#define FLD(f) abuf->fields.sfmt_ld_plus.f
1843
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1844
  int UNUSED written = 0;
1845
  IADDR UNUSED pc = abuf->addr;
1846
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1847
 
1848
  {
1849
    SI opval = NEGSI (* FLD (i_sr));
1850
    * FLD (i_dr) = opval;
1851
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1852
  }
1853
 
1854
  return vpc;
1855
#undef FLD
1856
}
1857
 
1858
/* nop: nop */
1859
 
1860
static SEM_PC
1861
SEM_FN_NAME (m32rbf,nop) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1862
{
1863
#define FLD(f) abuf->fields.fmt_empty.f
1864
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1865
  int UNUSED written = 0;
1866
  IADDR UNUSED pc = abuf->addr;
1867
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1868
 
1869
PROFILE_COUNT_FILLNOPS (current_cpu, abuf->addr);
1870
 
1871
  return vpc;
1872
#undef FLD
1873
}
1874
 
1875
/* not: not $dr,$sr */
1876
 
1877
static SEM_PC
1878
SEM_FN_NAME (m32rbf,not) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1879
{
1880
#define FLD(f) abuf->fields.sfmt_ld_plus.f
1881
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1882
  int UNUSED written = 0;
1883
  IADDR UNUSED pc = abuf->addr;
1884
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1885
 
1886
  {
1887
    SI opval = INVSI (* FLD (i_sr));
1888
    * FLD (i_dr) = opval;
1889
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
1890
  }
1891
 
1892
  return vpc;
1893
#undef FLD
1894
}
1895
 
1896
/* rac: rac */
1897
 
1898
static SEM_PC
1899
SEM_FN_NAME (m32rbf,rac) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1900
{
1901
#define FLD(f) abuf->fields.fmt_empty.f
1902
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1903
  int UNUSED written = 0;
1904
  IADDR UNUSED pc = abuf->addr;
1905
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1906
 
1907
{
1908
  DI tmp_tmp1;
1909
  tmp_tmp1 = SLLDI (GET_H_ACCUM (), 1);
1910
  tmp_tmp1 = ADDDI (tmp_tmp1, MAKEDI (0, 32768));
1911
  {
1912
    DI opval = (GTDI (tmp_tmp1, MAKEDI (32767, 0xffff0000))) ? (MAKEDI (32767, 0xffff0000)) : (LTDI (tmp_tmp1, MAKEDI (0xffff8000, 0))) ? (MAKEDI (0xffff8000, 0)) : (ANDDI (tmp_tmp1, MAKEDI (0xffffffff, 0xffff0000)));
1913
    SET_H_ACCUM (opval);
1914
    TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1915
  }
1916
}
1917
 
1918
  return vpc;
1919
#undef FLD
1920
}
1921
 
1922
/* rach: rach */
1923
 
1924
static SEM_PC
1925
SEM_FN_NAME (m32rbf,rach) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1926
{
1927
#define FLD(f) abuf->fields.fmt_empty.f
1928
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1929
  int UNUSED written = 0;
1930
  IADDR UNUSED pc = abuf->addr;
1931
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1932
 
1933
{
1934
  DI tmp_tmp1;
1935
  tmp_tmp1 = ANDDI (GET_H_ACCUM (), MAKEDI (16777215, 0xffffffff));
1936
if (ANDIF (GEDI (tmp_tmp1, MAKEDI (16383, 0x80000000)), LEDI (tmp_tmp1, MAKEDI (8388607, 0xffffffff)))) {
1937
  tmp_tmp1 = MAKEDI (16383, 0x80000000);
1938
} else {
1939
if (ANDIF (GEDI (tmp_tmp1, MAKEDI (8388608, 0)), LEDI (tmp_tmp1, MAKEDI (16760832, 0)))) {
1940
  tmp_tmp1 = MAKEDI (16760832, 0);
1941
} else {
1942
  tmp_tmp1 = ANDDI (ADDDI (GET_H_ACCUM (), MAKEDI (0, 1073741824)), MAKEDI (0xffffffff, 0x80000000));
1943
}
1944
}
1945
  tmp_tmp1 = SLLDI (tmp_tmp1, 1);
1946
  {
1947
    DI opval = SRADI (SLLDI (tmp_tmp1, 7), 7);
1948
    SET_H_ACCUM (opval);
1949
    TRACE_RESULT (current_cpu, abuf, "accum", 'D', opval);
1950
  }
1951
}
1952
 
1953
  return vpc;
1954
#undef FLD
1955
}
1956
 
1957
/* rte: rte */
1958
 
1959
static SEM_PC
1960
SEM_FN_NAME (m32rbf,rte) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
1961
{
1962
#define FLD(f) abuf->fields.fmt_empty.f
1963
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
1964
  int UNUSED written = 0;
1965
  IADDR UNUSED pc = abuf->addr;
1966
  SEM_BRANCH_INIT
1967
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
1968
 
1969
{
1970
  {
1971
    USI opval = ANDSI (GET_H_CR (((UINT) 6)), -4);
1972
    SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
1973
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
1974
  }
1975
  {
1976
    USI opval = GET_H_CR (((UINT) 14));
1977
    SET_H_CR (((UINT) 6), opval);
1978
    TRACE_RESULT (current_cpu, abuf, "cr-6", 'x', opval);
1979
  }
1980
  {
1981
    UQI opval = CPU (h_bpsw);
1982
    SET_H_PSW (opval);
1983
    TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
1984
  }
1985
  {
1986
    UQI opval = CPU (h_bbpsw);
1987
    CPU (h_bpsw) = opval;
1988
    TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
1989
  }
1990
}
1991
 
1992
  SEM_BRANCH_FINI (vpc);
1993
  return vpc;
1994
#undef FLD
1995
}
1996
 
1997
/* seth: seth $dr,$hash$hi16 */
1998
 
1999
static SEM_PC
2000
SEM_FN_NAME (m32rbf,seth) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2001
{
2002
#define FLD(f) abuf->fields.sfmt_seth.f
2003
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2004
  int UNUSED written = 0;
2005
  IADDR UNUSED pc = abuf->addr;
2006
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2007
 
2008
  {
2009
    SI opval = SLLSI (FLD (f_hi16), 16);
2010
    * FLD (i_dr) = opval;
2011
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2012
  }
2013
 
2014
  return vpc;
2015
#undef FLD
2016
}
2017
 
2018
/* sll: sll $dr,$sr */
2019
 
2020
static SEM_PC
2021
SEM_FN_NAME (m32rbf,sll) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2022
{
2023
#define FLD(f) abuf->fields.sfmt_add.f
2024
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2025
  int UNUSED written = 0;
2026
  IADDR UNUSED pc = abuf->addr;
2027
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2028
 
2029
  {
2030
    SI opval = SLLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
2031
    * FLD (i_dr) = opval;
2032
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2033
  }
2034
 
2035
  return vpc;
2036
#undef FLD
2037
}
2038
 
2039
/* sll3: sll3 $dr,$sr,$simm16 */
2040
 
2041
static SEM_PC
2042
SEM_FN_NAME (m32rbf,sll3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2043
{
2044
#define FLD(f) abuf->fields.sfmt_add3.f
2045
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2046
  int UNUSED written = 0;
2047
  IADDR UNUSED pc = abuf->addr;
2048
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2049
 
2050
  {
2051
    SI opval = SLLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
2052
    * FLD (i_dr) = opval;
2053
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2054
  }
2055
 
2056
  return vpc;
2057
#undef FLD
2058
}
2059
 
2060
/* slli: slli $dr,$uimm5 */
2061
 
2062
static SEM_PC
2063
SEM_FN_NAME (m32rbf,slli) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2064
{
2065
#define FLD(f) abuf->fields.sfmt_slli.f
2066
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2067
  int UNUSED written = 0;
2068
  IADDR UNUSED pc = abuf->addr;
2069
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2070
 
2071
  {
2072
    SI opval = SLLSI (* FLD (i_dr), FLD (f_uimm5));
2073
    * FLD (i_dr) = opval;
2074
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2075
  }
2076
 
2077
  return vpc;
2078
#undef FLD
2079
}
2080
 
2081
/* sra: sra $dr,$sr */
2082
 
2083
static SEM_PC
2084
SEM_FN_NAME (m32rbf,sra) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2085
{
2086
#define FLD(f) abuf->fields.sfmt_add.f
2087
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2088
  int UNUSED written = 0;
2089
  IADDR UNUSED pc = abuf->addr;
2090
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2091
 
2092
  {
2093
    SI opval = SRASI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
2094
    * FLD (i_dr) = opval;
2095
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2096
  }
2097
 
2098
  return vpc;
2099
#undef FLD
2100
}
2101
 
2102
/* sra3: sra3 $dr,$sr,$simm16 */
2103
 
2104
static SEM_PC
2105
SEM_FN_NAME (m32rbf,sra3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2106
{
2107
#define FLD(f) abuf->fields.sfmt_add3.f
2108
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2109
  int UNUSED written = 0;
2110
  IADDR UNUSED pc = abuf->addr;
2111
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2112
 
2113
  {
2114
    SI opval = SRASI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
2115
    * FLD (i_dr) = opval;
2116
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2117
  }
2118
 
2119
  return vpc;
2120
#undef FLD
2121
}
2122
 
2123
/* srai: srai $dr,$uimm5 */
2124
 
2125
static SEM_PC
2126
SEM_FN_NAME (m32rbf,srai) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2127
{
2128
#define FLD(f) abuf->fields.sfmt_slli.f
2129
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2130
  int UNUSED written = 0;
2131
  IADDR UNUSED pc = abuf->addr;
2132
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2133
 
2134
  {
2135
    SI opval = SRASI (* FLD (i_dr), FLD (f_uimm5));
2136
    * FLD (i_dr) = opval;
2137
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2138
  }
2139
 
2140
  return vpc;
2141
#undef FLD
2142
}
2143
 
2144
/* srl: srl $dr,$sr */
2145
 
2146
static SEM_PC
2147
SEM_FN_NAME (m32rbf,srl) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2148
{
2149
#define FLD(f) abuf->fields.sfmt_add.f
2150
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2151
  int UNUSED written = 0;
2152
  IADDR UNUSED pc = abuf->addr;
2153
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2154
 
2155
  {
2156
    SI opval = SRLSI (* FLD (i_dr), ANDSI (* FLD (i_sr), 31));
2157
    * FLD (i_dr) = opval;
2158
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2159
  }
2160
 
2161
  return vpc;
2162
#undef FLD
2163
}
2164
 
2165
/* srl3: srl3 $dr,$sr,$simm16 */
2166
 
2167
static SEM_PC
2168
SEM_FN_NAME (m32rbf,srl3) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2169
{
2170
#define FLD(f) abuf->fields.sfmt_add3.f
2171
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2172
  int UNUSED written = 0;
2173
  IADDR UNUSED pc = abuf->addr;
2174
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2175
 
2176
  {
2177
    SI opval = SRLSI (* FLD (i_sr), ANDSI (FLD (f_simm16), 31));
2178
    * FLD (i_dr) = opval;
2179
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2180
  }
2181
 
2182
  return vpc;
2183
#undef FLD
2184
}
2185
 
2186
/* srli: srli $dr,$uimm5 */
2187
 
2188
static SEM_PC
2189
SEM_FN_NAME (m32rbf,srli) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2190
{
2191
#define FLD(f) abuf->fields.sfmt_slli.f
2192
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2193
  int UNUSED written = 0;
2194
  IADDR UNUSED pc = abuf->addr;
2195
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2196
 
2197
  {
2198
    SI opval = SRLSI (* FLD (i_dr), FLD (f_uimm5));
2199
    * FLD (i_dr) = opval;
2200
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2201
  }
2202
 
2203
  return vpc;
2204
#undef FLD
2205
}
2206
 
2207
/* st: st $src1,@$src2 */
2208
 
2209
static SEM_PC
2210
SEM_FN_NAME (m32rbf,st) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2211
{
2212
#define FLD(f) abuf->fields.sfmt_st_plus.f
2213
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2214
  int UNUSED written = 0;
2215
  IADDR UNUSED pc = abuf->addr;
2216
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2217
 
2218
  {
2219
    SI opval = * FLD (i_src1);
2220
    SETMEMSI (current_cpu, pc, * FLD (i_src2), opval);
2221
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2222
  }
2223
 
2224
  return vpc;
2225
#undef FLD
2226
}
2227
 
2228
/* st-d: st $src1,@($slo16,$src2) */
2229
 
2230
static SEM_PC
2231
SEM_FN_NAME (m32rbf,st_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2232
{
2233
#define FLD(f) abuf->fields.sfmt_st_d.f
2234
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2235
  int UNUSED written = 0;
2236
  IADDR UNUSED pc = abuf->addr;
2237
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2238
 
2239
  {
2240
    SI opval = * FLD (i_src1);
2241
    SETMEMSI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
2242
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2243
  }
2244
 
2245
  return vpc;
2246
#undef FLD
2247
}
2248
 
2249
/* stb: stb $src1,@$src2 */
2250
 
2251
static SEM_PC
2252
SEM_FN_NAME (m32rbf,stb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2253
{
2254
#define FLD(f) abuf->fields.sfmt_st_plus.f
2255
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2256
  int UNUSED written = 0;
2257
  IADDR UNUSED pc = abuf->addr;
2258
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2259
 
2260
  {
2261
    QI opval = * FLD (i_src1);
2262
    SETMEMQI (current_cpu, pc, * FLD (i_src2), opval);
2263
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2264
  }
2265
 
2266
  return vpc;
2267
#undef FLD
2268
}
2269
 
2270
/* stb-d: stb $src1,@($slo16,$src2) */
2271
 
2272
static SEM_PC
2273
SEM_FN_NAME (m32rbf,stb_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2274
{
2275
#define FLD(f) abuf->fields.sfmt_st_d.f
2276
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2277
  int UNUSED written = 0;
2278
  IADDR UNUSED pc = abuf->addr;
2279
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2280
 
2281
  {
2282
    QI opval = * FLD (i_src1);
2283
    SETMEMQI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
2284
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2285
  }
2286
 
2287
  return vpc;
2288
#undef FLD
2289
}
2290
 
2291
/* sth: sth $src1,@$src2 */
2292
 
2293
static SEM_PC
2294
SEM_FN_NAME (m32rbf,sth) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2295
{
2296
#define FLD(f) abuf->fields.sfmt_st_plus.f
2297
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2298
  int UNUSED written = 0;
2299
  IADDR UNUSED pc = abuf->addr;
2300
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2301
 
2302
  {
2303
    HI opval = * FLD (i_src1);
2304
    SETMEMHI (current_cpu, pc, * FLD (i_src2), opval);
2305
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2306
  }
2307
 
2308
  return vpc;
2309
#undef FLD
2310
}
2311
 
2312
/* sth-d: sth $src1,@($slo16,$src2) */
2313
 
2314
static SEM_PC
2315
SEM_FN_NAME (m32rbf,sth_d) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2316
{
2317
#define FLD(f) abuf->fields.sfmt_st_d.f
2318
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2319
  int UNUSED written = 0;
2320
  IADDR UNUSED pc = abuf->addr;
2321
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
2322
 
2323
  {
2324
    HI opval = * FLD (i_src1);
2325
    SETMEMHI (current_cpu, pc, ADDSI (* FLD (i_src2), FLD (f_simm16)), opval);
2326
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2327
  }
2328
 
2329
  return vpc;
2330
#undef FLD
2331
}
2332
 
2333
/* st-plus: st $src1,@+$src2 */
2334
 
2335
static SEM_PC
2336
SEM_FN_NAME (m32rbf,st_plus) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2337
{
2338
#define FLD(f) abuf->fields.sfmt_st_plus.f
2339
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2340
  int UNUSED written = 0;
2341
  IADDR UNUSED pc = abuf->addr;
2342
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2343
 
2344
{
2345
  SI tmp_new_src2;
2346
  tmp_new_src2 = ADDSI (* FLD (i_src2), 4);
2347
  {
2348
    SI opval = * FLD (i_src1);
2349
    SETMEMSI (current_cpu, pc, tmp_new_src2, opval);
2350
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2351
  }
2352
  {
2353
    SI opval = tmp_new_src2;
2354
    * FLD (i_src2) = opval;
2355
    TRACE_RESULT (current_cpu, abuf, "src2", 'x', opval);
2356
  }
2357
}
2358
 
2359
  return vpc;
2360
#undef FLD
2361
}
2362
 
2363
/* st-minus: st $src1,@-$src2 */
2364
 
2365
static SEM_PC
2366
SEM_FN_NAME (m32rbf,st_minus) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2367
{
2368
#define FLD(f) abuf->fields.sfmt_st_plus.f
2369
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2370
  int UNUSED written = 0;
2371
  IADDR UNUSED pc = abuf->addr;
2372
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2373
 
2374
{
2375
  SI tmp_new_src2;
2376
  tmp_new_src2 = SUBSI (* FLD (i_src2), 4);
2377
  {
2378
    SI opval = * FLD (i_src1);
2379
    SETMEMSI (current_cpu, pc, tmp_new_src2, opval);
2380
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2381
  }
2382
  {
2383
    SI opval = tmp_new_src2;
2384
    * FLD (i_src2) = opval;
2385
    TRACE_RESULT (current_cpu, abuf, "src2", 'x', opval);
2386
  }
2387
}
2388
 
2389
  return vpc;
2390
#undef FLD
2391
}
2392
 
2393
/* sub: sub $dr,$sr */
2394
 
2395
static SEM_PC
2396
SEM_FN_NAME (m32rbf,sub) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2397
{
2398
#define FLD(f) abuf->fields.sfmt_add.f
2399
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2400
  int UNUSED written = 0;
2401
  IADDR UNUSED pc = abuf->addr;
2402
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2403
 
2404
  {
2405
    SI opval = SUBSI (* FLD (i_dr), * FLD (i_sr));
2406
    * FLD (i_dr) = opval;
2407
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2408
  }
2409
 
2410
  return vpc;
2411
#undef FLD
2412
}
2413
 
2414
/* subv: subv $dr,$sr */
2415
 
2416
static SEM_PC
2417
SEM_FN_NAME (m32rbf,subv) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2418
{
2419
#define FLD(f) abuf->fields.sfmt_add.f
2420
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2421
  int UNUSED written = 0;
2422
  IADDR UNUSED pc = abuf->addr;
2423
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2424
 
2425
{
2426
  SI temp0;BI temp1;
2427
  temp0 = SUBSI (* FLD (i_dr), * FLD (i_sr));
2428
  temp1 = SUBOFSI (* FLD (i_dr), * FLD (i_sr), 0);
2429
  {
2430
    SI opval = temp0;
2431
    * FLD (i_dr) = opval;
2432
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2433
  }
2434
  {
2435
    BI opval = temp1;
2436
    CPU (h_cond) = opval;
2437
    TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
2438
  }
2439
}
2440
 
2441
  return vpc;
2442
#undef FLD
2443
}
2444
 
2445
/* subx: subx $dr,$sr */
2446
 
2447
static SEM_PC
2448
SEM_FN_NAME (m32rbf,subx) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2449
{
2450
#define FLD(f) abuf->fields.sfmt_add.f
2451
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2452
  int UNUSED written = 0;
2453
  IADDR UNUSED pc = abuf->addr;
2454
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2455
 
2456
{
2457
  SI temp0;BI temp1;
2458
  temp0 = SUBCSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
2459
  temp1 = SUBCFSI (* FLD (i_dr), * FLD (i_sr), CPU (h_cond));
2460
  {
2461
    SI opval = temp0;
2462
    * FLD (i_dr) = opval;
2463
    TRACE_RESULT (current_cpu, abuf, "dr", 'x', opval);
2464
  }
2465
  {
2466
    BI opval = temp1;
2467
    CPU (h_cond) = opval;
2468
    TRACE_RESULT (current_cpu, abuf, "condbit", 'x', opval);
2469
  }
2470
}
2471
 
2472
  return vpc;
2473
#undef FLD
2474
}
2475
 
2476
/* trap: trap $uimm4 */
2477
 
2478
static SEM_PC
2479
SEM_FN_NAME (m32rbf,trap) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2480
{
2481
#define FLD(f) abuf->fields.sfmt_trap.f
2482
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2483
  int UNUSED written = 0;
2484
  IADDR UNUSED pc = abuf->addr;
2485
  SEM_BRANCH_INIT
2486
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2487
 
2488
{
2489
  {
2490
    USI opval = GET_H_CR (((UINT) 6));
2491
    SET_H_CR (((UINT) 14), opval);
2492
    TRACE_RESULT (current_cpu, abuf, "cr-14", 'x', opval);
2493
  }
2494
  {
2495
    USI opval = ADDSI (pc, 4);
2496
    SET_H_CR (((UINT) 6), opval);
2497
    TRACE_RESULT (current_cpu, abuf, "cr-6", 'x', opval);
2498
  }
2499
  {
2500
    UQI opval = CPU (h_bpsw);
2501
    CPU (h_bbpsw) = opval;
2502
    TRACE_RESULT (current_cpu, abuf, "bbpsw", 'x', opval);
2503
  }
2504
  {
2505
    UQI opval = GET_H_PSW ();
2506
    CPU (h_bpsw) = opval;
2507
    TRACE_RESULT (current_cpu, abuf, "bpsw", 'x', opval);
2508
  }
2509
  {
2510
    UQI opval = ANDQI (GET_H_PSW (), 128);
2511
    SET_H_PSW (opval);
2512
    TRACE_RESULT (current_cpu, abuf, "psw", 'x', opval);
2513
  }
2514
  {
2515
    SI opval = m32r_trap (current_cpu, pc, FLD (f_uimm4));
2516
    SEM_BRANCH_VIA_ADDR (current_cpu, sem_arg, opval, vpc);
2517
    TRACE_RESULT (current_cpu, abuf, "pc", 'x', opval);
2518
  }
2519
}
2520
 
2521
  SEM_BRANCH_FINI (vpc);
2522
  return vpc;
2523
#undef FLD
2524
}
2525
 
2526
/* unlock: unlock $src1,@$src2 */
2527
 
2528
static SEM_PC
2529
SEM_FN_NAME (m32rbf,unlock) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
2530
{
2531
#define FLD(f) abuf->fields.sfmt_st_plus.f
2532
  ARGBUF *abuf = SEM_ARGBUF (sem_arg);
2533
  int UNUSED written = 0;
2534
  IADDR UNUSED pc = abuf->addr;
2535
  SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 2);
2536
 
2537
{
2538
if (CPU (h_lock)) {
2539
  {
2540
    SI opval = * FLD (i_src1);
2541
    SETMEMSI (current_cpu, pc, * FLD (i_src2), opval);
2542
    written |= (1 << 4);
2543
    TRACE_RESULT (current_cpu, abuf, "memory", 'x', opval);
2544
  }
2545
}
2546
  {
2547
    BI opval = 0;
2548
    CPU (h_lock) = opval;
2549
    TRACE_RESULT (current_cpu, abuf, "lock", 'x', opval);
2550
  }
2551
}
2552
 
2553
  abuf->written = written;
2554
  return vpc;
2555
#undef FLD
2556
}
2557
 
2558
/* Table of all semantic fns.  */
2559
 
2560
static const struct sem_fn_desc sem_fns[] = {
2561
  { M32RBF_INSN_X_INVALID, SEM_FN_NAME (m32rbf,x_invalid) },
2562
  { M32RBF_INSN_X_AFTER, SEM_FN_NAME (m32rbf,x_after) },
2563
  { M32RBF_INSN_X_BEFORE, SEM_FN_NAME (m32rbf,x_before) },
2564
  { M32RBF_INSN_X_CTI_CHAIN, SEM_FN_NAME (m32rbf,x_cti_chain) },
2565
  { M32RBF_INSN_X_CHAIN, SEM_FN_NAME (m32rbf,x_chain) },
2566
  { M32RBF_INSN_X_BEGIN, SEM_FN_NAME (m32rbf,x_begin) },
2567
  { M32RBF_INSN_ADD, SEM_FN_NAME (m32rbf,add) },
2568
  { M32RBF_INSN_ADD3, SEM_FN_NAME (m32rbf,add3) },
2569
  { M32RBF_INSN_AND, SEM_FN_NAME (m32rbf,and) },
2570
  { M32RBF_INSN_AND3, SEM_FN_NAME (m32rbf,and3) },
2571
  { M32RBF_INSN_OR, SEM_FN_NAME (m32rbf,or) },
2572
  { M32RBF_INSN_OR3, SEM_FN_NAME (m32rbf,or3) },
2573
  { M32RBF_INSN_XOR, SEM_FN_NAME (m32rbf,xor) },
2574
  { M32RBF_INSN_XOR3, SEM_FN_NAME (m32rbf,xor3) },
2575
  { M32RBF_INSN_ADDI, SEM_FN_NAME (m32rbf,addi) },
2576
  { M32RBF_INSN_ADDV, SEM_FN_NAME (m32rbf,addv) },
2577
  { M32RBF_INSN_ADDV3, SEM_FN_NAME (m32rbf,addv3) },
2578
  { M32RBF_INSN_ADDX, SEM_FN_NAME (m32rbf,addx) },
2579
  { M32RBF_INSN_BC8, SEM_FN_NAME (m32rbf,bc8) },
2580
  { M32RBF_INSN_BC24, SEM_FN_NAME (m32rbf,bc24) },
2581
  { M32RBF_INSN_BEQ, SEM_FN_NAME (m32rbf,beq) },
2582
  { M32RBF_INSN_BEQZ, SEM_FN_NAME (m32rbf,beqz) },
2583
  { M32RBF_INSN_BGEZ, SEM_FN_NAME (m32rbf,bgez) },
2584
  { M32RBF_INSN_BGTZ, SEM_FN_NAME (m32rbf,bgtz) },
2585
  { M32RBF_INSN_BLEZ, SEM_FN_NAME (m32rbf,blez) },
2586
  { M32RBF_INSN_BLTZ, SEM_FN_NAME (m32rbf,bltz) },
2587
  { M32RBF_INSN_BNEZ, SEM_FN_NAME (m32rbf,bnez) },
2588
  { M32RBF_INSN_BL8, SEM_FN_NAME (m32rbf,bl8) },
2589
  { M32RBF_INSN_BL24, SEM_FN_NAME (m32rbf,bl24) },
2590
  { M32RBF_INSN_BNC8, SEM_FN_NAME (m32rbf,bnc8) },
2591
  { M32RBF_INSN_BNC24, SEM_FN_NAME (m32rbf,bnc24) },
2592
  { M32RBF_INSN_BNE, SEM_FN_NAME (m32rbf,bne) },
2593
  { M32RBF_INSN_BRA8, SEM_FN_NAME (m32rbf,bra8) },
2594
  { M32RBF_INSN_BRA24, SEM_FN_NAME (m32rbf,bra24) },
2595
  { M32RBF_INSN_CMP, SEM_FN_NAME (m32rbf,cmp) },
2596
  { M32RBF_INSN_CMPI, SEM_FN_NAME (m32rbf,cmpi) },
2597
  { M32RBF_INSN_CMPU, SEM_FN_NAME (m32rbf,cmpu) },
2598
  { M32RBF_INSN_CMPUI, SEM_FN_NAME (m32rbf,cmpui) },
2599
  { M32RBF_INSN_DIV, SEM_FN_NAME (m32rbf,div) },
2600
  { M32RBF_INSN_DIVU, SEM_FN_NAME (m32rbf,divu) },
2601
  { M32RBF_INSN_REM, SEM_FN_NAME (m32rbf,rem) },
2602
  { M32RBF_INSN_REMU, SEM_FN_NAME (m32rbf,remu) },
2603
  { M32RBF_INSN_JL, SEM_FN_NAME (m32rbf,jl) },
2604
  { M32RBF_INSN_JMP, SEM_FN_NAME (m32rbf,jmp) },
2605
  { M32RBF_INSN_LD, SEM_FN_NAME (m32rbf,ld) },
2606
  { M32RBF_INSN_LD_D, SEM_FN_NAME (m32rbf,ld_d) },
2607
  { M32RBF_INSN_LDB, SEM_FN_NAME (m32rbf,ldb) },
2608
  { M32RBF_INSN_LDB_D, SEM_FN_NAME (m32rbf,ldb_d) },
2609
  { M32RBF_INSN_LDH, SEM_FN_NAME (m32rbf,ldh) },
2610
  { M32RBF_INSN_LDH_D, SEM_FN_NAME (m32rbf,ldh_d) },
2611
  { M32RBF_INSN_LDUB, SEM_FN_NAME (m32rbf,ldub) },
2612
  { M32RBF_INSN_LDUB_D, SEM_FN_NAME (m32rbf,ldub_d) },
2613
  { M32RBF_INSN_LDUH, SEM_FN_NAME (m32rbf,lduh) },
2614
  { M32RBF_INSN_LDUH_D, SEM_FN_NAME (m32rbf,lduh_d) },
2615
  { M32RBF_INSN_LD_PLUS, SEM_FN_NAME (m32rbf,ld_plus) },
2616
  { M32RBF_INSN_LD24, SEM_FN_NAME (m32rbf,ld24) },
2617
  { M32RBF_INSN_LDI8, SEM_FN_NAME (m32rbf,ldi8) },
2618
  { M32RBF_INSN_LDI16, SEM_FN_NAME (m32rbf,ldi16) },
2619
  { M32RBF_INSN_LOCK, SEM_FN_NAME (m32rbf,lock) },
2620
  { M32RBF_INSN_MACHI, SEM_FN_NAME (m32rbf,machi) },
2621
  { M32RBF_INSN_MACLO, SEM_FN_NAME (m32rbf,maclo) },
2622
  { M32RBF_INSN_MACWHI, SEM_FN_NAME (m32rbf,macwhi) },
2623
  { M32RBF_INSN_MACWLO, SEM_FN_NAME (m32rbf,macwlo) },
2624
  { M32RBF_INSN_MUL, SEM_FN_NAME (m32rbf,mul) },
2625
  { M32RBF_INSN_MULHI, SEM_FN_NAME (m32rbf,mulhi) },
2626
  { M32RBF_INSN_MULLO, SEM_FN_NAME (m32rbf,mullo) },
2627
  { M32RBF_INSN_MULWHI, SEM_FN_NAME (m32rbf,mulwhi) },
2628
  { M32RBF_INSN_MULWLO, SEM_FN_NAME (m32rbf,mulwlo) },
2629
  { M32RBF_INSN_MV, SEM_FN_NAME (m32rbf,mv) },
2630
  { M32RBF_INSN_MVFACHI, SEM_FN_NAME (m32rbf,mvfachi) },
2631
  { M32RBF_INSN_MVFACLO, SEM_FN_NAME (m32rbf,mvfaclo) },
2632
  { M32RBF_INSN_MVFACMI, SEM_FN_NAME (m32rbf,mvfacmi) },
2633
  { M32RBF_INSN_MVFC, SEM_FN_NAME (m32rbf,mvfc) },
2634
  { M32RBF_INSN_MVTACHI, SEM_FN_NAME (m32rbf,mvtachi) },
2635
  { M32RBF_INSN_MVTACLO, SEM_FN_NAME (m32rbf,mvtaclo) },
2636
  { M32RBF_INSN_MVTC, SEM_FN_NAME (m32rbf,mvtc) },
2637
  { M32RBF_INSN_NEG, SEM_FN_NAME (m32rbf,neg) },
2638
  { M32RBF_INSN_NOP, SEM_FN_NAME (m32rbf,nop) },
2639
  { M32RBF_INSN_NOT, SEM_FN_NAME (m32rbf,not) },
2640
  { M32RBF_INSN_RAC, SEM_FN_NAME (m32rbf,rac) },
2641
  { M32RBF_INSN_RACH, SEM_FN_NAME (m32rbf,rach) },
2642
  { M32RBF_INSN_RTE, SEM_FN_NAME (m32rbf,rte) },
2643
  { M32RBF_INSN_SETH, SEM_FN_NAME (m32rbf,seth) },
2644
  { M32RBF_INSN_SLL, SEM_FN_NAME (m32rbf,sll) },
2645
  { M32RBF_INSN_SLL3, SEM_FN_NAME (m32rbf,sll3) },
2646
  { M32RBF_INSN_SLLI, SEM_FN_NAME (m32rbf,slli) },
2647
  { M32RBF_INSN_SRA, SEM_FN_NAME (m32rbf,sra) },
2648
  { M32RBF_INSN_SRA3, SEM_FN_NAME (m32rbf,sra3) },
2649
  { M32RBF_INSN_SRAI, SEM_FN_NAME (m32rbf,srai) },
2650
  { M32RBF_INSN_SRL, SEM_FN_NAME (m32rbf,srl) },
2651
  { M32RBF_INSN_SRL3, SEM_FN_NAME (m32rbf,srl3) },
2652
  { M32RBF_INSN_SRLI, SEM_FN_NAME (m32rbf,srli) },
2653
  { M32RBF_INSN_ST, SEM_FN_NAME (m32rbf,st) },
2654
  { M32RBF_INSN_ST_D, SEM_FN_NAME (m32rbf,st_d) },
2655
  { M32RBF_INSN_STB, SEM_FN_NAME (m32rbf,stb) },
2656
  { M32RBF_INSN_STB_D, SEM_FN_NAME (m32rbf,stb_d) },
2657
  { M32RBF_INSN_STH, SEM_FN_NAME (m32rbf,sth) },
2658
  { M32RBF_INSN_STH_D, SEM_FN_NAME (m32rbf,sth_d) },
2659
  { M32RBF_INSN_ST_PLUS, SEM_FN_NAME (m32rbf,st_plus) },
2660
  { M32RBF_INSN_ST_MINUS, SEM_FN_NAME (m32rbf,st_minus) },
2661
  { M32RBF_INSN_SUB, SEM_FN_NAME (m32rbf,sub) },
2662
  { M32RBF_INSN_SUBV, SEM_FN_NAME (m32rbf,subv) },
2663
  { M32RBF_INSN_SUBX, SEM_FN_NAME (m32rbf,subx) },
2664
  { M32RBF_INSN_TRAP, SEM_FN_NAME (m32rbf,trap) },
2665
  { M32RBF_INSN_UNLOCK, SEM_FN_NAME (m32rbf,unlock) },
2666
  { 0, 0 }
2667
};
2668
 
2669
/* Add the semantic fns to IDESC_TABLE.  */
2670
 
2671
void
2672
SEM_FN_NAME (m32rbf,init_idesc_table) (SIM_CPU *current_cpu)
2673
{
2674
  IDESC *idesc_table = CPU_IDESC (current_cpu);
2675
  const struct sem_fn_desc *sf;
2676
  int mach_num = MACH_NUM (CPU_MACH (current_cpu));
2677
 
2678
  for (sf = &sem_fns[0]; sf->fn != 0; ++sf)
2679
    {
2680
      const CGEN_INSN *insn = idesc_table[sf->index].idata;
2681
      int valid_p = (CGEN_INSN_VIRTUAL_P (insn)
2682
                     || CGEN_INSN_MACH_HAS_P (insn, mach_num));
2683
#if FAST_P
2684
      if (valid_p)
2685
        idesc_table[sf->index].sem_fast = sf->fn;
2686
      else
2687
        idesc_table[sf->index].sem_fast = SEM_FN_NAME (m32rbf,x_invalid);
2688
#else
2689
      if (valid_p)
2690
        idesc_table[sf->index].sem_full = sf->fn;
2691
      else
2692
        idesc_table[sf->index].sem_full = SEM_FN_NAME (m32rbf,x_invalid);
2693
#endif
2694
    }
2695
}
2696
 

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