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/* toplevel.c -- Top level simulator source file

   Copyright (C) 1999 Damjan Lampret, lampret@opencores.org

This file is part of OpenRISC 1000 Architectural Simulator.

This program is free software; you can redistribute it and/or modify

it under the terms of the GNU General Public License as published by

the Free Software Foundation; either version 2 of the License, or

(at your option) any later version.

This program is distributed in the hope that it will be useful,

but WITHOUT ANY WARRANTY; without even the implied warranty of

MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

GNU General Public License for more details.

You should have received a copy of the GNU General Public License

along with this program; if not, write to the Free Software

Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. */

/* Simulator commands. Help and version output. SIGINT processing.

Stdout redirection is specific to linux (I need to fix this). */

#include "config.h"

#include <stdio.h>

#include <ctype.h>

#include <string.h>

#include <stdlib.h>

#include <unistd.h>

#include <signal.h>

#include <stdarg.h>

#include <fcntl.h>

#ifdef HAVE_LIBREADLINE

#include <readline/readline.h>

#include <readline/history.h>

#endif /* HAVE_LIBREADLINE */

#include "arch.h"

#include "parse.h"

#include "abstract.h"

#include "labels.h"

#include "execute.h"

#include "sim-config.h"

#include "spr_defs.h"

#include "sprs.h"

#include "dma.h"

#include "vapi.h"

#include "gdbcomm.h"

#include "debug_unit.h"

#include "coff.h"

/* CVS revision number. */

const char rcsrev[] = "$Revision: 1.72 $";

/* Continuos run versus single step tracing switch. */

int cont_run;

/* History of execution */

int histexec[HISTEXEC_LEN];

char *sim_commands [] = {

  "q", "t", "help", "de", "dm", "run", "pr", "pm", "pc",

  "reset", "break", "hist", "stats", "stall" "info",

  "r", "dv",

#if !FAST_SIM

  "set",

#endif

};

inline void debug(int level, const char *format, ...)

{

  char *p;

  va_list ap;

  if (config.sim.debug >= level) {

    if ((p = malloc(1000)) == NULL)

      return;

    va_start(ap, format);

    (void) vsnprintf(p, 1000, format, ap);

    va_end(ap);

    printf("%s", p);

    fflush(stdout);

    free(p);

  } else {

#if DEBUG

  if ((p = malloc(1000)) == NULL)

    return;

  va_start(ap, format);

  (void) vsnprintf(p, 1000, format, ap);

  va_end(ap);

  printf("%s\n", p);

  fflush(stdout);

  free(p);

#endif

  }

}

void ctrl_c(signum)

     int signum;

{

  cont_run = cpu_stalled ? 0 : 1;

  runtime.sim.iprompt = 1;

  set_stall_state (0);

  signal(SIGINT, ctrl_c);

}

void version()

{

  printf ("\n");

  printf ("OpenRISC 1000 (OR32) Architectural Simulator, %s\n", rcsrev);

  printf ("Copyright (C) 1999 Damjan Lampret, lampret@opencores.org\n");

  printf ("Copyright (C) 2000 Damjan Lampret, lampret@opencores.org\n");

  printf ("                   Jimmy Chen-Min Chen, jimmy@ee.nctu.edu.tw\n");

  printf ("                   Johan Rydberg, johan.rydberg@insight.se\n");

  printf ("                   Marko Mlinar, markom@opencores.org\n");

  printf ("Copyright (C) 2001 Simon Srot, simons@opencores.org\n");

  printf ("                   Marko Mlinar, markom@opencores.org\n");

  printf ("Visit http://www.opencores.org for more information about ");

  printf ("OpenRISC 1000 and\nother open source cores.\n\n");

  printf ("This software comes with ABSOLUTELY NO WARRANTY; for ");

  printf ("details see COPYING.\nThis is free software, and you ");

  printf ("are welcome to redistribute it under certain\nconditions; ");

  printf ("for details see COPYING.\n");

}

void

help()

{

  printf("q      - quit simulator\n");

  printf("r      - display all registers\n");

  printf("t      - execute next instruction\n");

  printf("run <instructions> [<hush>]  - execute <instruction> instructions, no reg dump if hush\n");

  printf("pr <r> <value>     - patch register <r> with <value>\n");

  printf("dm <fromaddr> [<toaddr>] - display memory from <fromaddr> to <toaddr>\n");

  printf("de <fromaddr> [<toaddr>] - debug insn memory\n");

  printf("pm <addr> <value>  - patch memory location <addr> with <value>\n");

  printf("pc <value>     - patch PC register with <value>\n");

  printf("break <addr>     - toggle breakpoint at address <addr>\n");

  printf("reset      - simulator reset\n");

  printf("hist       - execution history\n");

  printf("stall                    - stalls the processor and gives control to the debugger\n");

  printf("stats <num|clear>    - execution statistics num or clear it.\n");

  printf("info       - configuration info (caches etc.)\n");

  printf("dv <fromaddr> [<toaddr>] [<modname>] - dumps memory as verilog (use redirect)\n");

  printf("dh <fromaddr> [<toaddr>] - dumps memory as hex code (use redirect)\n");

  printf("<cmd> > <filename>   - redirect simulator stdout to <filename> (and not emulated printf)\n");

#if !FAST_SIM

  printf("set <section> <item> = <param>  - set configuration.  See sim.cfg for more information.\n");

  printf("debug      - toggles simulator debug mode\n");

#endif

  printf("help       - available commands (this list)\n");

}

void debugmem (unsigned long from, unsigned long to );

/* Resets all subunits */

void sim_reset ()

{

  uart_reset();

  dma_reset();

  eth_reset();

  gpio_reset();

  tick_reset();

  pm_reset();

  pic_reset();

  mc_reset();

  du_reset ();

  cpu_reset();

}

/* Initalizes all devices and sim */

void sim_init ()

{

  init_memory_table ();

  init_labels();

  init_breakpoints();

  initstats();

  build_automata();

  if (config.sim.profile) {

    runtime.sim.fprof = fopen(config.sim.prof_fn, "wt+");

    if(!runtime.sim.fprof) {

      fprintf(stderr, "ERROR: Problems opening profile file.\n");

      exit (1);

    } else

      fprintf(runtime.sim.fprof, "+00000000 FFFFFFFF FFFFFFFF main\n");

  }

  if (config.sim.mprofile) {

    runtime.sim.fmprof = fopen(config.sim.mprof_fn, "wb+");

    if(!runtime.sim.fmprof) {

      fprintf(stderr, "ERROR: Problems opening memory profile file.\n");

      exit (1);

    }

  }

  if (config.sim.exe_log) {

    runtime.sim.fexe_log = fopen(config.sim.exe_log_fn, "wt+");

    if(!runtime.sim.fexe_log) {

      printf("ERROR: Problems opening exe_log file.\n");

      exit (1);

    }

  }

  if (config.sim.spr_log) {

    printf("OPENING SPRLOG\n");

    runtime.sim.fspr_log = fopen(config.sim.spr_log_fn, "wt+");

    if (!runtime.sim.fspr_log) {

      printf("ERROR: Problems opening spr_log file.\n");

      exit(1);

    }

  }

  /* Initialize memory */

  {

    extern struct dev_memarea *dev_list;

    struct dev_memarea *area;

    int i;

    if (config.memory.type == MT_RANDOM) {

      unsigned int val = 0;

      if (config.memory.random_seed == -1) {

        runtime.memory.random_seed = time(NULL);

        /* Print out the seed just in case we ever need to debug */

        printf("Seeding random generator with value %d\n", config.memory.random_seed);

      } else

        runtime.memory.random_seed = config.memory.random_seed;

      srandom(runtime.memory.random_seed);

      for (area = dev_list; area; area = area->next)

        for(i = 0; i < area->size; i++) {

          val = random();

          setsim_mem8(i + area->addr_compare, val & 0xFF);

        }

    } else if(config.memory.type == MT_PATTERN) {

      for (area = dev_list; area; area = area->next)

        for(i = 0; i < area->size; i++)

          setsim_mem8(i + area->addr_compare, config.memory.pattern);

    } else if (config.memory.type != MT_UNKNOWN) {

      fprintf(stderr, "Invalid memory configuration type.\n");

      exit(1);

    }

  }

  if(runtime.sim.filename) {

    unsigned long endaddr = 0xFFFFFFFF;

    endaddr = loadcode(runtime.sim.filename, 0, 0); /* MM170901 always load at address zero.  */

    if (endaddr == -1) {

      fprintf(stderr, "Problems loading boot code.\n");

      exit(1);

    }

  }

#if !FAST_SIM /* We assume we have valid configuration with fsim*/

  /* Disable gdb debugging, if debug module is not available.  */

  if (config.debug.gdb_enabled && !config.debug.enabled) {

    config.debug.gdb_enabled = 0;

    if (config.sim.verbose)

      fprintf (stderr, "WARNING: Debug module not enabled, cannot start gdb.\n");

  }

#endif

  if (config.debug.gdb_enabled)

    gdbcomm_init ();

#if !FAST_SIM /* We assume we have valid configuration with fsim*/

  /* Enable dependency stats, if we want to do history analisis */

  if (config.sim.history && !config.cpu.dependstats) {

    config.cpu.dependstats = 1;

    if (config.sim.verbose)

      fprintf (stderr, "WARNING: dependstats stats must be enabled to do history analisis.\n");

  }

#endif

#if !FAST_SIM /* We assume we have valid configuration with fsim*/  

  /* Debug forces verbose */

  if (config.sim.debug && !config.sim.verbose) {

    config.sim.verbose = 1;

    fprintf (stderr, "WARNING: verbose turned on.\n");

  }

#endif

  /* Start VAPI before device initialization.  */

  if (config.vapi.enabled) {

    runtime.vapi.enabled = 1;

    vapi_init ();

    if (config.sim.verbose)

      printf ("VAPI started, waiting for clients.\n");

  }

  sim_reset ();

  lock_memory_table ();

  /* Wait till all test are connected.  */

  if (runtime.vapi.enabled) {

    int numu = vapi_num_unconnected (0);

    if (numu) {

      printf ("\nWaiting for VAPI tests with ids:\n");

      vapi_num_unconnected (1);

      printf ("\n");

      while (numu = vapi_num_unconnected (0)) {

        vapi_check ();

        printf ("\rStill waiting for %i VAPI test(s) to connect.       ", numu);

        usleep (100);

      }

      printf ("\n");

    }

    printf ("All devices connected                         \n");

  }

  /* simulator is initialized */

  runtime.sim.init = 0;

}

/* Display info about various modules */

void sim_info () {

  sprs_status();

  printf ("\n");

  memory_table_status ();

  if (config.immu.enabled) itlb_status(-1);

  if (config.dmmu.enabled) dtlb_status(-1);

  if (config.ic.enabled) ic_info();

  if (config.dc.enabled) dc_info();

  if (config.bpb.enabled) bpb_info();

  if (config.bpb.btic) btic_info();

  if (config.nuarts) uart_status();

  if (config.ndmas) dma_status();

  if (config.nethernets) eth_status();

  if (config.ngpios) gpio_status();

}

/* Cleanup */

void sim_done ()

{

  if (config.sim.profile) {

    extern int cycles;

    fprintf(runtime.sim.fprof,"-%08X FFFFFFFF\n", cycles);

    fclose(runtime.sim.fprof);

  }

  if (config.sim.mprofile)

    fclose(runtime.sim.fmprof);

  if (config.sim.exe_log)   fclose(runtime.sim.fexe_log);

  if (runtime.vapi.enabled)  vapi_done ();

  done_memory_table ();

  exit(0);

}

int main(argc, argv)

     int argc;

     char *argv[];

{

  char *linestr;

  char item1[500], b2[500], prev_str[500] = "";

  char *redirstr;

  int hush = 0;

  int first_prompt = 1;

  srand(getpid());

  init_defconfig();

  if (parse_args(argc, argv)) {

    printf("Usage: %s [options] <filename>\n", argv[0]);

    printf("Options:\n");

    printf(" -v                 version and copyright note\n");

    printf(" -i                 enable interactive command prompt\n");

    printf(" --nosrv            do not launch JTAG proxy server\n"); /* (CZ) */

    printf(" --srv <n>          launch JTAG proxy server on port <n>; [random]\n"); /* (CZ) */

#if !FAST_SIM

    printf(" -f or --file       load script file [sim.cfg]\n");

    printf(" --profile          enable profiling\n");

    printf(" --mprofile         enable memory profiling\n");

#endif

    printf(" --output-cfg       prints C structure of current configuration to standard output\n");

    exit(-1);

  }

#ifdef HAVE_LIBREADLINE

  initialize_readline (); /* Bind our completer. */

#endif

#if !FAST_SIM

  /* Read configuration file.  */

  if (!runtime.sim.script_file_specified)

    read_script_file ("sim.cfg");

  if (!runtime.sim.script_file_specified && config.sim.verbose)

    fprintf (stderr, "WARNING: No config file read, assuming default configuration.\n");

#else

  printf ("\n\tNOTE: running fast sim with fixed configuration!\n\n");

#endif

  if (runtime.sim.output_cfg) {

    output_cfg (stdout);

    exit (0);

  }

  print_config();

  sim_init ();

  signal(SIGINT, ctrl_c);

  while(1) {

    if (runtime.sim.iprompt) {

      if (config.debug.gdb_enabled)

        {

          printf ("(sim) ");

          fflush(stdout);

          HandleServerSocket(true);  /* block & check_stdin = true */

        }

#ifdef HAVE_LIBREADLINE

      /* Must disable readline in new mode. It isn't compatible

         with non blocking environments */

      if(!config.debug.gdb_enabled)

        linestr = readline("(sim) ");

      else

        linestr = fgets(b2, sizeof b2, stdin);

#else

      if(!config.debug.gdb_enabled)

        printf ("(sim) ");

      linestr = fgets(b2, sizeof b2, stdin);

#endif

    } else

      strcpy(linestr = b2, "run -1 hush");

    if (!linestr)

      break;

    linestr = stripwhite (linestr);

#ifdef HAVE_LIBREADLINE

    /* Readline only works in the old mode */

    if(!server_fd)

      {

        if (strlen(linestr) == 0) {

          char *l = repeat_last_command ();

          if (l) {

      free (linestr);

      linestr = l;

          }

        }

        if (*linestr) {

          add_history (linestr);

        }

      }

#endif /* HAVE_LIBREADLINE */

    if (redirstr = strstr(linestr, ">")) {

      *redirstr = '\0';

      strtoken(&redirstr[1], item1, 1);

      freopen(item1, "w+", stdout);

    }

    if (linestr[0] == '\n')

      strcpy (linestr, &prev_str[0]);

    else

      strcpy (&prev_str[0], linestr);

    strtoken(linestr, item1, 1);

    if (strcmp(item1, "q") == 0) {  /* quit */

      printf ("\n");

      sim_done ();

    } else

    if (strcmp(item1, "help") == 0) /* help */

      help();

    else

    if (strcmp(item1, "t") == 0) {  /* trace */

      cont_run = 1;

    } else

    if (strcmp(item1, "dm") == 0) { /* dump memory */

      char item2[20];

      char item3[20];

      static int from = 0, to = 0;

      strtoken(linestr, item2, 2);

      strtoken(linestr, item3, 3);

      if (strlen(item2)) {

        if (item2[0] == '_')

          from = eval_label(item2);

        else

          from = strtoul(item2, NULL, 0);

        to = from + 0x40;

      }

      if (strlen(item3))

        to = strtoul(item3, NULL, 0);

      dumpmemory(from, to, 0, 1);

            printf("\n");

    } else

    if (strcmp(item1, "dv") == 0) {/* dump memory as verilog*/

      char item2[20];

      char item3[20];

      char item4[20];

      static int from = 0, to = 0;

      strtoken(linestr, item2, 2);

      strtoken(linestr, item3, 3);

      strtoken(linestr, item4, 4);

      if (strlen(item2)) {

        if (item2[0] == '_')

          from = eval_label(item2);

        else

          from = strtoul(item2, NULL, 0);

        to = from + 0x40;

      }

      if (strlen(item3))

        to = strtoul(item3, NULL, 0);

      if (!strlen(item4))

        strcpy(item4, "or1k_mem");

      dumpverilog(item4, from, to);

        printf("\n");

    } else

    if (strcmp(item1, "dh") == 0) {/* dump memory as hex*/

      char item2[20];

      char item3[20];

      static int from = 0, to = 0;

      strtoken(linestr, item2, 2);

      strtoken(linestr, item3, 3);

      if (strlen(item2)) {

        if (item2[0] == '_')

          from = eval_label(item2);

        else

          from = strtoul(item2, NULL, 0);

        to = from + 0x40;

      }

      if (strlen(item3))

        to = strtoul(item3, NULL, 0);

      dumphex(from, to);

        printf("\n");

    } else

    if (strcmp(item1, "pm") == 0) { /* patch memory */

      char item2[20];

      char item3[20];

      static int addr = 0;

      int breakpoint = 0;

      strtoken(linestr, item2, 2);

      strtoken(linestr, item3, 3);

      if (strlen(item2))

        if (item2[0] == '_')

          addr = eval_label(item2);

        else

          addr = strtoul(item2, NULL, 0);

      set_mem32(addr, strtoul(item3, NULL, 0), &breakpoint);

    } else

    if (strcmp(item1, "pr") == 0) { /* patch regs */

      char item2[20];

      char item3[20];

      strtoken(linestr, item2, 2);

      strtoken(linestr, item3, 3);

      setsim_reg32(strtoul(item2, NULL,0), strtoul(item3, NULL, 0));

    } else

    if (strcmp(item1, "pc") == 0) { /* patch PC */

      char item2[20];

      strtoken(linestr, item2, 2);

      pc = strtoul(item2, NULL, 0);

    } else

    if (strcmp(item1, "break") == 0) {  /* set/clear breakpoint */

      char item2[20];

      strtoken(linestr, item2, 2);

      set_insnbrkpoint(strtoul(item2, NULL, 0));

    } else

    if (strcmp(item1, "r") == 0) {  /* dump regs */

      dumpreg();

    } else

    if (strcmp(item1, "de") == 0) { /* reset simulator */

      char item2[20];

      char item3[20];

      static int from = 0, to = 0;

      strtoken(linestr, item2, 2);

      strtoken(linestr, item3, 3);