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phoenix |
//==========================================================================
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//
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// devs/serial/mips/ref4955/src/mips_tx49_ref4955_ser.inl
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//
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// REF4955 Serial I/O definitions.
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//
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//==========================================================================
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//####ECOSGPLCOPYRIGHTBEGIN####
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// -------------------------------------------
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// This file is part of eCos, the Embedded Configurable Operating System.
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// Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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//
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// eCos is free software; you can redistribute it and/or modify it under
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// the terms of the GNU General Public License as published by the Free
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// Software Foundation; either version 2 or (at your option) any later version.
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//
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// eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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// WARRANTY; without even the implied warranty of MERCHANTABILITY or
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// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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// for more details.
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//
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// You should have received a copy of the GNU General Public License along
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// with eCos; if not, write to the Free Software Foundation, Inc.,
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// 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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//
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// As a special exception, if other files instantiate templates or use macros
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// or inline functions from this file, or you compile this file and link it
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// with other works to produce a work based on this file, this file does not
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// by itself cause the resulting work to be covered by the GNU General Public
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// License. However the source code for this file must still be made available
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// in accordance with section (3) of the GNU General Public License.
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//
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// This exception does not invalidate any other reasons why a work based on
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// this file might be covered by the GNU General Public License.
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//
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// Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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// at http://sources.redhat.com/ecos/ecos-license/
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// -------------------------------------------
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//####ECOSGPLCOPYRIGHTEND####
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//==========================================================================
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//#####DESCRIPTIONBEGIN####
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//
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// Author(s): jskov
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// Contributors:gthomas, jskov
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// Date: 2000-05-24
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// Purpose: REF4955 Serial definitions
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//####DESCRIPTIONEND####
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//==========================================================================
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#include
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//-----------------------------------------------------------------------------
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// There are two serial ports.
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#define CYG_DEVICE_SERIAL_SCC1 0xb40003f8 // port 1
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#define CYG_DEVICE_SERIAL_SCC2 0xb40002f8 // port 2
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//-----------------------------------------------------------------------------
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// The REF4955 board has a 14.318 MHz crystal, but the PC87338 part
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// uses a 24MHz internal clock for baud rate calculation.
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#define BAUD_DIVISOR(_x_) 24000000/13/16/(_x_)
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static unsigned short select_baud[] = {
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0, // Unused
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0, // 50
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0, // 75
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0, // 110
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0, // 134.5
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0, // 150
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0, // 200
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0, // 300
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0, // 600
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BAUD_DIVISOR(1200),
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0, // 1800
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BAUD_DIVISOR(2400),
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0, // 3600
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BAUD_DIVISOR(4800),
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BAUD_DIVISOR(9600),
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BAUD_DIVISOR(14400),
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BAUD_DIVISOR(19200),
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BAUD_DIVISOR(38400),
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BAUD_DIVISOR(57600),
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BAUD_DIVISOR(115200),
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0, // 230400
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};
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//-----------------------------------------------------------------------------
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// Port 0 descriptors
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#ifdef CYGPKG_IO_SERIAL_MIPS_REF4955_SERIAL0
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static pc_serial_info pc_serial_info0 = {CYG_DEVICE_SERIAL_SCC1,
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CYGNUM_HAL_INTERRUPT_DEBUG_UART};
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#if CYGNUM_IO_SERIAL_MIPS_REF4955_SERIAL0_BUFSIZE > 0
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static unsigned char pc_serial_out_buf0[CYGNUM_IO_SERIAL_MIPS_REF4955_SERIAL0_BUFSIZE];
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static unsigned char pc_serial_in_buf0[CYGNUM_IO_SERIAL_MIPS_REF4955_SERIAL0_BUFSIZE];
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static SERIAL_CHANNEL_USING_INTERRUPTS(pc_serial_channel0,
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pc_serial_funs,
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pc_serial_info0,
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CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_MIPS_REF4955_SERIAL0_BAUD),
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CYG_SERIAL_STOP_DEFAULT,
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CYG_SERIAL_PARITY_DEFAULT,
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CYG_SERIAL_WORD_LENGTH_DEFAULT,
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CYG_SERIAL_FLAGS_DEFAULT,
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&pc_serial_out_buf0[0],
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sizeof(pc_serial_out_buf0),
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&pc_serial_in_buf0[0],
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sizeof(pc_serial_in_buf0)
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);
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#else
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static SERIAL_CHANNEL(pc_serial_channel0,
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pc_serial_funs,
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pc_serial_info0,
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CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_MIPS_REF4955_SERIAL0_BAUD),
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CYG_SERIAL_STOP_DEFAULT,
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CYG_SERIAL_PARITY_DEFAULT,
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CYG_SERIAL_WORD_LENGTH_DEFAULT,
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CYG_SERIAL_FLAGS_DEFAULT
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);
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#endif
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DEVTAB_ENTRY(pc_serial_io0,
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CYGDAT_IO_SERIAL_MIPS_REF4955_SERIAL0_NAME,
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0, // Does not depend on a lower level interface
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&cyg_io_serial_devio,
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pc_serial_init,
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pc_serial_lookup, // Serial driver may need initializing
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&pc_serial_channel0
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);
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#endif
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//-----------------------------------------------------------------------------
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// Port 1 descriptors
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#ifdef CYGPKG_IO_SERIAL_MIPS_REF4955_SERIAL1
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static pc_serial_info pc_serial_info1 = {CYG_DEVICE_SERIAL_SCC2,
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CYGNUM_HAL_INTERRUPT_USER_UART};
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#if CYGNUM_IO_SERIAL_MIPS_REF4955_SERIAL1_BUFSIZE > 0
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static unsigned char pc_serial_out_buf1[CYGNUM_IO_SERIAL_MIPS_REF4955_SERIAL1_BUFSIZE];
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static unsigned char pc_serial_in_buf1[CYGNUM_IO_SERIAL_MIPS_REF4955_SERIAL1_BUFSIZE];
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static SERIAL_CHANNEL_USING_INTERRUPTS(pc_serial_channel1,
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pc_serial_funs,
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pc_serial_info1,
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CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_MIPS_REF4955_SERIAL1_BAUD),
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CYG_SERIAL_STOP_DEFAULT,
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CYG_SERIAL_PARITY_DEFAULT,
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CYG_SERIAL_WORD_LENGTH_DEFAULT,
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CYG_SERIAL_FLAGS_DEFAULT,
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&pc_serial_out_buf1[0],
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sizeof(pc_serial_out_buf1),
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&pc_serial_in_buf1[0],
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sizeof(pc_serial_in_buf1)
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);
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#else
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static SERIAL_CHANNEL(pc_serial_channel1,
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pc_serial_funs,
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pc_serial_info1,
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CYG_SERIAL_BAUD_RATE(CYGNUM_IO_SERIAL_MIPS_REF4955_SERIAL1_BAUD),
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CYG_SERIAL_STOP_DEFAULT,
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CYG_SERIAL_PARITY_DEFAULT,
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CYG_SERIAL_WORD_LENGTH_DEFAULT,
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CYG_SERIAL_FLAGS_DEFAULT
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);
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#endif
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DEVTAB_ENTRY(pc_serial_io1,
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CYGDAT_IO_SERIAL_MIPS_REF4955_SERIAL1_NAME,
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0, // Does not depend on a lower level interface
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&cyg_io_serial_devio,
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pc_serial_init,
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pc_serial_lookup, // Serial driver may need initializing
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&pc_serial_channel1
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);
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#endif
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// EOF mips_tx49_ref4955_ser.inl
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