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[/] [or1k/] [trunk/] [ecos-2.0/] [packages/] [hal/] [mips/] [idt32334/] [v2_0/] [include/] [variant.inc] - Blame information for rev 1765

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1 1254 phoenix
#ifndef CYGONCE_HAL_VARIANT_INC
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#define CYGONCE_HAL_VARIANT_INC
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##=============================================================================
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##
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##      variant.inc
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##
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##      IDT32334 family assembler header file
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##
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##=============================================================================
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#####ECOSGPLCOPYRIGHTBEGIN####
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## -------------------------------------------
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## This file is part of eCos, the Embedded Configurable Operating System.
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## Copyright (C) 1998, 1999, 2000, 2001, 2002 Red Hat, Inc.
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##
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## eCos is free software; you can redistribute it and/or modify it under
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## the terms of the GNU General Public License as published by the Free
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## Software Foundation; either version 2 or (at your option) any later version.
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##
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## eCos is distributed in the hope that it will be useful, but WITHOUT ANY
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## WARRANTY; without even the implied warranty of MERCHANTABILITY or
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## FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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## for more details.
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##
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## You should have received a copy of the GNU General Public License along
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## with eCos; if not, write to the Free Software Foundation, Inc.,
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## 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
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##
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## As a special exception, if other files instantiate templates or use macros
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## or inline functions from this file, or you compile this file and link it
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## with other works to produce a work based on this file, this file does not
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## by itself cause the resulting work to be covered by the GNU General Public
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## License. However the source code for this file must still be made available
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## in accordance with section (3) of the GNU General Public License.
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##
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## This exception does not invalidate any other reasons why a work based on
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## this file might be covered by the GNU General Public License.
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##
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## Alternative licenses for eCos may be arranged by contacting Red Hat, Inc.
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## at http://sources.redhat.com/ecos/ecos-license/
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## -------------------------------------------
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#####ECOSGPLCOPYRIGHTEND####
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##=============================================================================
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#######DESCRIPTIONBEGIN####
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##
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## Author(s):    tmichals
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## Contributors: nickg
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## Date:         2003-02-13
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## Purpose:      MIPS IDT32334 family definitions.
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## Description:  This file contains various definitions and macros that are
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##               useful for writing assembly code for the MIPS IDT32334 CPU family.
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## Usage:
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##               #include 
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##               ...
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##
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##
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######DESCRIPTIONEND####
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##
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##=============================================================================
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#include 
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#include 
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#include 
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#define CYGARC_HAL_COMMON_EXPORT_CPU_MACROS
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#ifndef __ASSEMBLER__
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#define __ASSEMBLER__
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#endif
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//#include 
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#define CYGARC_ADDRESS_REG_UNCACHED(reg)               \
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        and     reg, reg, ~CYGARC_KSEG_MASK;           \
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        or      reg, reg, CYGARC_KSEG_UNCACHED
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#define CYGARC_KSEG_MASK                               (0xE0000000)
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#define CYGARC_KSEG_CACHED                             (0x80000000)
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#define CYGARC_KSEG_UNCACHED                           (0xA0000000)
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#define CYGARC_KSEG_CACHED_BASE                        (0x80000000)
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#define CYGARC_KSEG_UNCACHED_BASE                      (0xA0000000)
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//-----------------------------------------------------------------------------
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// Load Address and Relocate. This macro is used in code that may be
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// linked to execute out of RAM but is actually executed from ROM. The
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// code that initializes the memory controller and copies the ROM
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// contents to RAM must work in this way, for example. This macro is used
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// in place of an "la" macro instruction when loading code and data
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// addresses.  There are two versions of the macro here. The first
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// assumes that we are executing in the ROM space at 0xbfc00000 and are
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// linked to run in the RAM space at 0x80000000.  It simply adds the
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// difference between the two to the loaded address.  The second is more
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// code, but will execute correctly at either location since it
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// calculates the difference at runtime.  The second variant is enabled
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// by default.
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#ifdef CYG_HAL_STARTUP_ROMRAM
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        .macro  lar     reg,addr
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.set    noat
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        move    $at,ra                  # save ra
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        la      \reg,\addr              # get address into register
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        la      ra,x\@                  # get linked address of label
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        sub     \reg,\reg,ra            # subtract it from value
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        bal     x\@                     # branch and link to label
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        nop                             #  to get current actual address
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x\@:
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        add     \reg,\reg,ra            # add actual address
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        move    ra,$at                  # restore ra
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.set    at
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        .endm
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#define CYGPKG_HAL_MIPS_LAR_DEFINED
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#endif
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#------------------------------------------------------------------------------
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# Cache macros.
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#ifndef CYGPKG_HAL_MIPS_CACHE_DEFINED
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        .macro  hal_cache_init
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        # Setup a temporary stack pointer for running C code.
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        la      a0,__interrupt_stack
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        move    sp,a0
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        CYGARC_ADDRESS_REG_UNCACHED(sp)
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        # Read the CONFIG1 register into a0
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#       mfc0    a0, C0_CONFIG
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        nop
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        nop
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        nop
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        # Jump to C-code to initialize caches (uncached)
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        lar     k0, hal_c_cache_init
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        CYGARC_ADDRESS_REG_UNCACHED(k0)
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        jalr    k0
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        nop
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        .endm
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#define CYGPKG_HAL_MIPS_CACHE_DEFINED
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#endif
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##-----------------------------------------------------------------------------
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## Define CPU variant for architecture HAL.
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##-----------------------------------------------------------------------------
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## Indicate that the ISR tables are defined in variant.S
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#define CYG_HAL_MIPS_ISR_TABLES_DEFINED
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##-----------------------------------------------------------------------------
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##
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#ifndef CYGPKG_HAL_MIPS_MEMC_DEFINED
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## ROM timing characteristics are dependent on the clock speed.
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        .macro  hal_memc_init
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        .endm
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#define CYGPKG_HAL_MIPS_MEMC_DEFINED
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#endif
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##-----------------------------------------------------------------------------
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## IDT32334 interrupt handling.
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#ifndef CYGPKG_HAL_MIPS_INTC_DEFINED
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        # Set all ILRX registers to 0, masking all external interrupts.
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        .macro  hal_intc_init
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        .endm
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        .macro  hal_intc_decode vnum
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        mfc0    v1,cause
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        nop
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        mfc0    v0,status
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        nop
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        and     v1,v0,v1
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        srl     v1,v1,11                        # shift IP bits to ls bits
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        andi    v1,v1,0x7F                      # isolate IP bits
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        la      v0,hal_intc_translation_table   # address of translation table
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        add     v0,v0,v1                        # offset of index byte
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        lb      \vnum,0(v0)                     # load it
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        .endm
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#ifndef CYGPKG_HAL_MIPS_INTC_TRANSLATE_DEFINED
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#ifdef CYGIMP_HAL_COMMON_INTERRUPTS_CHAIN
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        .macro  hal_intc_translate inum,vnum
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        move    \vnum,zero                      # Just vector zero is supported
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        .endm
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#else
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        .macro  hal_intc_translate inum,vnum
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        move    \vnum,\inum                     # Vector == interrupt number
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        .endm
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#endif
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#endif
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# This table translates from the 6 bit value supplied in the IP bits
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# of the cause register into a 0..16 offset into the ISR tables.
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        .macro  hal_intc_decode_data
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hal_intc_translation_table:
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        .byte   0,1,0,0,3,3,0,0
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        .byte   0,0,0,0,0,0,0,0
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        .byte   5,5,0,0,0,5,0,0
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        .byte   0,0,0,0,0,0,0,0
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        .byte   0,0,0,0,0,0,0,0
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        .byte   0,0,0,0,0,0,0,0
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        .byte   0,0,0,0,0,0,0,0
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        .byte   0,0,0,0,0,0,0,0
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        .endm
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#define CYGPKG_HAL_MIPS_INTC_DEFINED
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#endif
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#------------------------------------------------------------------------------
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# Diagnostics macros.
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#if 0
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#ifndef CYGPKG_HAL_MIPS_DIAG_DEFINED
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        # Set up PIO0 for debugging output
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        .macro  hal_diag_init
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        .endm
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#define CYGPKG_HAL_MIPS_DIAG_DEFINED
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#endif
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#endif
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#------------------------------------------------------------------------------
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#endif // ifndef CYGONCE_HAL_VARIANT_INC
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# end of variant.inc

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