Subversion Repositories or1k

/* Definitions to target GDB to or1k targets.

   Copyright 2001 Free Software Foundation, Inc.

   This file is part of GDB.

   This program is free software; you can redistribute it and/or modify

   it under the terms of the GNU General Public License as published by

   the Free Software Foundation; either version 2 of the License, or

   (at your option) any later version.

   This program is distributed in the hope that it will be useful,

   but WITHOUT ANY WARRANTY; without even the implied warranty of

   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

   GNU General Public License for more details.

   You should have received a copy of the GNU General Public License

   along with this program; if not, write to the Free Software

   Foundation, Inc., 59 Temple Place - Suite 330,

   Boston, MA 02111-1307, USA.  */

#ifndef TM_OR1K_H

#define TM_OR1K_H

#ifndef TARGET_OR1K

#define TARGET_OR1K

#endif

#include "defs.h"

#include <inttypes.h>  /* CZ */

/* CZ 11/09/01  -- Cause GDB to expect actual PC value to appear

   in breakpoint exception vector instead of being in PC itself */

#define NEW_PC_HANDLING

#ifdef NEW_PC_HANDLING

#define TARGET_READ_PC(pid) or1k_target_read_pc(pid)

#define TARGET_WRITE_PC(pc,pid) or1k_target_write_pc(pc,pid)

#endif

struct value;

struct struct_or1k_implementation

  {

    /* Implementation version.  */

    unsigned int VR;

    /* Units present.  */

    unsigned int UPR;

    /* Number of total available matchpoints in this implementation.  */

    unsigned int num_matchpoints;

    /* Number of currently used matchpoints.  */

    unsigned int num_used_matchpoints;

    /* Has watchpoint driven counters.  */

    int has_counters;

    /* Number of registers.  */

    unsigned int num_gpr_regs;

    unsigned int num_vfpr_regs;

    /* Is there any vf support?  */

    int vf_present;

 };

struct or1k_target_ops

  {

    /* Name this target type.  */

    char *to_shortname;

    /* Init target.  */

    void (*to_init) PARAMS ((char *args));

    /* Destruct target.  */

    void (*to_done) PARAMS ((void));

    /* Read register.

       Does not fail, places error no. in err instead or call error(), if fatal.  */

    ULONGEST (*to_read_reg) PARAMS ((unsigned int regno));

    /* Write register.

       Does not fail, places error no. in err instead or call error(), if fatal.  */

    void (*to_write_reg) PARAMS ((unsigned int regno, ULONGEST value));

    /* Read a block...possibly more efficient than several isolated

       call to read_reg...worst case the same efficiency. Returns 0

       on success or errno if a failure occurred. */

    int (*to_read_block) PARAMS ((unsigned int regno, void* block, int nRegisters));

    /* Write a block...possibly more efficient than several isolated

       call to write_reg...worst case the same efficiency. Returns 0

       on success or errno if a failure occurred. */

    int (*to_write_block) PARAMS ((unsigned int regno, void* block, int nRegisters));

    /* Selects scan chain.  All register accesses are related to current scan chain.

       Does not fail, places error no. in err instead or call error(), if fatal.

       See jtag_chains enum.  */

    void (*to_set_chain) PARAMS ((int chain));

    /* Executes extended command on the target.  */

    void (*to_exec_command) PARAMS ((char *args, int from_tty));

    /* Associated target_ops.  */

    struct target_ops *gdb_ops;

    /* Should be OPS_MAGIC. */

    int to_magic;

  };

#define DEFAULT_PROMPT "(or1k) "

/* Context stuff. */

#define CURRENT_CID (0)

#define MAX_CID     (15)

/* Instruction definitions. */

#define BRK_INSTR_STRUCT {0x21, 0x00, 0x00, 0x00}

#define NOP_INSTR (0x15000000)

/* Special purpose regisers.  */

#define SPR_GROUP_SIZE_BITS (11)

#define SPR_GROUP_SIZE (1 << SPR_GROUP_SIZE_BITS)

#define SPR_SYSTEM_GROUP (0)

#define SPR_DEBUG_GROUP (6)

#define SPR_GPR_START  (1024)

#define SPR_VFPR_START ((MAX_CID + 1) * MAX_GPR_REGS + SPR_GPR_START)

#define OR1K_NUM_SPR_GROUPS (12)

/* Define register values.  */

#define SPR_REG(group, index) (((group) << SPR_GROUP_SIZE_BITS) + (index))

#define VR_SPRNUM SPR_REG(SPR_SYSTEM_GROUP, 0)

#define UPR_SPRNUM SPR_REG(SPR_SYSTEM_GROUP, 1)

#define CPUCFGR_SPRNUM SPR_REG(SPR_SYSTEM_GROUP, 2)

#define DCFGR_SPRNUM SPR_REG(SPR_SYSTEM_GROUP, 7)

#define PC_SPRNUM SPR_REG(SPR_SYSTEM_GROUP, 16)

#define SR_SPRNUM SPR_REG(SPR_SYSTEM_GROUP, 17)

#define CCR_SPRNUM(cid) SPR_REG(SPR_SYSTEM_GROUP, 4 + (cid))

#define DVR0_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 32)

#define DCR0_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 40)

#define DMR1_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 48)

#define DMR2_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 49)

#define DCWR0_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 50)

#define DCWR1_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 51)

#define DSR_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 52)

#define DRR_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 53)

#define DIR_SPRNUM SPR_REG(SPR_DEBUG_GROUP, 54)

#define ZERO_REGNUM (0)

#define SP_REGNUM (1)

#define FP_REGNUM (2)

#define A0_REGNUM (3)

#define A5_REGNUM (8)

#define LR_REGNUM (9)

#define RV_REGNUM (11)

#define VFA0_REGNUM (MAX_GPR_REGS + 0)

#define VFA5_REGNUM (MAX_GPR_REGS + 5)

#define VFRV_REGNUM (MAX_GPR_REGS + 6)

#define PC_REGNUM (MAX_GPR_REGS + MAX_VF_REGS + 0)

#define PS_REGNUM (MAX_GPR_REGS + MAX_VF_REGS + 1)

#define CCR_REGNUM (MAX_GPR_REGS + MAX_VF_REGS + 2)

/*******************************************/

/* Added by CZ on 12/09/01 Used for new style breakpoints */

/* These really aren't designed to be seen by the user    */

#define EPC_REGNUM (MAX_GPR_REGS + MAX_VF_REGS + 3)

#define EAR_REGNUM (MAX_GPR_REGS + MAX_VF_REGS + 4)

#define ESR_REGNUM (MAX_GPR_REGS + MAX_VF_REGS + 5)

#define EPC_SPRNUM(cid) SPR_REG(SPR_SYSTEM_GROUP,32+cid)

#define EAR_SPRNUM(cid) SPR_REG(SPR_SYSTEM_GROUP,48+cid)

#define ESR_SPRNUM(cid) SPR_REG(SPR_SYSTEM_GROUP,64+cid)

#define MAX_EXTRA_NUM_REGS 6

/******** END OF ADDITIONS BY CZ ************/

extern int or1k_regnum_to_sprnum PARAMS ((int regno));

#define REGNUM_TO_SPRNUM(regno) (or1k_regnum_to_sprnum(regno))

/* Defines for SPR bits.  */

#define DMR1_ST    (0x00400000)

/* Changed by CZ 21/06/01 */

#define DRR_SS     (0x00004000)

#define DRR_TE     (0x00002000)

#define DRR_BE     (0x00001000)

#define DRR_SCE    (0x00000800)

#define DRR_RE     (0x00000400)

#define DRR_IME    (0x00000200)

#define DRR_DME    (0x00000100)

#define DRR_HPINTE (0x00000080)

#define DRR_IIE    (0x00000040)

#define DRR_AE     (0x00000020)

#define DRR_LPINTE (0x00000010)

#define DRR_IPFE   (0x00000008)

#define DRR_DPFE   (0x00000004)

#define DRR_BUSEE  (0x00000002)

#define DRR_RSTE   (0x00000001)

/* Number of matchpoints */

#define NUM_MATCHPOINTS (or1k_implementation.num_matchpoints)

#define MAX_MATCHPOINTS (8)

/* Number of machine GPR registers */

#define NUM_GPR_REGS (or1k_implementation.num_gpr_regs)

#define MAX_GPR_REGS (32)

/* Number of machine VF registers */

#define NUM_VF_REGS (or1k_implementation.num_vfpr_regs)

#define MAX_VF_REGS (32)

/*******************************/

/* Paramterized by CZ 11/09/01 */

/*******************************/

/* gdb mapping of registers */

#ifndef NUM_REGS

#define NUM_REGS (MAX_GPR_REGS+MAX_VF_REGS+MAX_EXTRA_NUM_REGS)  

#endif

/* Can act like a little or big endian.  */

#if !defined (TARGET_BYTE_ORDER_DEFAULT)

#define TARGET_BYTE_ORDER_DEFAULT BIG_ENDIAN

#define TARGET_BYTE_ORDER_SELECTABLE_P (1)

#endif

/* Size (in bytes) of registers.  */

#define OR1K_SPR_REGSIZE (4)

#define OR1K_VF_REGSIZE (8)

#define OR1K_GPR_REGSIZE ((OR1K_64BIT_IMPLEMENTATION)?(8):(4))

#define OR1K_VF_DOUBLE (0)

#define OR1K_IS_GPR(N) ((N) >= 0 && (N) < MAX_GPR_REGS)

#define OR1K_IS_VF(N) ((N) >= MAX_GPR_REGS && (N) < MAX_GPR_REGS + MAX_VF_REGS)

/* Register representation is the same as in memory.  */

#define REGISTER_CONVERTIBLE(N) (0)

/* Given the register index, return the name of the corresponding

   register. */

extern char *or1k_register_name PARAMS ((int regno));

#define REGISTER_NAME(regno) or1k_register_name (regno)

/* Is this implementation 64 or 32 bit.

   WARNING: gdb or1k port is not yet prepared for 64b implementations!  */

#define OR1K_64BIT_IMPLEMENTATION 0

/* Number of bytes of storage in the actual machine representation for

   register N.  NOTE: This indirectly defines the register size

   transfered by the GDB protocol.  If we have 64bit processor

   implementation, GPR register raw size is 8B, otherwise 4B.  */

#define REGISTER_RAW_SIZE(N) ((OR1K_IS_GPR(N)?((OR1K_64BIT_IMPLEMENTATION)?\

(8):(4)):(OR1K_SPR_REGSIZE)))

/* Number of bytes of storage in the program's representation

   for register N. Same as RAW_SIZE.  */

#define REGISTER_VIRTUAL_SIZE(N) TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (N))

/* Return the GDB type object for the "standard" data type of data in

   register N.  */

#define REGISTER_VIRTUAL_TYPE(N) ((OR1K_IS_GPR(N))?(\

(OR1K_64BIT_IMPLEMENTATION)?builtin_type_int64:builtin_type_int\

):(OR1K_IS_VF(N) ? builtin_type_float : builtin_type_uint32))

/* Largest value REGISTER_RAW_SIZE can have.  */

#define MAX_REGISTER_RAW_SIZE ((OR1K_64BIT_IMPLEMENTATION)?(8):(4))

/* Largest value REGISTER_VIRTUAL_SIZE can have.  */

#define MAX_REGISTER_VIRTUAL_SIZE ((OR1K_64BIT_IMPLEMENTATION)?(8):(4))

#define REGISTER_SIZE (MAX_REGISTER_VIRTUAL_SIZE)

/* ABI uses R3 through R8 for args.  */

#define OR1K_LAST_ARG_REGNUM (A5_REGNUM)

#define OR1K_NUM_ARG_REGS (6)

/* ABI uses VFR0 through VFR5 for float args.  */

#define OR1K_LAST_FP_ARG_REGNUM (VFA5_REGNUM)

#define OR1K_NUM_FP_ARG_REGS (6)

/* Should not store into R0.  */

#define CANNOT_STORE_REGISTER(N) ((N) == 0)

/* Index within `registers' of the first byte of the space for

   register N.  */

#define REGISTER_BYTE(N) ((N) * OR1K_SPR_REGSIZE)

/* Total amount of space needed to store our copies of the machine's

   register state, the array `registers'.  */

#define REGISTER_BYTES (NUM_REGS * OR1K_SPR_REGSIZE)

extern void or1k_do_registers_info PARAMS ((int, int));

#define DO_REGISTERS_INFO(regnum, fp) or1k_do_registers_info(regnum, fp)

/* BREAKPOINT_FROM_PC uses the program counter value to determine whether a

   16- or 32-bit breakpoint should be used.  It returns a pointer

   to a string of bytes that encode a breakpoint instruction, stores

   the length of the string to *lenptr, and adjusts the pc (if necessary) to

   point to the actual memory location where the breakpoint should be

   inserted.  */

extern unsigned char *or1k_breakpoint_from_pc PARAMS ((CORE_ADDR *bp_addr, int *bp_size));

#define BREAKPOINT_FROM_PC(pcptr, lenptr) or1k_breakpoint_from_pc (pcptr, lenptr)

/* Amount PC must be decremented by after a breakpoint.

   This is often the number of bytes in BREAKPOINT

   but not always.  */

/* Note: several attempts have been made to account for

   differences between hardware and software breakpoints

   and still allow hardware breakpoints to advance the

   PC beyond the offending instruction.  However, short

   of rewriting gdb, none of them seem to work. Thus,

   for now, we assume that a hardware breakpoint will

   always give control to the breakpoint vector BEFORE

   it executes the instruction, thus, when the breakpoint

   vector returns, it will return to the same instruction

   that caused the exception (and thus hit the exception

   again if it hasn't been cleared) Note that if it actually

   executes this instruction, things fail bandly inside of

   gdb. This should not be an issue for now, as the or1200

   implementation will not implement hardware breakpoints

   at all.. */

#define DECR_PC_AFTER_BREAK 0

extern int or1k_insert_breakpoint (CORE_ADDR addr, char *contents_cache);

#define target_insert_hw_breakpoint(addr, cache) or1k_insert_breakpoint (addr, cache)

extern int or1k_remove_breakpoint (CORE_ADDR addr, char *contents_cache);

#define target_remove_hw_breakpoint(addr, cache) or1k_remove_breakpoint (addr, cache)

/* Watchpoint support.  */

#define TARGET_HAS_HARDWARE_WATCHPOINTS

/* Use these macros for watchpoint insertion/deletion.  */

/* type can be 0: write watch, 1: read watch, 2: access watch (read/write) */

extern int or1k_insert_watchpoint PARAMS ((CORE_ADDR addr, int len, int type));

#define target_insert_watchpoint(addr, len, type) \

        or1k_insert_watchpoint (addr, len, type)

extern int or1k_insert_watchpoint PARAMS ((CORE_ADDR addr, int len, int type));

#define target_remove_watchpoint(addr, len, type) \

        or1k_remove_watchpoint (addr, len, type)

/* We need to remove watchpoints when stepping, else we hit them again! */

#define HAVE_NONSTEPPABLE_WATCHPOINT

extern int or1k_stopped_by_watchpoint PARAMS ((void));

#define STOPPED_BY_WATCHPOINT(w) or1k_stopped_by_watchpoint ()

typedef enum bptype;

extern int or1k_can_use_hardware_watchpoint PARAMS ((enum bptype, int));

#define TARGET_CAN_USE_HARDWARE_WATCHPOINT(bp_type, cnt, ot) \

  or1k_can_use_hardware_watchpoint(bp_type, cnt)

/* Catchpoint support.  */

/* HACK: how do we hook to signal namings otherwise? */

#include "target.h"

extern char *target_signal_to_string PARAMS ((enum target_signal));

/* Return the name (SIGHUP, etc.) for a signal.  */

extern char *or1k_signal_to_name PARAMS ((enum target_signal));

/* Given a name (SIGHUP, etc.), return its signal.  */

extern enum target_signal or1k_signal_from_name PARAMS ((char *));

#define NUM_OR1K_SIGNALS (14)

/* Extract from an array REGBUF containing the (raw) register state

   a function return value of type TYPE, and copy that, in virtual format,

   into VALBUF.  */

extern void or1k_extract_return_value PARAMS ((struct type *, char[], char *));

#define EXTRACT_RETURN_VALUE(TYPE, REGBUF, VALBUF) \

  or1k_extract_return_value (TYPE, REGBUF, VALBUF)

/* Write into appropriate registers a function return value

   of type TYPE, given in virtual format.  */

#define STORE_RETURN_VALUE(TYPE,VALBUF) \

  {\

    if (TYPE_CODE (TYPE) == TYPE_CODE_FLT)\

      write_register_bytes (REGISTER_BYTE (VFRV_REGNUM), VALBUF, TYPE_LENGTH (TYPE));\

    else\

      write_register_bytes (REGISTER_BYTE (RV_REGNUM), VALBUF, TYPE_LENGTH (TYPE));\

  }

/* Extract from an array REGBUF containing the (raw) register state

   the address in which a function should return its structure value,

   as a CORE_ADDR (or an expression that can be used as one).  */

/* The address is passed in a0 upon entry to the function, but when

   the function exits, the compiler has copied the value to v0.  This

   convention is specified by the System V ABI, so I think we can rely

   on it.  */

#define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \

  (extract_address (REGBUF + REGISTER_BYTE (RV_REGNUM), \

                    REGISTER_RAW_SIZE (RV_REGNUM)))

#define EXTRACT_STRUCT_VALUE_ADDRESS_P 1

/* Advance PC across any function entry prologue instructions

   to reach some "real" code.  */

extern CORE_ADDR or1k_skip_prologue PARAMS ((CORE_ADDR addr));

#define SKIP_PROLOGUE(pc) (or1k_skip_prologue (pc))

/* FRAMES */

#define FRAME_ARGS_ADDRESS(fi)  (fi)->frame

#define FRAME_LOCALS_ADDRESS(fi) (fi)->frame

/* FRAME_CHAIN takes a frame's nominal address

   and produces the frame's chain-pointer. */

#define FRAME_CHAIN(thisframe) (CORE_ADDR) or1k_frame_chain (thisframe)

extern CORE_ADDR or1k_frame_chain PARAMS ((struct frame_info *));

/* Discard from the stack the innermost frame, restoring all registers.  */

extern void or1k_pop_frame PARAMS ((void));

#define POP_FRAME or1k_pop_frame()

/* Return number of args passed to a frame.

   Can return -1, meaning no way to tell.  */

#define FRAME_NUM_ARGS(fi)      (-1)

/* Return number of bytes at start of arglist that are not really args.  */

#define FRAME_ARGS_SKIP 0

/* Put here the code to store, into a struct frame_saved_regs,

   the addresses of the saved registers of frame described by FRAME_INFO.

   This includes special registers such as pc and fp saved in special

   ways in the stack frame.  sp is even more special:

   the address we return for it IS the sp for the next frame.  */

extern void or1k_init_saved_regs PARAMS ((struct frame_info *));

#define FRAME_INIT_SAVED_REGS(frame_info) or1k_init_saved_regs (frame_info);

/* Saved Pc.  */

extern CORE_ADDR or1k_frame_saved_pc PARAMS ((struct frame_info *));

#define FRAME_SAVED_PC(FRAME) (or1k_frame_saved_pc(FRAME))

/* Set the return address register to point to the entry

   point of the program, where a breakpoint lies in wait.  */

extern CORE_ADDR or1k_push_return_address PARAMS ((CORE_ADDR pc, CORE_ADDR sp));

#define PUSH_RETURN_ADDRESS(PC, SP) (or1k_push_return_address ((PC), (SP)))

/* Immediately after a function call, return the saved pc.

   Can't always go through the frames for this because on some machines

   the new frame is not set up until the new function executes

   some instructions.  */

#define SAVED_PC_AFTER_CALL(frame)      read_register(LR_REGNUM)

/* Offset from address of function to start of its code.

   Zero on most machines.  */

#define FUNCTION_START_OFFSET (0)

/* Floating point is IEEE compliant */

#define IEEE_FLOAT

/* Is floating/vector unit present.  */

#define OR1K_VF_PRESENT (or1k_implementation.vf_present)

/* #define INIT_FRAME_PC        */      /* Not necessary */

/* Stack grows downward.  */

#define INNER_THAN(lhs,rhs) ((lhs) < (rhs))

/* Size of stack entry - in bytes.  */

#define OR1K_STACK_ALIGN (8)

/* Maximum struct size, that is still stored onto stack.  */

#define OR1K_STRUCT_CONV_SIZE (8)

#define STACK_ALIGN(addr) OR1K_STACK_ALIGN

#define USE_STRUCT_CONVENTION(gcc_p, type) (TYPE_LENGTH (type) > OR1K_STRUCT_CONV_SIZE)

/* Stack must be aligned on 32-bit boundaries when synthesizing

   function calls. PUSH_ARGUMENTS will handle it. */

extern CORE_ADDR or1k_push_arguments PARAMS ((int, struct value **, CORE_ADDR, int, CORE_ADDR));

#define PUSH_ARGUMENTS(nargs, args, sp, struct_return, struct_addr) \

(or1k_push_arguments((nargs), (args), (sp), (struct_return), (struct_addr)))

/* Return non-zero if PC points to an instruction which will cause a step

   to execute both the instruction at PC and an instruction at PC+4.  */

extern int or1k_step_skips_delay PARAMS ((CORE_ADDR));

#define STEP_SKIPS_DELAY_P (1)

#define STEP_SKIPS_DELAY(pc) (or1k_step_skips_delay (pc))

/* DUMMY CALLS */

#define USE_GENERIC_DUMMY_FRAMES 1

#define CALL_DUMMY                   {0}

#define CALL_DUMMY_START_OFFSET      (0)

#define CALL_DUMMY_BREAKPOINT_OFFSET (0)

#define SIZEOF_CALL_DUMMY_WORDS      (0)

#define CALL_DUMMY_LOCATION          AT_ENTRY_POINT

#define FIX_CALL_DUMMY(DUMMY, START, FUNADDR, NARGS, ARGS, TYPE, GCCP) 

/* Return a location where we can set a breakpoint that will be hit

   when an inferior function call returns.  This is normally the

   program's entry point.  */

#define CALL_DUMMY_ADDRESS()         entry_point_address ()

#define SAVE_DUMMY_FRAME_TOS(SP)     generic_save_dummy_frame_tos (SP)

#define PC_IN_CALL_DUMMY(PC, SP, FP) generic_pc_in_call_dummy (PC, SP, FP)

#define PUSH_DUMMY_FRAME             generic_push_dummy_frame ()

/* Definitions and declarations used by or1k dependent files.  */

#define OR1K_INSTLEN 4          /* Length of an instruction */

typedef unsigned long t_inst;   /* Integer big enough to hold an instruction */

/* Defined in remote-or1k.c */

/* Target state names.  */

extern const char *status_name[];

/* Target state.  */

enum target_status

  {

    TARGET_UNDEFINED,

    TARGET_CONNECTING,

    TARGET_DISCONNECTING,

    TARGET_RUNNING,

    TARGET_STOPPED

  };

#define REG_SPACE 0x00000000

#define REG_SPACE_END 0x7FFFFFFF

#define MEM_SPACE 0x80000000

#define MEM_SPACE_END 0xFFFFFFFF

/* Compare conditions for DCRx registers.  */

enum enum_compare_condition

  {

    CC_MASKED, CC_EQUAL, CC_LESS, CC_LESSE, CC_GREAT, CC_GREATE, CC_NEQUAL

  };

/* Compare operand to compare DVRx to.  */

enum enum_compare_to

  {

    CT_DISABLED, CT_FETCH, CT_LEA, CT_SEA, CT_LDATA, CT_SDATA, CT_AEA, CT_ADATA

  };

/* Matchpoint chaining types.  */

enum enum_chaining

  {

    CHAINING_NONE, CHAINING_AND, CHAINING_OR

  };

/* Names for cts.  */

#define NUM_CT_NAMES 8

extern const char *compare_to_names[NUM_CT_NAMES];

/* DRCx struct */

struct dcr_struct

  {

    enum enum_compare_to ct:3;

    unsigned int sc:1;

    enum enum_compare_condition cc:3;

    unsigned int dp:1;

  };

/* All data needed for a matchpoint.  */

struct matchpoint

  {

    struct dcr_struct dcr;

    unsigned int dvr;

    unsigned int chain_type;

    unsigned int cause_breakpoint;

  };

/* Trace related structures and data.  */

#define TRACE_FILENAME_SIZE (128)

extern char trace_filename[TRACE_FILENAME_SIZE];

#define TRACE_FILENAME (&trace_filename[0])

#define TRACE_DATA_SIZE (sizeof(struct htrace_data_struct))

struct htrace_data_struct

  {

    unsigned int unused:24;

    unsigned int data:32;

    unsigned int type:4;

    unsigned int reserved:3;

    unsigned int valid:1;

  };

enum enum_operation

  {

    TRIGOP_ANY, TRIGOP_OR, TRIGOP_AND

  };

struct htrace_event_struct

  {

    enum enum_operation operation:2;

    unsigned int reserved1:6;

    unsigned int is_valid:1;

    unsigned int is_trig:2;

    unsigned int ls_valid:1;

    unsigned int ls_trig:4;

    unsigned int reserved2:2;

    unsigned int bp_valid:1;

    unsigned int bp_trig:1;

    unsigned int wp_valid:1;

    unsigned int wp_trig:11;

  };

struct htrace_record_struct

  {

    unsigned int reserved:25;

    unsigned int rec:7;

  };

struct htrace_moder_struct

  {

    unsigned int reserved:29;

    unsigned int rec_sel_dep:1;

    unsigned int trace_enable:1;

    unsigned int contin:1;

  };

/* Number of records as defined in TAP.  */

#define NUM_RECORDS (8)

struct htrace_struct

  {

    /* Local copy of HW regs for trace.  */

    struct htrace_event_struct trig, qual, stop;

    struct htrace_record_struct recwp[MAX_MATCHPOINTS], recbp;

    struct htrace_moder_struct moder;

    /* Which matchpoints does record use?  Bitmask.  */

    unsigned int wp_record_uses[MAX_MATCHPOINTS];

  };

extern struct htrace_struct or1k_htrace;

extern int trace_size;

#define MAX_RECORD_NAMES 7

extern const char *or1k_record_names[MAX_RECORD_NAMES];

#define MAX_IS_NAMES 4

extern const char *or1k_is_names[MAX_IS_NAMES];

#define MAX_LS_NAMES 16

extern const char *or1k_ls_names[MAX_LS_NAMES];

/* Stuff for HW watches.  */

#define MAX_HW_WATCHES MAX_MATCHPOINTS

struct hwatch_struct

  {

    int matchpoint_start;

  };

extern int num_hw_watches;

extern struct hwatch_struct or1k_hwatch[MAX_HW_WATCHES];

/* Possible errors are listed here.  */

enum enum_errors  /* modified <chris@asics.ws> CZ 24/05/01 */

{

  /* Codes > 0 are for system errors */

  ERR_NONE = 0,

  ERR_CRC = -1,

  ERR_MEM = -2,

  JTAG_PROXY_INVALID_COMMAND = -3,

  JTAG_PROXY_SERVER_TERMINATED = -4,

  JTAG_PROXY_NO_CONNECTION = -5,

  JTAG_PROXY_PROTOCOL_ERROR = -6,

  JTAG_PROXY_COMMAND_NOT_IMPLEMENTED = -7,

  JTAG_PROXY_INVALID_CHAIN = -8,

  JTAG_PROXY_INVALID_ADDRESS = -9,

  JTAG_PROXY_ACCESS_EXCEPTION = -10, /* Write to ROM */

  JTAG_PROXY_INVALID_LENGTH = -11,

  JTAG_PROXY_OUT_OF_MEMORY = -12,

};

/* All JTAG chains.  */

enum jtag_chains

  {

    SC_GLOBAL,      /* 0 Global BS Chain */

    SC_RISC_DEBUG,  /* 1 RISC Debug Interface chain */

    SC_RISC_TEST,   /* 2 RISC Test Chain */

    SC_TRACE,       /* 3 Trace Chain */

    SC_REGISTER,    /* Register Chain */

    SC_BLOCK,       /* Block Chains */

  };

/* See JTAG documentation about these.  */

#define JI_SIZE (4)

enum jtag_instr

  {

    JI_EXTEST,

    JI_SAMPLE_PRELOAD,

    JI_IDCODE,

    JI_CHAIN_SELECT,

    JI_INTEST,

    JI_CLAMP,

    JI_CLAMPZ,

    JI_HIGHZ,

    JI_DEBUG,

    JI_BYPASS = 0xF

  };

/* JTAG registers.  */

#define JTAG_MODER  (0x0)

#define JTAG_TSEL   (0x1)

#define JTAG_QSEL   (0x2)

#define JTAG_SSEL   (0x3)

#define JTAG_RISCOP (0x9)

#define JTAG_RECWP0 (0x10)

#define JTAG_RECBP0 (0x1b)

/* Current register values.  */

extern unsigned int dmr1;

extern unsigned int dmr2;

extern unsigned int dsr;

extern unsigned int drr;

extern int matchpoint_user_count[MAX_MATCHPOINTS];

/* Current watchpoints.  */

extern unsigned int dvr[MAX_MATCHPOINTS];

extern struct dcr_struct dcr[MAX_MATCHPOINTS];

extern int debug_regs_changed;

/* Returns error name.  */

extern const char *or1k_err_name PARAMS ((int e));

/* Last error number.  */

extern int err;

extern struct struct_or1k_implementation or1k_implementation;

extern unsigned int or1k_fetch_instruction PARAMS ((CORE_ADDR addr));

extern void or1k_fetch_registers PARAMS ((int regno));

/* Sets register/memory regno to data.  */

extern void or1k_write_spr_reg PARAMS ((unsigned int regno, unsigned int data));

/* Sets register/memory regno to data.  */

extern unsigned int or1k_read_spr_reg PARAMS ((unsigned int regno));

/* Flushes or1k's pipeline.  */

extern void or1k_flush_pipeline PARAMS ((void));

/* Sifts unused matchpoints to higher indexses.  */

extern void sift_matchpoints ();

/* Added by Chris Ziomkowski <chris@asics.ws> 24/05/01 */

typedef enum {

  JTAG_COMMAND_READ = 1,

  JTAG_COMMAND_WRITE = 2,

  JTAG_COMMAND_BLOCK_READ = 3,