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[/] [or1k/] [trunk/] [gdb-5.0/] [gdb/] [config/] [pa/] [tm-hppa64.h] - Blame information for rev 106

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1 106 markom
/* Parameters for execution on any Hewlett-Packard PA-RISC machine.
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   Copyright 1986, 1987, 1989, 1990, 1991, 1992, 1993, 1995
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   Free Software Foundation, Inc.
4
 
5
   Contributed by the Center for Software Science at the
6
   University of Utah (pa-gdb-bugs@cs.utah.edu).
7
 
8
This file is part of GDB.
9
 
10
This program is free software; you can redistribute it and/or modify
11
it under the terms of the GNU General Public License as published by
12
the Free Software Foundation; either version 2 of the License, or
13
(at your option) any later version.
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15
This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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GNU General Public License for more details.
19
 
20
You should have received a copy of the GNU General Public License
21
along with this program; if not, write to the Free Software
22
Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
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24
/* PA 64-bit specific definitions.  Override those which are in
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   tm-hppa.h */
26
 
27
/* jimb: this must go.  I'm just using it to disable code I haven't
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   gotten working yet.  */
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#define GDB_TARGET_IS_HPPA_20W
30
 
31
#include "pa/tm-hppah.h"
32
 
33
#define HPUX_1100 1
34
 
35
/* The low two bits of the IA are the privilege level of the instruction.  */
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#define ADDR_BITS_REMOVE(addr) ((CORE_ADDR)addr & (CORE_ADDR)~3)
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/* Say how long (ordinary) registers are.  This is used in
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   push_word and a few other places, but REGISTER_RAW_SIZE is
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   the real way to know how big a register is.  */
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#undef REGISTER_SIZE
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#define REGISTER_SIZE 8
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/* Number of bytes of storage in the actual machine representation
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   for register N.  On the PA-RISC 2.0, all regs are 8 bytes, including
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   the FP registers (they're accessed as two 4 byte halves).  */
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49
#undef REGISTER_RAW_SIZE
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#define REGISTER_RAW_SIZE(N) 8
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52
/* Largest value REGISTER_RAW_SIZE can have.  */
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54
#undef MAX_REGISTER_RAW_SIZE
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#define MAX_REGISTER_RAW_SIZE 8
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57
/* Total amount of space needed to store our copies of the machine's
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   register state, the array `registers'.  */
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60
#undef REGISTER_BYTES
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#define REGISTER_BYTES (NUM_REGS * 8)
62
 
63
/* Index within `registers' of the first byte of the space for
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   register N.  */
65
 
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#undef REGISTER_BYTE
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#define REGISTER_BYTE(N) ((N) * 8)
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69
#undef REGISTER_VIRTUAL_TYPE
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#define REGISTER_VIRTUAL_TYPE(N) \
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 ((N) < FP4_REGNUM ? builtin_type_unsigned_long_long : builtin_type_double)
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73
 
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/* Number of machine registers */
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#undef NUM_REGS
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#define NUM_REGS 96
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/* Initializer for an array of names of registers.
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   There should be NUM_REGS strings in this initializer.
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   They are in rows of eight entries  */
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#undef REGISTER_NAMES
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#define REGISTER_NAMES  \
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 {"flags",  "r1",      "rp",      "r3",    "r4",     "r5",      "r6",     "r7",    \
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  "r8",     "r9",      "r10",     "r11",   "r12",    "r13",     "r14",    "r15",   \
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  "r16",    "r17",     "r18",     "r19",   "r20",    "r21",     "r22",    "r23",   \
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  "r24",    "r25",     "r26",     "dp",    "ret0",   "ret1",    "sp",     "r31",   \
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  "sar",    "pcoqh",   "pcsqh",   "pcoqt", "pcsqt",  "eiem",    "iir",    "isr",   \
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  "ior",    "ipsw",    "goto",    "sr4",   "sr0",    "sr1",     "sr2",    "sr3",   \
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  "sr5",    "sr6",     "sr7",     "cr0",   "cr8",    "cr9",     "ccr",    "cr12",  \
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  "cr13",   "cr24",    "cr25",    "cr26",  "mpsfu_high","mpsfu_low","mpsfu_ovflo","pad",\
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  "fpsr",    "fpe1",   "fpe2",    "fpe3",  "fr4",    "fr5",     "fr6",    "fr7", \
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  "fr8",     "fr9",    "fr10",    "fr11",  "fr12",   "fr13",    "fr14",   "fr15", \
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  "fr16",    "fr17",   "fr18",    "fr19",  "fr20",   "fr21",    "fr22",   "fr23", \
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  "fr24",    "fr25",   "fr26",    "fr27",   "fr28",  "fr29",    "fr30",   "fr31"}
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#undef FP0_REGNUM
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#undef FP4_REGNUM
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#define FP0_REGNUM 64           /* floating point reg. 0 (fspr)*/
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#define FP4_REGNUM 68
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101
/* Redefine some target bit sizes from the default.  */
102
 
103
/* Number of bits in a long or unsigned long for the target machine. */
104
 
105
#define TARGET_LONG_BIT 64
106
 
107
/* Number of bits in a long long or unsigned long long for the
108
   target machine.  */
109
 
110
#define TARGET_LONG_LONG_BIT 64
111
 
112
/* Number of bits in a pointer for the target machine */
113
 
114
#define TARGET_PTR_BIT 64
115
 
116
/* Argument Pointer Register */
117
#define AP_REGNUM 29
118
 
119
#define DP_REGNUM 27
120
 
121
#define FP5_REGNUM 70
122
 
123
#define SR5_REGNUM 48
124
 
125
#undef FRAME_ARGS_ADDRESS
126
#define FRAME_ARGS_ADDRESS(fi) ((fi)->ap)
127
 
128
/* We access locals from SP. This may not work for frames which call
129
   alloca; for those, we may need to consult unwind tables.
130
   jimb: FIXME.  */
131
#undef FRAME_LOCALS_ADDRESS
132
#define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
133
 
134
#define INIT_FRAME_AP init_frame_ap
135
 
136
#define EXTRA_FRAME_INFO  \
137
  CORE_ADDR ap;
138
 
139
/* For a number of horrible reasons we may have to adjust the location
140
   of variables on the stack.  Ugh.  jimb: why? */
141
#define HPREAD_ADJUST_STACK_ADDRESS(ADDR) hpread_adjust_stack_address(ADDR)
142
 
143
extern int hpread_adjust_stack_address PARAMS ((CORE_ADDR));
144
 
145
 
146
/* jimb: omitted dynamic linking stuff here */
147
 
148
/* This sequence of words is the instructions
149
 
150
; Call stack frame has already been built by gdb. Since we could be calling
151
; a varargs function, and we do not have the benefit of a stub to put things in
152
; the right place, we load the first 8 word of arguments into both the general
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; and fp registers.
154
call_dummy
155
        nop
156
        copy %r4,%r29
157
        copy %r5,%r22
158
        copy %r6,%r27
159
        fldd -64(0,%r29),%fr4
160
        fldd -56(0,%r29),%fr5
161
        fldd -48(0,%r29),%fr6
162
        fldd -40(0,%r29),%fr7
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        fldd -32(0,%r29),%fr8
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        fldd -24(0,%r29),%fr9
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        fldd -16(0,%r29),%fr10
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        fldd -8(0,%r29),%fr11
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        copy %r22,%r1
168
        ldd -64(%r29), %r26
169
        ldd -56(%r29), %r25
170
        ldd -48(%r29), %r24
171
        ldd -40(%r29), %r23
172
        ldd -32(%r29), %r22
173
        ldd -24(%r29), %r21
174
        ldd -16(%r29), %r20
175
        bve,l (%r1),%r2
176
        ldd -8(%r29), %r19
177
        break 4, 8
178
        mtsp %r21, %sr0
179
        ble 0(%sr0, %r22)
180
        nop
181
*/
182
 
183
/* Call dummys are sized and written out in word sized hunks.  So we have
184
   to pack the instructions into words.  Ugh.  */
185
#undef CALL_DUMMY
186
#define CALL_DUMMY {0x08000240349d0000LL, 0x34b6000034db0000LL, \
187
                    0x53a43f8353a53f93LL, 0x53a63fa353a73fb3LL,\
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                    0x53a83fc353a93fd3LL, 0x2fa1100a2fb1100bLL,\
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                    0x36c1000053ba3f81LL, 0x53b93f9153b83fa1LL,\
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                    0x53b73fb153b63fc1LL, 0x53b53fd10fa110d4LL,\
191
                    0xe820f0000fb110d3LL, 0x0001000400151820LL,\
192
                    0xe6c0000008000240LL}
193
 
194
#define CALL_DUMMY_BREAKPOINT_OFFSET_P 1
195
#define CALL_DUMMY_BREAKPOINT_OFFSET 22 * 4
196
 
197
/* CALL_DUMMY_LENGTH is computed based on the size of a word on the target
198
   machine, not the size of an instruction.  Since a word on this target
199
   holds two instructions we have to divide the instruction size by two to
200
   get the word size of the dummy.  */
201
#undef CALL_DUMMY_LENGTH
202
#define CALL_DUMMY_LENGTH (INSTRUCTION_SIZE * 26 / 2)
203
 
204
/* The PA64 ABI mandates a 16 byte stack alignment.  */
205
#undef STACK_ALIGN
206
#define STACK_ALIGN(arg) ( ((arg)%16) ? (((arg)+15)&-16) : (arg))
207
 
208
/* The PA64 ABI reserves 64 bytes of stack space for outgoing register
209
   parameters.  */
210
#undef REG_PARM_STACK_SPACE
211
#define REG_PARM_STACK_SPACE 64
212
 
213
/* Use the 64-bit calling conventions designed for the PA2.0 in wide mode.  */
214
#define PA20W_CALLING_CONVENTIONS
215
 
216
#undef FUNC_LDIL_OFFSET
217
#undef FUNC_LDO_OFFSET
218
#undef SR4EXPORT_LDIL_OFFSET
219
#undef SR4EXPORT_LDO_OFFSET
220
#undef CALL_DUMMY_LOCATION
221
 
222
#undef REG_STRUCT_HAS_ADDR
223
 
224
#undef EXTRACT_RETURN_VALUE
225
/* RM: floats are returned in FR4R, doubles in FR4
226
 *     integral values are in r28, padded on the left
227
 *     aggregates less that 65 bits are in r28, right padded
228
 *     aggregates upto 128 bits are in r28 and r29, right padded
229
 */
230
#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
231
  { \
232
    if (TYPE_CODE (TYPE) == TYPE_CODE_FLT && !SOFT_FLOAT) \
233
      memcpy ((VALBUF), \
234
              ((char *)(REGBUF)) + REGISTER_BYTE (FP4_REGNUM) + \
235
              (REGISTER_SIZE - TYPE_LENGTH (TYPE)), \
236
              TYPE_LENGTH (TYPE)); \
237
    else if  (is_integral_type(TYPE) || SOFT_FLOAT)   \
238
       memcpy ((VALBUF), \
239
               (char *)(REGBUF) + REGISTER_BYTE (28) + \
240
               (REGISTER_SIZE - TYPE_LENGTH (TYPE)), \
241
               TYPE_LENGTH (TYPE)); \
242
    else if (TYPE_LENGTH (TYPE) <= 8)   \
243
       memcpy ((VALBUF), \
244
               (char *)(REGBUF) + REGISTER_BYTE (28), \
245
               TYPE_LENGTH (TYPE)); \
246
    else if (TYPE_LENGTH (TYPE) <= 16)   \
247
      { \
248
        memcpy ((VALBUF), \
249
                (char *)(REGBUF) + REGISTER_BYTE (28), \
250
                8); \
251
        memcpy (((char *) VALBUF + 8), \
252
                (char *)(REGBUF) + REGISTER_BYTE (29), \
253
                TYPE_LENGTH (TYPE) - 8); \
254
       } \
255
  }
256
 
257
/* RM: struct upto 128 bits are returned in registers */
258
#undef USE_STRUCT_CONVENTION
259
#define USE_STRUCT_CONVENTION(gcc_p, value_type)\
260
  (TYPE_LENGTH (value_type) > 16)
261
 
262
/* RM: for return command */
263
#undef STORE_RETURN_VALUE
264
#define STORE_RETURN_VALUE(TYPE,VALBUF) \
265
  { \
266
    if (TYPE_CODE (TYPE) == TYPE_CODE_FLT && !SOFT_FLOAT) \
267
      write_register_bytes \
268
              (REGISTER_BYTE (FP4_REGNUM) + \
269
              (REGISTER_SIZE - TYPE_LENGTH (TYPE)), \
270
              (VALBUF), \
271
              TYPE_LENGTH (TYPE)); \
272
    else if (is_integral_type(TYPE) || SOFT_FLOAT)   \
273
       write_register_bytes \
274
              (REGISTER_BYTE (28) + \
275
                 (REGISTER_SIZE - TYPE_LENGTH (TYPE)), \
276
               (VALBUF), \
277
               TYPE_LENGTH (TYPE)); \
278
    else if (TYPE_LENGTH (TYPE) <= 8)   \
279
       write_register_bytes \
280
             ( REGISTER_BYTE (28), \
281
               (VALBUF), \
282
               TYPE_LENGTH (TYPE)); \
283
    else if (TYPE_LENGTH (TYPE) <= 16)   \
284
      { \
285
        write_register_bytes \
286
               (REGISTER_BYTE (28), \
287
                (VALBUF), \
288
                8); \
289
        write_register_bytes \
290
               (REGISTER_BYTE (29), \
291
                ((char *) VALBUF + 8), \
292
                TYPE_LENGTH (TYPE) - 8); \
293
       } \
294
  }
295
 
296
/* RM: these are the PA64 equivalents of the macros in tm-hppah.h --
297
 * see comments there.  For PA64, the save_state structure is at an
298
 * offset of 24 32-bit words from the sigcontext structure. The 64 bit
299
 * general registers are at an offset of 640 bytes from the beginning of the
300
 * save_state structure, and the floating pointer register are at an offset
301
 * of 256 bytes from the beginning of the save_state structure.
302
 */
303
#undef FRAME_SAVED_PC_IN_SIGTRAMP
304
#define FRAME_SAVED_PC_IN_SIGTRAMP(FRAME, TMP) \
305
{ \
306
  *(TMP) = read_memory_integer ((FRAME)->frame + (24 * 4) + 640 + (33 * 8), 8); \
307
}
308
 
309
#undef FRAME_BASE_BEFORE_SIGTRAMP
310
#define FRAME_BASE_BEFORE_SIGTRAMP(FRAME, TMP) \
311
{ \
312
  *(TMP) = read_memory_integer ((FRAME)->frame + (24 * 4) + 640 + (30 * 8), 8); \
313
}
314
 
315
#undef FRAME_FIND_SAVED_REGS_IN_SIGTRAMP
316
#define FRAME_FIND_SAVED_REGS_IN_SIGTRAMP(FRAME, FSR) \
317
{ \
318
  int i; \
319
  CORE_ADDR TMP1, TMP2; \
320
  TMP1 = (FRAME)->frame + (24 * 4) + 640; \
321
  TMP2 = (FRAME)->frame + (24 * 4) + 256; \
322
  for (i = 0; i < NUM_REGS; i++) \
323
    { \
324
      if (i == SP_REGNUM) \
325
        (FSR)->regs[SP_REGNUM] = read_memory_integer (TMP1 + SP_REGNUM * 8, 8); \
326
      else if (i >= FP0_REGNUM) \
327
        (FSR)->regs[i] = TMP2 + (i - FP0_REGNUM) * 8; \
328
      else \
329
        (FSR)->regs[i] = TMP1 + i * 8; \
330
    } \
331
}
332
 
333
/* jimb: omitted purify call support */

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