OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [trunk/] [gdb-5.0/] [gdb/] [config/] [pa/] [tm-hppab.h] - Blame information for rev 1774

Go to most recent revision | Details | Compare with Previous | View Log

Line No. Rev Author Line
1 106 markom
/* Parameters for execution on an HP PA-RISC machine running BSD, for GDB.
2
   Contributed by the Center for Software Science at the
3
   University of Utah (pa-gdb-bugs@cs.utah.edu).  */
4
 
5
/* For BSD:
6
 
7
   The signal context structure pointer is always saved at the base
8
   of the frame + 0x4.
9
 
10
   We get the PC & SP directly from the sigcontext structure itself.
11
   For other registers we have to dive in a little deeper:
12
 
13
   The hardware save state pointer is at offset 0x10 within the
14
   signal context structure.
15
 
16
   Within the hardware save state, registers are found in the same order
17
   as the register numbers in GDB. */
18
 
19
#define FRAME_SAVED_PC_IN_SIGTRAMP(FRAME, TMP) \
20
{ \
21
  *(TMP) = read_memory_integer ((FRAME)->frame + 0x4, 4); \
22
  *(TMP) = read_memory_integer (*(TMP) + 0x18, 4); \
23
}
24
 
25
#define FRAME_BASE_BEFORE_SIGTRAMP(FRAME, TMP) \
26
{ \
27
  *(TMP) = read_memory_integer ((FRAME)->frame + 0x4, 4); \
28
  *(TMP) = read_memory_integer (*(TMP) + 0x8, 4); \
29
}
30
 
31
#define FRAME_FIND_SAVED_REGS_IN_SIGTRAMP(FRAME, FSR) \
32
{ \
33
  int i; \
34
  CORE_ADDR TMP; \
35
  TMP = read_memory_integer ((FRAME)->frame + 0x4, 4); \
36
  TMP = read_memory_integer (TMP + 0x10, 4); \
37
  for (i = 0; i < NUM_REGS; i++) \
38
    { \
39
      if (i == SP_REGNUM) \
40
        (FSR)->regs[SP_REGNUM] = read_memory_integer (TMP + SP_REGNUM * 4, 4); \
41
      else \
42
        (FSR)->regs[i] = TMP + i * 4; \
43
    } \
44
}
45
 
46
/* It's mostly just the common stuff.  */
47
#include "pa/tm-hppa.h"

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.