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[/] [or1k/] [trunk/] [gdb-5.0/] [gdb/] [config/] [sparc/] [tm-sparclet.h] - Blame information for rev 1765

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1 106 markom
/* Target machine definitions for GDB for an embedded SPARC.
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   Copyright 1996 Free Software Foundation, Inc.
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   This file is part of GDB.
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   This program is free software; you can redistribute it and/or modify
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   it under the terms of the GNU General Public License as published by
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   the Free Software Foundation; either version 2 of the License, or
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   (at your option) any later version.
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   This program is distributed in the hope that it will be useful,
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   but WITHOUT ANY WARRANTY; without even the implied warranty of
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   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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   GNU General Public License for more details.
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   You should have received a copy of the GNU General Public License
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   along with this program; if not, write to the Free Software
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   Foundation, Inc., 59 Temple Place - Suite 330,
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   Boston, MA 02111-1307, USA.  */
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#include "sparc/tm-sparc.h"
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#define TARGET_SPARCLET 1
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/* Select the sparclet disassembler.  Slightly different instruction set from
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   the V8 sparc.  */
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#undef TM_PRINT_INSN_MACH
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#define TM_PRINT_INSN_MACH bfd_mach_sparc_sparclet
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/* overrides of tm-sparc.h */
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#undef TARGET_BYTE_ORDER
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#define TARGET_BYTE_ORDER_SELECTABLE
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/* Sequence of bytes for breakpoint instruction (ta 1). */
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#undef BREAKPOINT
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#define BIG_BREAKPOINT {0x91, 0xd0, 0x20, 0x01}
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#define LITTLE_BREAKPOINT {0x01, 0x20, 0xd0, 0x91}
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#undef  NUM_REGS                /* formerly "72" */
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/*                WIN  FP   CPU  CCP  ASR  AWR  APSR */
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#define NUM_REGS (32 + 32 + 8  + 8  + 8/*+ 32 + 1*/)
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#undef  REGISTER_BYTES          /* formerly "(32*4 + 32*4 + 8*4)" */
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#define REGISTER_BYTES (32*4 + 32*4 + 8*4 + 8*4 + 8*4/* + 32*4 + 1*4*/)
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/* Initializer for an array of names of registers.
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   There should be NUM_REGS strings in this initializer.  */
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/* Sparclet has no fp! */
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/* Compiler maps types for floats by number, so can't
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   change the numbers here. */
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#undef REGISTER_NAMES
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#define REGISTER_NAMES  \
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{ "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",       \
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  "o0", "o1", "o2", "o3", "o4", "o5", "o6", "o7",       \
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  "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",       \
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  "i0", "i1", "i2", "i3", "i4", "i5", "i6", "i7",       \
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                                                        \
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  "", "", "", "", "", "", "", "", /* no FPU regs */     \
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  "", "", "", "", "", "", "", "",                       \
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  "", "", "", "", "", "", "", "",                       \
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  "", "", "", "", "", "", "", "",                       \
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                                  /* no CPSR, FPSR */   \
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  "y", "psr", "wim", "tbr", "pc", "npc", "", "",        \
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                                                        \
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  "ccsr", "ccpr", "cccrcr", "ccor", "ccobr", "ccibr", "ccir", "", \
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                                                                  \
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  /*       ASR15                 ASR19 (don't display them) */    \
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  "asr1",  "", "asr17", "asr18", "", "asr20", "asr21", "asr22",   \
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/*                                                                        \
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  "awr0",  "awr1",  "awr2",  "awr3",  "awr4",  "awr5",  "awr6",  "awr7",  \
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  "awr8",  "awr9",  "awr10", "awr11", "awr12", "awr13", "awr14", "awr15", \
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  "awr16", "awr17", "awr18", "awr19", "awr20", "awr21", "awr22", "awr23", \
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  "awr24", "awr25", "awr26", "awr27", "awr28", "awr29", "awr30", "awr31", \
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  "apsr",                                                                 \
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 */                                                                       \
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}
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/* Remove FP dependant code which was defined in tm-sparc.h */
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#undef  FP0_REGNUM              /* Floating point register 0 */
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#undef  FPS_REGNUM              /* Floating point status register */
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#undef  CPS_REGNUM              /* Coprocessor status register */
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/* sparclet register numbers */
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#define CCSR_REGNUM 72
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#undef EXTRACT_RETURN_VALUE
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#define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF)                       \
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  {                                                                    \
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    memcpy ((VALBUF),                                                  \
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            (char *)(REGBUF) + REGISTER_RAW_SIZE (O0_REGNUM) * 8 +     \
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            (TYPE_LENGTH(TYPE) >= REGISTER_RAW_SIZE (O0_REGNUM)        \
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             ? 0 : REGISTER_RAW_SIZE (O0_REGNUM) - TYPE_LENGTH(TYPE)), \
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            TYPE_LENGTH(TYPE));                                        \
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  }
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#undef STORE_RETURN_VALUE
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#define STORE_RETURN_VALUE(TYPE,VALBUF) \
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  {                                                                    \
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    /* Other values are returned in register %o0.  */                  \
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    write_register_bytes (REGISTER_BYTE (O0_REGNUM), (VALBUF),         \
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                          TYPE_LENGTH (TYPE));                         \
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  }
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#undef PRINT_REGISTER_HOOK
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#define PRINT_REGISTER_HOOK(regno)
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/* Offsets into jmp_buf.  Not defined by Sun, but at least documented in a
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   comment in <machine/setjmp.h>! */
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#define JB_ELEMENT_SIZE 4       /* Size of each element in jmp_buf */
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#define JB_ONSSTACK 0
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#define JB_SIGMASK 1
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#define JB_SP 2
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#define JB_PC 3
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#define JB_NPC 4
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#define JB_PSR 5
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#define JB_G1 6
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#define JB_O0 7
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#define JB_WBCNT 8
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/* Figure out where the longjmp will land.  We expect that we have just entered
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   longjmp and haven't yet setup the stack frame, so the args are still in the
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   output regs.  %o0 (O0_REGNUM) points at the jmp_buf structure from which we
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   extract the pc (JB_PC) that we will land at.  The pc is copied into ADDR.
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   This routine returns true on success */
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extern int
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get_longjmp_target PARAMS ((CORE_ADDR *));
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#define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)

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